Example of the Finite Difference Method of Solution for the LaPlace
Potential Field Equation
As described in class, this problem concerns the use of the finite difference numerical
method to solve LaPlace’s equation for the electric potential (V) field in the volume of an
ASIC bounded by a rectangular (x = 3 cm, y = 4 cm, z = 1 cm) ground shield. All of the
six sides of the shield are maintained at ground (V = 0 V) potential. Two rectangular
voltage supply busses on the central circuit layer are maintained at V = + or - 3.3 V as
shown in the layout diagram below. The specific dimensions of the ASIC, and of each
supply buss, are shown in the x-y plane. You are asked to do the following in the form of
a MATLAB m-file:
1. Use a three dimensional spatial grid of points with h = 0.1 cm. and specify initial
potential values for all of the shield “boundary” and interior supply buss points.
2. Calculate Vi, j, k for all interior points using the finite difference method with
“overrelaxation” (start with  = 1.5) after each calculation to speed iterative
convergence of the solution.
3. Incorporate “while” loop iteration until the mean error of approximation (a) for
the potential at the grid points is less than s = 0.05% (convergence criterion).
Avoid approximation error calculations for any grid points where V = 0. Also,
specify a maximum number of loops (200 is suggested) in case you have an error
and your solution does not converge.
4. Examine the convergence speed of this numerical method by calculating the
number of iterations required to satisfy the convergence criterion using
overrelaxation parameters (1.1 <  < 1.9). Determine an “optimum” value of
overrelaxation for this problem to 2 significant figures.
5. Construct a MATLAB plot of V(i,j,k) in the x-y plane with z = 0.5 cm (half the
height of the shield). Just one planar plot is required here. Use color to illustrate
the electric potential variation in the plane. Explore the Pseudocolor plotting
function (pcolor) and its options for this part. (If your program is working well,
try reducing the step size for the calculation to h = 0.05 cm for a more precise
potential map.)
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Figure 1. ASIC x-y plane layout with dimensions in cm
The grey rectangles are the voltage supply busses. Each buss is 0.1 cm in width.
The layout plane is located at z = 0.5 cm within the ground shield.
Solution h = 0.05 cm
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