Scrubbing Optimization via
Availability Prediction (SOAP) for
Reconfigurable Space Computing
HPEC 2012
Quinn Martin
Alan George
SOAP
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Background
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SOAP Approach
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FPGAs and Radiation in Space
Traditional Scrubbing Methods
Mission Parameters
Markov Models
Mission Case Studies
Results
Conclusions
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FPGAs
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Field-Programmable Gate Arrays (FPGAs)
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Implement custom digital logic hardware with
fabric of logic resources and interconnect
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Lookup tables (LUTs) implement combinational logic
User flip flops (FFs) implement sequential logic
Switch and connection boxes route among resources
Many are reconfigurable
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Allows update of routing and logic state
Partial reconfiguration can update partition of device
E.g., Virtex from Xilinx and Stratix from Altera
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Reconfigurable FPGAs in Space
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Advantages
Very high performance/power ratio
 Reconfigurable (fully and partially)
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Adaptable to changing environments and mission
requirements
 Can update design after launch
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Disadvantages
Relatively difficult to design/test applications
 Configuration memory vulnerable to radiation
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Can change application processor architecture in
unpredictable way
 Must repair upsets via configuration scrubbing
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Radiation Effects on FPGAs
 Single-event
Effects (SEE)
Single-event Latchup (SEL) – Causes current
spike that may damage device
 Single-event Upset (SEU) – Changes state of
bit(s), e.g. from logic ‘0’ to ‘1’
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Can be single-bit upset (SBU) or multi-bit upset (MBU)
Single-event Functional Interrupt (SEFI) – Like
SEU, but affecting critical device resource
 Total
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Ionizing Dose
Degrades performance over time leading to
eventual device failure
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Xilinx V-5/V-6 Configuration
 Programmed
via SelectMAP interface
Runtime configuration interface
 Also allows readback of existing configuration
 32 bits per configuration word
 Parallel bus width of 8, 16, or 32 bits
 Max clock frequency 100 MHz
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 Configuration
memory arranged in frames
Minimum unit of access to config. memory
 Virtex-5 – 41 words per frame
 Virtex-6 – 81 words per frame
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FPGA Scrubbing
 FPGA
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Configuration Scrubbing
Quickly repairs SEUs before accumulation
Accumulation defeats redundancy strategies (e.g.,
TMR)
 Fast repair can prevent SEUs from manifesting as
errors
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Can be decomposed into basic scrubbing
techniques
Correction techniques repair upsets
 Detection techniques discover and locate upsets
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FPGA Scrubbing Techniques
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Correction Techniques
Golden Copy – Repairs configuration based on
know “golden” copy (e.g., in rad-hard PROM)
Frame ECC – Repairs based on per-frame error
syndrome code stored on-chip
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Detection Techniques
Frame ECC – Detects based on per-frame
SECDED Hamming code
CRC-32– Detects using device-wide CRC-32
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FPGA Scrubbing Strategies
 Scrubbing
Strategies
Any combination of detection and correction
techniques with controller to implement algorithm
Blind Scrubbing – Golden copy correction only
Readback Scrubbing – Some detection
technique used
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FPGA Scrubbing Strategies
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SOAP Approach
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Scrubbing Optimization via Availability
Prediction (SOAP)
Uses system availability as primary metric for
scrubbing efficacy
 Models scrubbing strategies as Markov diagrams
 Vary free parameters to find optimal scrubbing
system
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Environmental parameters λ and α (orbits)
 System parameters B and fCCLK (memory and pin
constraints)
 Scrubbing parameters μ and γ (device configuration
capability)
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SOAP Approach
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Environmental Parameters
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λ - SEU rates for devices in various orbits of
interest
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Calculated per-bit and per-device using
CREME96
α – Correction factors for single-bit and multibit upsets (SBU/MBU)
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From beam tests on Virtex-5 devices
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System Parameters
Factors chosen by the system designer
based on available memories, power
budget, etc.
 Affect scrubbing detection and correction
rates (see equations on next slide)
 B – Configuration bus width in bits
 fCCLK – Configuration clock speed in Hz
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Scrubbing Parameters
μ – Repair rate for scrubbing technique
(per second)
 γ – Detection rate for scrubbing technique
(per second)
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Markov Algorithm Models
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Blind
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Built-in CRC-32
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Basic detection
Frame ECC with CRC-32
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No detection
CRC acts as “safety net” for upsets
undetected by Frame ECC
Frame ECC with CRC-32 and Essential
Bits (EB)
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Only scrubs errors that may be critical
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Blind Scrubbing
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Readback CRC-32 Scrubbing
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CRC-32 w/ Frame ECC Scrubbing
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Case Study
Applies SOAP method to hypothetical
systems with realistic parameters
 Devices
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Xilinx Virtex-5
 Xilinx Virtex-6
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Orbits
ISS low earth orbit (LEO)
 Molniya highly elliptical orbit (HEO)
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8-bit SelectMAP bus at 33 MHz
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Accounts for access speed of slow rad-hard
PROM
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Case Study
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Two mission types
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Non upset critical (non-UC) – System continues
to run upon detection and correction of upset
Only
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count critical upsets as system “unavailable”
Upset critical (UC) – System requires reset
upon detection of upset to ensure state integrity
Requires
detection
All detected upsets render system unavailable for
reset period
Will benefit from essential bits mask used in
detection
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Non-UC Results
Continuous blind scrubbing offers highest
availability
 CRC-32 offers similar availability with low
implementation complexity
 Frame ECC suffers because TBUs can be
falsely corrected, resulting in further errors
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UC Results
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UC Results
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Results
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Frame ECC with CRC-32 and Essential Bits
mask offers highest availability
Roughly one extra nine over other methods
 Xilinx-provided soft-error mitigation (SEM) core
implements similar
strategy
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Other strategies still competitive
Complex state machine or software and additional
memory required for Frame ECC/EB
 Model does not account for vulnerability associated
with internal scrubbing
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Conclusions
Predicts availability for various FPGA
scrubbing strategies on real and hypothetical
platforms
 Uses analytical models rather than
experimentation
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Markov availability modeling with parametric
approach
 Allows optimization of scrubbing strategy during
design phase
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In case study, blind scrubbing best for non-UC
and Frame ECC with EB mask best for UC
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