CS 278
Digital System Design
Course Preliminaries

Teaching Staff

Professor Dan Ernst



Office Hours:
 Weds. 9-11am, Fri. 1-3pm
 … or by appointment
Phillips 139
ernstdj@uwec.edu

Course web page access

Course notes are posted online at

http://www.cs.uwec.edu/~ernstdj/courses/cs278/

All assignments and labs will be posted there as well

Textbook:

Grading policies


Assignments/Quizzes ( 15% )
Three exams ( 15% each – 45% total )



Labs ( 25% )
Project ( 15% )


More info later
Attendance not directly counted towards grade


2 midterms + 1 final
There will be turn-ins during lab time
Lab room is P122!

Hardware Boards (1)

The Altera UP2 Development Board

Handle with care, and leave them in the lab!

Hardware Boards (2)

The IDL-800 Digital Logic Trainer with solderless
breadboard isn’t cheap either

These must stay in the lab, along with all of the supplies
Digital System Design
Digital Logic Design

Voltage levels not
saved/copied/transmitted
perfectly
2
1
0
Digitized version enables
near-perfect save/cpy/trn.



“Sample” voltage at
particular rate, save
sample using bit
encoding
Voltage levels still not
kept perfectly
But we can distinguish
0s from 1s
original signal
time
01 10 11 10 11
a2d
1 digitized signal
0
time
01 10 11 10 11
Volts
Let bit encoding be:Digitized signal not
perfect re-creation,
1 V: “01”
3
but
higher
sampling
2 V: “10”
rate and more bits per 2
3 V: “11”
encoding brings closer. 1
0
lengthy transmission
(e.g, cell phone)

3
lengthy transmission
(e.g, cell phone)
Analog signal (e.g., audio)
may lose quality
Volts

Volts
Example of Digitization Benefit
3
2
1 received signal
0
time
How fix -- higher, lower,
?
a
1
0
time
Can fix -- easily distinguish
0s and 1s, restore
d2a
time
Implementing Digital Systems:
Using mprocessors Vs. Designing Digital Circuits
Programmed
Desired motion-at-night detector microprocessor
Custom designed
digital circuit
Microprocessors a
common choice to
implement a digital
system



I0
I1
I2
I3
I4
I5
I6
I7
microprocessor
P0
P1
P2
P3
P4
P5
P6
P7
Easy to program
Cheap (as low
as < $1)
Available now
void main()
1
a
{
0
while (1) {
1
b
P0 = I0 && !I1; 0
// F = a and !b,
1
F
}
0
}
6:00
7:057:06
9:009:01
time
Digital Design:
When mprocessors Aren’t Good Enough

With microprocessors so easy,
cheap, and available, why
design a digital circuit?


Image Sensor
(a)
Microprocessor may be too
slow
Or too big, power hungry, or
costly
Memory
Image Sensor
Microprocessor
Q: How long for each
implementation option?
(Read,
Compress,
and Store)
Read
circuit
5+8+1
=14 sec
Compress
circuit
(b)
Sample digital camera task execution times (in
seconds) on a microprocessor versus a digital
circuit:
Task
Microprocessor
Read
5
0.1
Compress
8
0.5
Store
1
0.8
Store
circuit
Memory
Image Sensor
Custom
Digital Circuit
(c)
Memory
.1+.5+.8
=1.4 sec
Read
circuit
Compress
circuit
Microprocessor
(Store)
a
.1+.5+1
=1.6 sec
Good
compromise
Introduction


Let’s learn to design digital circuits
We’ll start with a simple form of circuit:
 Combinational circuit
 A digital circuit whose outputs
depend solely on the present
combination of the circuit inputs’
values
Digital circuit
1
a
b
Combinational
0
1
F
digital circuit
1
a
b
Sequential
0
digital circuit
?
F
Switches

Switches are the basis of binary
digital circuits
 Electrical terminology

Voltage: Difference in electric
potential between two points




Analogous to water flow
Resistance: Tendency of wire
to resist current flow

4.5 A
9V
4.5 A
+
2 ohms
Analogous to water pressure
Current: Flow of charged
particles

–
Analogous to water pipe diameter
V = I * R (Ohm’s Law)
9V
0V
4.5 A
Switches
control
input

A switch has three parts

Source input, and output


source
input
Current wants to flow from source
input to output
Control input


“off”
Voltage that controls whether that
current can flow




Initially just a few transistors on IC
Then tens, hundreds, thousands...
control
input
“on”
output
(b)
1930s: Relays
1940s: Vacuum tubes
1950s: Discrete transistor
1960s: Integrated circuits (ICs)

a
source
input
The amazing shrinking switch

output
relay
discrete
transistor
vacuum tube
IC
quarter
(to see the relative size)
Moore’s Law
The Power of Miniaturization
EDSAC 1 (1949)
~ 500 OPs
Pentium 4 (2002)
~ 12 GFLOPs
24,000,000 times faster
The CMOS Transistor

CMOS transistor

Basic switch in modern ICs
a
nMOS
gate
1
0
conducts
does not
conduct
1
0
pMOS
gate
Silicon -- not quite a conductor or insulator:
Semiconductor
does not
conduct
conducts
Boolean Logic Gates
Building Blocks for Digital Circuits
(Because Switches are Hard to Work With)

“Logic gates” are better digital circuit building blocks than switches (transistors)


Why?...
Abstraction
Boolean Algebra and Digital Circuits



To understand the benefits of “logic gates” vs.
switches, we should first understand Boolean algebra
a b AND
“Traditional” algebra
0 0 0
0 1 0
1 0 0
 Variable represent real numbers
1 1 1
 Operators operate on variables, return real numbers
a b OR
0 0 0
Boolean Algebra
0 1 1
1 0 1
1 1 1
 Variables represent 0 or 1 only
 Operators return 0 or 1 only
a NOT
0 1
1 0
 Basic operators



AND: a AND b returns 1 only when both a=1 and b=1
OR: a OR b returns 1 if either (or both) a=1 or b=1
NOT: NOT a returns the opposite of a (1 if a=0, 0 if a=1)
Boolean Algebra and Digital Circuits

Developed mid-1800’s by George Boole to formalize human thought

Ex: “I’ll go to lunch if Mary goes OR John goes, AND Sally does not go.”




Let F represent my going to lunch (1 means I go, 0 I don’t go)
Likewise, m for Mary going, j for John, and s for Sally
Then F = (m OR j) AND NOT(s)
Nice features

b
0
1
0
1
AND
0
0
0
1
a
0
0
1
1
b
0
1
0
1
OR
0
1
1
1
Formally evaluate


a
0
0
1
1
m=1, j=0, s=1 --> F = (1 OR 0) AND NOT(1) = 1 AND 0 = 0
Formally transform

F = (m and NOT(s)) OR (j and NOT(s))

Looks different, but same function

We’ll show transformation techniques soon
a
0
1
NOT
1
0
Evaluating Boolean Equations
a

Evaluate the Boolean equation
F = (a AND b) OR (c AND d)
for the given values of variables a, b, c, and d:
 Q1: a=1, b=1, c=1, d=0.


Q2: a=0, b=1, c=0, d=1.


Answer: F = (1 AND 1) OR (1 AND 0) = 1 OR 0
= 1.
Answer: F = (0 AND 1) OR (0 AND 1) = 0 OR 0
= 0.
Q3: a=1, b=1, c=1, d=1.

Answer: F = (1 AND 1) OR (1 AND 1) = 1 OR 1
= 1.
a
0
0
1
1
b
0
1
0
1
AND
0
0
0
1
a
0
0
1
1
b
0
1
0
1
OR
0
1
1
1
a
0
1
NOT
1
0
Converting to Boolean Equations
a

Convert the following English
statements to a Boolean
equation

Q1. a is 1 and b is 1.


Q2. either of a or b is 1.


Answer: F = a AND b
Answer: F = a OR b
Q3. both a and b are not 0.

Answer:



(a) Option 1: F = NOT(a) AND NOT(b)
(b) Option 2: F = a OR b
Q4. a is 1 and b is 0.

Answer: F = a AND NOT(b)
Converting to Boolean Equations
a

Q1. A fire sprinkler system should spray water if high heat
is sensed and the system is set to enabled.


Answer: Let Boolean variable h represent “high heat is sensed,” e
represent “enabled,” and F represent “spraying water.” Then an
equation is: F = h AND e.
Q2. A car alarm should sound if the alarm is enabled, and
either the car is shaken or the door is opened.


Answer: Let a represent “alarm is enabled,” s represent “car is
shaken,” d represent “door is opened,” and F represent “alarm
sounds.” Then an equation is: F = a AND (s OR d).
(a) Alternatively, assuming that our door sensor d represents
“door is closed” instead of open (meaning d=1 when the door is
closed, 0 when open), we obtain the following equation:
F = a AND (s OR NOT(d)).
Building Circuits with Gates
Relating Boolean Algebra to Digital Design
Boolean
algebra
(mid-1800s)
Boole’s intent: formalize
human thought
For telephone
Switches
(1930s) switching and other
NOT
Symbol
Truth table
OR
x
x
F
x
0
1
Shannon (1938)
Digital design
x
F
y
F
1
0
x
0
0
1
1
electronic uses
Showed application
of Boolean algebra
to design of switchbased circuits
AND
y
0
1
0
1
F
0
1
1
1

F
0
0
0
1
0
y
x
Transistor
x
circuit
x
F
F
F
y
y
x
x
0
Implement Boolean operators using transistors

y
0
1
0
1
y
1

x
0
0
1
1
0
1
F
y
Call those implementations logic gates.
Let’s us build circuits by doing math -- powerful concept
1
NOT/OR/AND Logic Gate Timing Diagrams
1
1
1
x
x
0
1
x
0
y
y
1
0
1
F
0
0
1
F
time
0
1
F
0
0
time
time
Building Circuits Using Gates

Recall previous motion-in-dark example



Turn on lamp (F=1) when motion sensed (a=1) and no
light (b=0)
F = a AND NOT(b)
Build using logic gates, AND and NOT, as shown
Example: Converting a Boolean
Equation to a Circuit of Logic Gates

Q: Convert the following equation to logic
gates:
F = a AND NOT( b OR NOT(c) )
a
F
(a)
a
a
b
F
c
(b)
Example: Seat Belt Warning Light System


Design circuit for warning light
Sensors




Capture Boolean equation



s=1: seat belt fastened
k=1: key inserted
p=1: person in seat
person in seat, and seat belt not
fastened, and key inserted
Convert equation to circuit
Notice

w = p AND NOT(s) AND k
Boolean algebra enables easy
capture as equation and conversion
to circuit


How design with switches?
Of course, logic gates are built from
switches, but we think at level of
logic gates, not switches
k
p
s
BeltWarn
w
Some Circuit Drawing Conventions
no
x
yes
F
y
no
yes
ok
not ok
Boolean Algebra
Boolean Algebra

By defining logic gates based on Boolean algebra, we can use algebraic
methods to manipulate circuits


So let’s learn some Boolean algebraic methods
Start with notation: Writing a AND b, a OR b, and NOT(a) is
cumbersome

Use symbols: a * b, a + b, and a’ (in fact, a * b can be just ab).


Original: w = (p AND NOT(s) AND k) OR t
New: w = ps’k + t
Spoken as “w equals p and s prime and k, or t”
Or even just “w equals p s prime k, or t”
s’ known as “complement of s”




While symbols come from regular algebra, don’t say “times” or “plus”
Boolean algebra precedence, highest precedence first.
Symbol
Name
Description
()
Parentheses Evaluate expressions nested in parentheses first
’
NOT
Evaluate from left to right
*
AND
Evaluate from left to right
+
OR
Evaluate from left to right
Operator Precedence

Evaluate the following Boolean equations: a=1, b=1, c=0, d=1.

Q1. F = a * b + c.


Q2. F = ab + c.

a

Answer: we first evaluate b’ because NOT has precedence over AND, resulting
in F = 1 * (1’) = 1 * (0) = 1 * 0 = 0.
Q4. F = (ac)’.


Answer: the problem is identical to the previous problem, using the shorthand
notation for *.
Q3. F = ab’.


Answer: * has precedence over +, so we evaluate the equation as F = (1 *1) + 0
= (1) + 0 = 1 + 0 = 1.
Answer: we first evaluate what is inside the parentheses, then we NOT the
result, yielding (1*0)’ = (0)’ = 0’ = 1.
Q5. F = (a + b’) * c + d’.

Answer: Inside left parentheses: (1 + (1’)) = (1 + (0)) = (1 + 0) = 1. Next, * has
precedence over +, yielding (1 * 0) + 1’ = (0) + 1’. The NOT has precedence over
the OR, giving (0) + (1’) = (0) + (0) = 0 + 0 = 0.
Boolean Algebra Terminology


Example equation:
Variable




Appearance of a variable, in true or complemented form
Nine literals: a’, b, c, a, b, c’, a, b, and c
Product term



Represents a value (0 or 1)
Three variables: a, b, and c
Literal


F(a,b,c) = a’bc + abc’ + ab + c
Product of literals
Four product terms: a’bc, abc’, ab, c
Sum-of-products


Equation written as OR of product terms only
Above equation is in sum-of-products form. “F = (a+b)c + d” is
not.
Boolean Algebra Properties
Textbook pg 30-31
Example uses of the properties:

Commutative



a+b=b+a
a*b=b*a

a * (b + c) = a * b + a * c
a + (b * c) = (a + b) * (a + c)






0+a=a+0=a
1*a=a*1=a

a + a’ = 1
a * a’ = 0
To prove, just evaluate all
possibilities
Use first distributive property



abc + abc’ = ab(c+c’).
Complement property

Replace c+c’ by 1: ab(c+c’) = ab(1).
Identity property


a*b*c’ = a*c’*b = c’*a*b = c’*b*a = c’ba.
Show abc + abc’ = ab.

(a + b) + c = a + (b + c)
(a * b) * c = a * (b * c)
Complement



(this one is tricky!)
Identity
Use commutative property:

Associative

Show abc’ equivalent to c’ba.

Distributive



ab(1) = ab*1 = ab.
Show x + x’z equivalent to x + z.

Second distributive property


Complement property


Replace x+x’z by (x+x’)*(x+z).
Replace (x+x’) by 1,
Identity property

replace 1*(x+z) by x+z.
Examples Using Properties

Want automatic door opener
circuit (e.g., for grocery store)


Output: f=1 opens door
Inputs:




p=1: person detected
h=1: switch forcing hold open
c=1: key forcing closed
Want open door when




h=1 and c=0, or
h=0 and p=1 and c=0
Equation: f = hc’ + h’pc’
h
c
p
DoorOpener
f
Found inexpensive chip that
computes:


Can we use it?


f = c’hp + c’hp’ + c’h’p
Is it the same as f = hc’ + h’pc’?
Use Boolean algebra:
f = c’hp + c’hp’ + c’h’p
f = c’h(p + p’) + c’h’p (by the distributive property)
f = c’h(1) + c’h’p
(by the complement property)
f = c’h + c’h’p
(by the identity property)
f = hc’ + h’pc’
(by the commutative property)
Same!
Additional Properties





•
(a’)’ = a
•


•
To prove, just
evaluate all
possibilities
•
S = a’ + b’ + c’
Alternative: Instead of
lighting “Available,”
light “Occupied”
– Opposite of
“Available” function S
= a’ + b’ + c’
– So S’ = (a’ + b’ + c’)’
• S’ = (a’)’ * (b’)’ * (c’)’
(by DeMorgan’s
Law)
• S’ = a * b * c (by
Involution Law)
Transform
•
(a + b)’ = a’b’
(ab)’ = a’ + b’
Very useful!
Three lavatories, each with
sensor (a, b, c), equals 1 if
door locked
Light “Available” sign (S) if
any lavatory available
Equation and circuit
•
DeMorgan’s
Law


•
a+a=a
a*a=a
•
Behavior
•
Involution Law


•
a+1=1
a*0=0
Idempotent Law


Aircraft lavatory sign example
Null elements
(abc)’ = a’+b’+c’ (by
DeMorgan’s Law)
S = (abc)’
New equation and circuit
– Makes intuitive sense
• Occupied if all doors
are locked
Circuit
Circuit
a
b
c
S
a
b
c
S
Boolean Function Representations
English 1: F outputs 1 when a is 0 and b is 0, or when a is 0 and b is 1.
English 2: F outputs 1 when a is 0, regardless of b’s value
(a)
a
b
Equation 1: F(a,b) = a’b’ + a’b
F
Equation 2: F(a,b) = a’
(c)
(b)
Circuit 1
a
b
F
0
0
1
0
1
1
1
0
0
1
1
0
Truth table
a
F
(d)
Circuit 2
The function F

A function can be represented in different ways

Above shows seven representations of the same functions F(a,b), using
four different methods: English, Equation, Circuit, and Truth Table
Truth Table Representation






a
0
0
1
1
Define value of F for
each possible
combination of input
values
F
(a)
2-input function: 4 rows
3-input function: 8 rows
4-input function: 16 rows
n-input function: 2n rows
Q: Use truth table to
define function F(a,b,c)
that is 1 when abc is 5
or greater in binary
b
0
1
0
1
a
0
0
0
0
1
1
1
1
b
0
0
1
1
0
0
1
1
c
0
1
0
1
0
1
0
1
(b)
a
a
0
0
0
0
1
1
1
1
b
0
0
1
1
0
0
1
1
c
0
1
0
1
0
1
0
1
F
0
0
0
0
0
1
1
1
F
a
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
b
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
c
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
(c)
d
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
F
Converting among Representations


Can convert from any representation to
any other
Common conversions


Equation to circuit (we did this earlier)
Truth table to equation (which we can
convert to circuit)


Easy -- just OR each input term that
should output 1
Equation to truth table


Easy -- just evaluate equation for each
input combination (row)
Creating intermediate columns helps
Q: Convert to truth table: F = a’b’ + a’b
Inputs
a
a
0
0
1
1
b
0
1
0
1
Output
a' b'
1
0
0
0
a' b
0
1
0
0
F
1
1
0
0
Inputs
Outputs
Term
a
0
0
1
1
F
1
1
0
0
F = sum of
a’b’
a’b
b
0
1
0
1
F = a’b’ + a’b
Q: Convert to equation
a
0
0
0
0
1
1
1
1
b
0
0
1
1
0
0
1
1
c
0
1
0
1
0
1
0
1
F
0
0
0
0
0
1
1
1
ab’c
abc’
abc
F = ab’c + abc’ + abc
a
Representation: Truth Table
f = c’hp + c’hp’ + c’h’

How can we determine if two
functions are the same?

f = c’h(1) + c’h’p
Recall automatic door example




f = c’h(p + p’) + c’h’p
f = c’h + c’h’p
Same as f = hc’ + h’pc’?
Used algebraic methods
But if we failed, does that
prove not equal?
(what if we stopped here?)
f = hc’ + h’pc’
Solution: Convert to truth tables Q: Determine if F=ab+a’ is same

Only ONE truth table
representation of a given
function

Truth tables are a standard
representation -- for given
function, only one version in
standard form exists
function as F=a’b’+a’b+ab, by converting
each to truth table first
F = a’b’ +
a’b + ab
F = ab + 'a
a
0
0
1
1
b
0
1
0
1
F
1
1
0
1
a
0
0
1
1
b
0
1
0
1
F
1
1
0
1
a
Canonical Form -- Sum of Minterms


Truth tables too big for numerous inputs
Use standard form of equation instead


Known as canonical form
Regular algebra: group terms of polynomial by power


ax2 + bx + c
(3x2 + 4x + 2x2 + 3 + 1 --> 5x2 + 4x + 4)
Boolean algebra: create sum of minterms



Minterm: product term with every function literal appearing
exactly once, in true or complemented form
Just multiply-out equation until sum of product terms
Then expand each term until all terms are minterms
a
Canonical S-O-P Example
Q: Determine if F(a,b)=ab+a’ is same function as F(a,b)=a’b’+a’b+ab, by
converting first equation to canonical form (second already in canonical
form)
F = ab+a’ (already sum of products)
F = ab + a’(b+b’) (expanding term)
F = ab + a’b + a’b’ (SAME -- same three terms as other equation)
Multiple-Output Circuits



Many circuits have more than one output
Can give each a separate circuit, or can
share gates
Ex: F = ab + c’, G = ab + bc
a
a
b
F
c
b
F
c
G
G
(a)
Option 1: Separate circuits
(b)
Option 2: Shared gates
Multiple-Output Example:
BCD to 7-Segment Converter
a
f
b
g
e
c
d
abcdefg =
(a)
1111110
0110000
1101101
(b)
a = w’x’y’z’ + w’x’yz’ + w’x’yz + w’xy’z +
w’xyz’ + w’xyz + wx’y’z’ + wx’y’z
b = w’x’y’z’ + w’x’y’z + w’x’yz’ + w’x’yz +
w’xy’z’ + w’xyz + wx’y’z’ + wx’y’z
Combinational Logic Design Process
Step
Description
Step 1 Capture the
function
Create a truth table or equations, whichever is
most natural for the given problem, to describe
the desired behavior of the combinational logic.
Step 2 Convert to
equations
This step is only necessary if you captured the
function using a truth table instead of equations.
Create an equation for each output by ORing all the
minterms for that output. Simplify the equations if
desired.
Step 3 Implement
as a gatebased
circuit
For each output, create a circuit corresponding
to the output’s equation. (Sharing gates among
multiple outputs is OK optionally.)