EE4271 VLSI Design Logic Synthesis EE 4271 VLSI Design 1 Logic Synthesis Starts from RTL description in HDL or Boolean expressions Outputs a standard cell netlist EE 4271 VLSI Design 2 Boolean Function f: Bm Yn B = {‘0’, ‘1’}, Y = {‘0’, ‘1’, ‘-’} The function is incompletely specified, don’t care ‘-’ For each output, space of Bm can be partitioned into on-set: all inputs leading to output ‘1’ off-set: all inputs leading to output ‘0’ dc-set: all inputs leading to output ‘-’ EE 4271 VLSI Design 3 Points in Input Space Assigning ‘1’ or ‘0’ to each of the m Boolean variables x1, x2, …, xm specifies a point in input space Bm Example (‘1’, ‘0’, ‘1’) in B3 x1=‘1’ Λ x2=‘0’ Λ x3=‘1’ x1•x2•x3 EE 4271 VLSI Design 4 Terminology Literal: a Boolean variable or its complement Minterm: a product of all input variables or their complements – a point in Bm Cube: a product of input variables or their complements The fewer number of variables, the bigger space covered EE 4271 VLSI Design 5 Boolean Function Representation A Boolean function can be specified by a sum of minterms The expression has a minterm for each point in the on-set f x1 x 2 x 3 x1 x 2 x 3 x1 x 2 x 3 x1 x 2 x 3 x1 x 2 x 3 x1 x 2 x 3 EE 4271 VLSI Design 6 Implicant and Cover An implicant is a cube whose points are either in the on-set or the dc-set A prime implicant is an implicant that is not included in any other implicant A set of prime implicants that together cover all points in the onset (and some or all points of the dc-set) is called a prime cover f x1 x 2 x1 x 3 x 2 x 3 x1 x 2 x 2 x 3 x1 x 3 EE 4271 VLSI Design 7 Irredundant Cover An prime cover is irredundant when none of its prime implicants can be removed from the cover An irredundant prime cover is minimal when the cover has the minimal number of prime implicants f x1 x 3 x 2 x 3 x1 x 2 f x1 x 2 x 2 x 3 x1 x 3 EE 4271 VLSI Design 8 Goal of Logic Synthesis Find a minimum irredundant prime cover An irredundant prime cover is not necessarily a minimum EE 4271 VLSI Design 9 Quine-McCluskey Algorithm Calculate all prime implicants of the union of the onset and dc-set, omitting prime implicants that only cover points of dc-set Finds the minimum cost cover of all minterms in the on-set by the obtained prime implicants EE 4271 VLSI Design 10 Set Covering Problem Given a universe U={e1, …, en}, a collection of subsets {S1, …, Sm} where each subset contains some elements in universe cost wi is associated with each subset Si find a subcollection C (cover) such that C covers the entire universe Famous NP-complete problem On-set U, a prime implicant an S EE 4271 VLSI Design 11 Example of Set Cover U={1,2,3,4} S1={1,2}, w=2 S2={1,3,4}, w=3 S3={3}, w=1 S4={2,4}, w=2 S5={2,3}, w=2 S6={1,2,4}, w=3 C={S3,S6} is the optimal solution S3 is redundant in C={S1,S2,S3}, and C={S1,S2} is not optimal EE 4271 VLSI Design 12 Greedy Algorithm C = empty [the cover] E= empty [record elements which have been covered] While there is uncovered element Find the subset Si which is most cost effective, that is, the Si with smallest w(Si)/|Si-E|. [weight of subset over the elements in the subset but not covered so far] For each e in Si-E, set price(e)=w(Si)/|Si-E| Put all e in Si to E Put Si in the current partial cover C EE 4271 VLSI Design 13 Running Example (Iter 1) U={1,2,3,4} S1={1,2}, w=10 S2={1,3,4}, w=9 S3={3}, w=7 S4={2,4}, w=4 S5={2,3}, w=2 Iteration 1, E = empty w(S1)/|S1-E|=10/2=5 w(S2)/|S2-E|=9/3=3 w(S3)/|S3-E|=7/1=7 w(S4)/|S4-E|=4/2=2 w(S5)/|S5-E|=2/2=1 Pick S5 E = {2,3} C = {S5} EE 4271 VLSI Design 14 Running Example (Iter 2) U={1,2,3,4} S1={1,2}, w=10 S2={1,3,4}, w=9 S3={3}, w=7 S4={2,4}, w=4 S5={2,3}, w=2 Iteration 2, E={2,3}, C = {S5} w(S1)/|S1-E|=10/1=10 w(S2)/|S2-E|=9/2=4.5 w(S3)/|S3-E|=7/0=+infty w(S4)/|S4-E|=4/1=4 Pick S4 E = {2,3,4} C = {S5,S4} EE 4271 VLSI Design 15 Running Example (Iter 3) U={1,2,3,4} S1={1,2}, w=10 S2={1,3,4}, w=9 S3={3}, w=7 S4={2,4}, w=4 S5={2,3}, w=2 Iteration 3, E={2,3,4}, C={S5,S4} w(S1)/|S1-E|=10/1=10 w(S2)/|S2-E|=9/1=9 w(S3)/|S3-E|=7/0=+infty Pick S2 E = {2,3,4,1} C = {S5,S4,S2} EE 4271 VLSI Design 16 Approximation Ratio Denote by OPT the weight of the optimal solution Denote by ALG the weight of the solution of our algorithm Our algorithm is an r-approximation to the optimal solution if for all instances, ALG<= rOPT r=1 means that our algorithm computes the optimal solution We would like to minimize r EE 4271 VLSI Design 17 Proof of Approximation - I Order all elements {e1, …, en} in which they are covered by the algorithm, e.g., E = {2,3,4,1} Denote by OPT the optimal solution At any iteration, the uncovered (remaining) elements in the universe (i.e., U-E in the beginning of the iteration) can be covered by a cover of weight at most OPT (since OPT covers all elements) There exists one subset Si with w(Si)/|Si-E|<= OPT/|UE| (average weight per element). Otherwise, on average covering any remaining element needs weight>OPT/|UE|, thus we need a cover with weight>OPT to cover all remaining elements EE 4271 VLSI Design 18 Proof of Approximation - II Our algorithm picks the Si with smallest w(Si)/|Si-E|, so its w(Si)/|Si-E|<= OPT/|U-E|. When an element ek is covered, |U-E|<=n-(k-1)=n-k+1 price(ek)<=OPT/(n-k+1) price(ek) gives the weight of our solution price(ek)=OPT(1/n+1/(n-1)+…+1)=lnn OPT EE 4271 VLSI Design 19 Tight Bound n elements and a collection of m=n+1 subsets U={1,2,…n} S1={1}, w(S1)=1/n S2={2}, w(S2)=1/(n-1) S3={3}, w(S3)=1/(n-2) … Sn={n}, w(Sn)=1 Sn+1={1,2,…,n}, w(Sn+1)=1.0001 Our solution {S1,S2,…,Sn}, weight = ln n Optimal solution {Sn+1}, weight = 1.0001 EE 4271 VLSI Design 20 Better solution? There is no (1-)lnn-approximation for Weighted Set Cover problem unless NPDTIME(nloglogn) Uriel Feige, A threshold of ln n for approximating set cover, Journal of the ACM, Vol. 45, No. 4, pp. 634 - 652, 1998 There is no better approximation algorithm running in polynomial time for the general weighted set cover problem It is possible to design better (constant) approximation for specific cases Bounded size EE 4271 VLSI Design 21 Unweighted & Size Bounded - 1 When w(S)=|S| and # elements in any S <= a constant D, the lnn-approximation algorithm works However, we can have better approximation ratio Recall that in each iteration, we pick the subset with minimum |Si|/|Si-E|.There exists one subset Si with |Si|/|Si-E|<= OPT/|U-E|. We pick the subset with |SiE| (which are uncovered elements so far) at least |Si||U-E|/OPT >= |U-E|/OPT We actually pick the subset which covers at least |UE|/OPT uncovered elements, where |U-E| is # uncovered elements so far (in the beginning of the current iteration) EE 4271 VLSI Design 22 Unweighted & Size Bounded - 2 Initially we have n uncovered elements After iteration 1, # uncovered elements <= n – n/OPT After iteration 2, # uncovered elements <= (n – n/OPT) – (n – n/OPT)/OPT After iteration k, # uncovered elements <= n(11/OPT)k Solve n(1-1/OPT)k<=x to find the smallest k, i.e., # iterations such that # uncovered elements <= x Since (1-1/OPT)OPT • k/OPT < (1/e)k/OPT, we have n/(ek/OPT)<=x k>=OPT ln(n/x) Each iteration, one subset is picked and the last x elements need at most x subsets EE 4271 VLSI Design 23 Unweighted & Size Bounded - 3 Our solution has at most OPT ln(n/x) + x subsets Since # elements for any subset is bounded by a constant D. OPT>=n/D, i.e., n/OPT<=D. Set x=n/D, so x<=OPT. OPT ln(n/x) + x<=OPT ln(D)+OPT Our algorithm is a ln(D)+1 approximation which is a constant approximation EE 4271 VLSI Design 24 Summary Primary implicant Minimum cost irredundant prime cover Set Cover Greedy Algorithm Approximation Ratio EE 4271 VLSI Design 25