Session Objectives#5
COULD explain the need for and use of registers during the fetch decode execute
cycle
SHOULD describe the use of buses to send information around the CPU.
MUST identify different buses and registers used in a CPU
Create solutions to the LMC assignments
A-Level Computing#BristolMet
Machine Code with
The Little Man Computer
Visit the following site and follow the simulations of the
Fetch-Execute cycle using the Little Man Computer (LMC)
http://www.cs.ru.nl/~erikpoll/III/dag4.html
This is an interpretation of how a processor handles machine
code.
TASK: Follow the instructions and create a flow diagram of where
the Little Man goes to throughout the Fetch Execute Cycle.
REMEMBER: Instructions are split into 2 parts, the instruction
(+,-, x, store etc) and the data itself (or memory
location/address of where the data to be used is stored)
1) The Op Code (or Operation Code Field) is part of the binary
code giving the instruction to be carried out i.e add or jump
2) The Operand (Operand Field or address field) gives the
address (memory location) where the data to be used in the
operation is stored.
A-Level Computing#BristolMet
Little Man Code Library
CODE MEANING
1ab
Load
2ab
Store
3ab
Add
4ab
Subtract
500
Input
600
Output
700
Stop
800
Skip If Negative
801
Skip If Zero
802
If Skip Positive
9AB
Jump
Beware: the Little Man 0 is a positive number, so the instruction 802 is actually Skip if Non-negative.
A-Level Computing#BristolMet
Little Man
Which parts of the processor does each LCM item belong to?
A-Level Computing#BristolMet
System Block Diagram
A-Level Computing#BristolMet
Little Man Machine Code Tasks
Assignments
1. Create a simple that will add any 2 numbers and display the
results.
2. Create a simple programs that will calculate the perimeter of
any rectangle.
3. Create a program using the LMC to allow the input of 2
integer values and then order them to output the largest value
first and then the smallest
RGB conversion SW
4. Colors of a pixel on a color are often represented with three
values (r, g, b) that the red, green and blue value
display. Grayscale on a monochrome display are represented by
only one gray value.
Choose a program that adds three inputs and divide by three, and
so rgb values to the grayscale.
A-Level Computing#BristolMet
Flow Chart to LMC Assignment 1
START
Input A
Store A
A-Level Computing#BristolMet
Input B
END
Store B
Output
Result
Load A
Add B
Coded Solution to Assignment
A-Level Computing#BristolMet
00
01
02
03
04
05
06
500
299
500
298
199
398
600
INPUT A
STORE Value A at memory
location (address 99)
INPUT B
STORE Value B at address 98
LOAD A
ADD B
OUTPUT Result
Flow Chart
Flow chart of solution to LMC Assignment 3
A-Level Computing#BristolMet
More on Buses
The signals being sent around the processor are again called
buses. These components are the information highway for the CPU.
Buses are bundles of tiny wires that carry data between
components. The three most important buses are the address, the
data, and the control buses.
3 buses you need to remember are:
The Control Bus – The CU uses this to send commands to different
parts of the processor or devices in the computer, for
requesting a disk drive to read or write.
The Address Bus – carries the location address to where the data
is going.
The Data Bus – carries the actual data being used.
A-Level Computing#BristolMet
Registers
Know that we have a greater understanding of a processort and
the Fetch-Execute cycle, we should now consider the CPU of
being composed of five basic components: RAM, registers, buses,
the ALU, and the Control Unit.
Registers are special memory locations that can be accessed very
fast. They keep a check on the progress of the instructions and
data as it moves around the processor.
Think of them as part of a logical operation rather than
individual registers.
A-Level Computing#BristolMet
Regsiters
Program Counter (PC) – In the CU. Counts the instructions as
they are carried out and increments by (+1). Contains the
address of the next instruction to be executed(Instructions are
always stored in order)
Memory Address Register (MAR) –stores the address of the memory
location currently in use, sent by the PC.
Memory Data Register (MDR) – A copy of the instruction held in
the MAR is stored here so that the memory unit and processor can
work on it at the same time.
Current Instruction Register (CIR) – the instruction now in the
MDR is copied into the CIR. In here it can be spilt into 2
parts; 1 part is sent to be decoded so that the processor knows
what the instruction is (and signals can be sent to other parts
of the processor which may be required to carry out the
instruction). The other part is an address stating whereabouts
in the memory the required data is.
A-Level Computing#BristolMet
Registers
CIR continued...
E.G if an instruction of ADD 20 is given it will be split into:
ADD – ALU works out how to do an add
20 – is where the data to be added will be found (the address)
• The address will be sent back to the MAR
• Memory will be searched and whatever is in address ‘20’ will
be copied into the MDR.
• The value in the MDR can then be used as per instructed by the
CIR i.e Adding
• As the instruction is arithmetic it will be sent to the
Accumulator (a special storage register with the ALU) to be
carried out
TASK: Create a flow diagram of how a processor would handle this
instruction through it’s registers.
A-Level Computing#BristolMet
CPU & Registers
Indicate on the diagram below where the MAR and MDR would be positioned?
A-Level Computing#BristolMet