II. Linear Block Codes
Last Lecture
 What are Linear Block Codes?
 Linear Systematic Block Codes
 Generator Matrix and Encoding Process
 Parity Check Matrix, Syndrome & Error Detection Process
 Encoding Circuit & Syndrome Circuit
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Hamming Weight and Hamming Distance
Hamming Weight w(v):
The number of nonzero components of v
Hamming Distance d(v,w):
The number of places where v and w differ
Example:
 v= (1 0 1 1 1 0 1):
 w=(0 1 1 0 1 0 1):
w(v)=5
d(v,w)=3
Important Remark: In GF(2)
d(v,w)=w(v+w)
In the example above v+w=(1 1 0 1 0 0 0)
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Minimum Distance of a Block Code
Minimum Distance of a block code (dmin):
The minimum Hamming distance between any two
code words in the code book of the block code
dmin
min d  v, w  : v, w  C, v  w
dmin  min w  v  w  : v, w  C, v  w
dmin  min w  x  : x  C, x  0
dmin
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wmin (minimum weight of the code)
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Theorem
Let C be an (n,k) linear block code with parity check
matrix H. For each code word of Hamming weight l,
there exists l columns of H such that the vector sum of
these l columns is equal to the zero vector.
PROOF:
h1 . . hn-1  ,hi is the ith column
Let v   v 0 v1 . . v n-1  be a codeword of weight l
H  h0
By Definition :
vHT  0  v 0 h0  v1 h1  ...  v n-1 hn-1  0
Assume v i1 , v i2 ,..., v il are the l nonzero components of v
 hi1  hi2  ...  hil  0
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Theorem (Cont’d)
Conversely, if there exists l columns of H whose vector
sum is the zero vector, there exists a codeword of
Hamming weight l in C.
PROOF:
Suppose hi1 ,hi2 ,...,hil are l columns of H such that :
hi1  hi2  ...  hil  0
For a binary n - tuple x with l nonzero component x i1 , x i2 ,..., x il
xHT  x 0 h0  x1 h1  ...  x n-1 hn-1
xHT  hi1  hi2  ...  hil  0
 x is a valid codeword
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Corollaries
Given C is a linear block code with parity check matrix
H. If no d-1 or fewer columns of H add to 0, the code
has minimum weight of at least d.
Given C is a linear block code with parity check matrix
H. The minimum distance of C is equal to the smallest
number of columns of H that sum to 0.
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Example
(7,4) Linear Block Code
1 0 0 1 0 1 1
H= 0 1 0 1 1 1 0
0 0 1 0 1 1 1
 No all 0 column. No two columns are identical:
 dmin>2
 Columns 0, 1, 3 sum to zero vector
 dmin=3
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Error Detection
Error Detection Capability means:
HOW MANY ERRORS ARE GUARANTEED TO BE DETECTED
AT THE RECEIVER SIDE
TWO Possibilities:
v
Channel
r
e
v: transmitted codeword
e: error pattern caused by
channel
r: received pattern
If error pattern includes l
errors: d(v,r)=l
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Number of errors
(no. of 1s in e) is
smaller than dmin
Number of errors
(no. of 1s in e) is
greater than dmin
You could be
that r is not a
valid codeword.
There is a chance
that r is a valid
codeword (if e is a
valid code word)
THE ERROR IS
GUARANTEED TO
BE DETECTED
THE ERROR
PATTERN MIGHT
NOT BE DETECTED
absolutely sure
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Error Detection Capability
The “Error Detection Capability” of a code
defines the number of errors that are
GUARANTEED to be detected.
For a code with minimum Hamming distance dmin:
The error detection capability is dmin-1
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Error Correction Capability
The “error correction capability” defines the
number of errors that are GUARANTEED to be
corrected.
For a code with minimum Hamming distance dmin:
The error correction capability is (dmin-1)/2
x means floor(x)
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Error Correction Capability: Proof
Assume a Block Code with dmin
Define a Positive Integer t such that:
v
v: transmitted codeword
e: error pattern caused by
channel
r: received pattern
Assume w is also a valid codeword in C
Triangle Inequality:
Assume an error pattern with t’ errors
Given that v and w are codewords
 d  v, r   t'
 d  v, w   dmin
 d  v, r   d  w, r   dmin  2 t  1
 d  w, r   2 t  1  t'
dmin  1
If t’≤t  d  w, r   t, t 
2
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r
e
2t  1  dmin  2t  2
d  v,r   d  w,r   d  v, w 
Channel
i.e., if an error pattern of t or
fewer errors occur, the
received vector r MUST BE
closer to v than to any other
codeword in C
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Error Correction & Error Detection Capability
Some codes are designed such that they can
GUARANTEE correction of λ or fewer errors AND
detection of up to l>λ
For a code with minimum Hamming distance dmin:
If the code could correct λ and detect up to l then
dmin≥ λ+l+1
Example:
If it is required for a code to correct 3 errors AND detect up to 6
errors then dmin must satisfy: dmin ≥10
Notes:
In the example above,
If the number of errors are 3 or less: you can provide a GUARNTEE to correct all of them.
If the number of errors are from 4 to 6: you can provide a GUARNTEE to detect that the number of errors
are between 4 to 6 without being able to correct ANY of them.
If the number of errors are greater than 6: there is NO GUARANTEE that you would be able to detect or
correct the errors
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Quantization and Analogy to Error
Correction and Detection Operation
Correct Reception:
The value received is identical to what has been transmitted
Transmitter Side
v0=0
v1=1
v2=2
Receiver Side
v*0=0 v*1=1
v3=3
v*2=2
v*3=3
Channel
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Quantization and Analogy to Error
Correction and Detection Operation
Error Detection:
The value received IS NOT EQUAL to any of the valid
representation levels
ARQ: Request retransmission
Transmitter Side
v0=0
v1=1
v2=2
Receiver Side
v*0=0 v*1=1
v3=3
v*2=2
v*3=3
Channel
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Quantization and Analogy to Error
Correction and Detection Operation
Error Detection:
The value received IS NOT EQUAL to any of the valid
representation levels
ARQ: Request retransmission
Transmitter Side
v0=0
v1=1
v2=2
Receiver Side
v*0=0 v*1=1
v3=3
v*2=2
v*3=3
Channel
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Quantization and Analogy to Error
Correction and Detection Operation
Un-Detected Errors:
The value received IS a valid representation level. However,
it is NOT what has been transmitted
Transmitter Side
v0=0
v1=1
v2=2
Receiver Side
v*0=0 v*1=1
v3=3
v*2=2
v*3=3
Channel
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Quantization and Analogy to Error
Correction and Detection Operation
Error Correction:
Approximate the received value to the closest valid representation level.
FEC: The receiver defines decision zones and maps ANY received value
to a valid representation level. ARQ cannot be applied
Transmitter Side
v0=0
v1=1
v2=2
Receiver Side
v3=3
v*0=0
v*1=1
D0
D1
v*2=2
D2
v*3=3
D3
Channel
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Quantization and Analogy to Error
Correction and Detection Operation
Error Correction:
Approximate the received value to the closest valid representation level.
FEC: The receiver defines decision zones and maps ANY received value
to a valid representation level. ARQ cannot be applied
Transmitter Side
v0=0
v1=1
v2=2
Receiver Side
v3=3
v*0=0
v*1=1
D0
D1
v*2=2
D2
v*3=3
D3
Channel
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Quantization and Analogy to Error
Correction and Detection Operation
False Correction:
The error pushes the received value outside the decision
zone of the representation level that has been transmitted.
Transmitter Side
v0=0
v1=1
v2=2
Receiver Side
v3=3
v*0=0
v*1=1
D0
D1
v*2=2
D2
v*3=3
D3
Channel
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Quantization and Analogy to Error
Correction and Detection Operation
False Correction:
The error pushes the received value outside the decision
zone of the representation level that has been transmitted.
Transmitter Side
v0=0
v1=1
v2=2
Receiver Side
v3=3
v*0=0
v*1=1
D0
D1
v*2=2
D2
v*3=3
D3
Channel
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Quantization and Analogy to Error
Correction and Detection Operation
Error Correction and Error Detection:
Defines two types of decision zone such that both FEC and
ARQ could be used dependent on the received value
Transmitter Side
v0=0
v1=1
v2=2
Receiver Side
v3=3
v*0=0
v*1=1
D0
D1
v*2=2
D2
v*3=3
D3
Channel
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Quantization and Analogy to Error
Correction and Detection Operation
Error Correction and Error Detection:
Defines two types of decision zone such that both FEC and
ARQ could be used dependent on the received value
Transmitter Side
v0=0
v1=1
v2=2
Receiver Side
v3=3
Channel
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v*0=0
v*1=1
D0
D1
v*2=2
D2
v*3=3
D3
Error
Correction
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Quantization and Analogy to Error
Correction and Detection Operation
Error Correction and Error Detection:
Defines two types of decision zone such that both FEC and
ARQ could be used dependent on the received value
Transmitter Side
v0=0
v1=1
v2=2
Receiver Side
v3=3
v*0=0
v*1=1
D0
D1
v*2=2
D2
v*3=3
D3
Channel
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Quantization and Analogy to Error
Correction and Detection Operation
Error Correction and Error Detection:
Defines two types of decision zone such that both FEC and
ARQ could be used dependent on the received value
Transmitter Side
v0=0
v1=1
v2=2
Receiver Side
v3=3
Channel
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v*0=0
v*1=1
D0
D1
v*2=2
D2
v*3=3
D3
False Error
Correction
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Quantization and Analogy to Error
Correction and Detection Operation
Error Correction and Error Detection:
Defines two types of decision zone such that both FEC and
ARQ could be used dependent on the received value
Transmitter Side
v0=0
v1=1
v2=2
Receiver Side
v3=3
Channel
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v*0=0
v*1=1
D0
D1
v*2=2
D2
v*3=3
D3
Error Detection and
ARQ could be used
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