3. Digital Implementation of Mo/Demodulators
General Structure of a Mo/Demodulator
DSB
X (F )
x(t )
d (t )
D(F )
F
dˆ (t )
MOD
SSB
FC
DEM
FC F
amp
amp
X (F )
FC F
Single Side Band (SSB) Modulator
MOD
D(F )
d (t )
d  (t )
Re{.}
SSB
F
x(t )
X (F )
D (F )
e j ( 2FC t  )
F
FC F
Implementation using Real Components
cos2FCt   
d R (t )
d (t )
SSB
d I (t )
 sin 2FC t   
where
d R (t )  Red  (t )
d I (t )  Imd  (t )
x(t )
Single Side Band (SSB) Demodulator
DEM
D(F )
d (t )
x(t )
LPF
F
cos2FC t   
X (F )
FC F
Single Side Band (SSB) Modulator in Discrete Time
Modulator Implemented in two stages:
Digital Up
Converter
d (t )
d [n]
Fs
DUC
M
s (t )
s[n]
ZOH
MFs
Fs
~ FIF
DISCRETE TIME
Analog
MOD
x(t )
~ FC  FIF 
CONTINUOUS TIME
Single Side Band (SSB) Demodulator in Discrete Time
Demodulator Implemented in two stages:
Digital Down
Converter
y(t )
Analog s (t )
DEM
~ FC  FIF 
CONTINUOUS TIME
s[n]
DDC
M
d (t )
d [n]
Fs
MFs
~ FIF
DISCRETE TIME
ZOH
Digital Down (DDC) and UP (DUC) Converters
D( f )
1
2
Fs
2
d [n]
DUC
s[n]
Fs
M
MFs
 12
~ FIF
f
F
d [n]
Fs
DDC
M
S( f )
f IF
s[n]
MFs
RF
Baseband
• kHz for voice
• MHz for voice
• MHz for data
• GHz for data
Order of magnitude of resampling: M ~ 1,000
1
2
f
MFs
2
F
Problem with Large Upsampling Factor
D
 
F
Fs
d [n]
BF
s[n]
M
LPF
s
2
LPF
 MFs
2
if M is large, very small transition region
Fs
Fs  B 

B


MFs
2
 f 
Fs  2 B
MFs
 1M2b
high complexity filter
Problem with Large Downsampling Factor
S
 
F
Fs
BF
s[n]
LPF
M
d [n]
s
2M
LPF
 MFs
2
Fs
M
 B

B

Fs
M
if M is large, very small transition region

Fs
2
f 
Fs / M  2 B
Fs

1
M
 2b
high complexity filter
Solution: Upsample in Stages
In order to make it more efficient we upsample in L stages
x0 [n]  d[n]
F0  Fs
M1
F1
H1 ( z)
xL [mL ]  y[m]
x2 [m2 ]
x1[m1 ]
M2
F2
H 2 ( z)
ML
M  M1  M 2  ... M L
FL
H L (z )
MFs  FL
i-th Stage of Upsampling
X i 1
 
F
Fi1
xi 1[mi 1 ]
Mi
B
xi [mi ]
Fi
F
Fi
Fi
H i (F )
f i 

Hi ( z )
Fi 1
Fi1  2 B
Fi
Xi

 F B
 i1
B
Fi
2
Example: Upsample in One Stage
D
 
F
F0
y[m]
F (kHz) d [n]
4
96
H (z )
F3  1.152MHz
F0  12kHz
8
f  112,152

N
50
22
1
288
288  656
N  Fs  755.7 106 ops / sec
This is not only a filter with high complexity, but also it is
computed at a high sampling rate.
Same Example in Three Stages
D
4
 
F
F0
F (kHz)
d [n]
F0  12kHz
2
F1  24kHz
f1  12248 
N1 
4
H1 ( z)
50
22
1
6
6  14
N1 Fs1  336103
H 2 ( z)
N2 
24 8
96
50
22

12
H3 ( z)
F3  1.152MHz
F2  96kHz
f 2 
x3[m3 ]  y[m]
x2 [m2 ]
x1[m1 ]
1
6
6  14
N 2 Fs 2  1.34  106
f 3 
96 8
1152
N3 
50 144
22 11
11
 144
 30
N 3 Fs 3  34.5  106
Total Number of operations/sec= 36.176106
a 95% savings!!!!
Downsample in Stages
x1[m1 ]
x0 [n]  d[n]
F0  Fs
H0 ( z)
F0
M1
H1 ( z)
xL [mL ]  y[m]
x2 [m2 ]
F1
H L1 ( z)
M2
F2
M  M1  M 2  ... M L
FL1
ML
Fs
 FL
M
i-th Stage of Downsampling
X
 Fi 1
2
 
Xi
F
i 1 Fi1
noise
B
F
Fi
 Fi
Fi 1
2
xi 1[mi 1 ]
 
Hi 1 ( z)
xi [mi ]
Mi
Fi 1
Fi
Hi 1 ( F )
fi 
Fi 2 B
Fi 1



B
Fi  B
Fi 1
2
B
Fi
keep aliased noise
away from signal
Example: Downsample in One Stage
D
 
F
F0
y[m]
F (kHz) d [n]
4
H (z )
F0  2.4MHz
8
f  12
2400 
N
50
22
200
F1  12kHz
1
600
600  1,364
N  F0  3.273  109 ops / sec
Same Example in Three Stages
D
 
F
F0
F (kHz)
y[m]
4
d [n]
H0 ( z)
4
F0  2.4MHz
f 0 
600 8
2400
N0 
50
22

H1 ( z)
5
F1  600kHz
1
4.05
4.05  10
N 0 F0  24  10
6
8
f1  120
600 
N1 
50
22
10
H2 ( z)
F2  120kHz
1
5.36
5.36  13
N1F1  7.8  106
f 2  121208 
N2 
50
22
1
30
30  68
N 2 F2  8.16  106
6
39.96

10
Total Number of operations/sec =
… a savings of almost 99% !!!
F3  12kHz
Stages at the Highest Rates
d [n]
y[m]
F0  Fs
M1
M L 1
H1 ( z)
H L1 ( z)
FL1
ML
FL
H L (z )
MFs  FL
highest rates
d [n]
F0  Fs
y[m]
H0 ( z)
F0
H1 ( z)
M1
F1
M2
H L1 ( z)
ML
Fs
 FL
M
• the highest sampling rates are close to carrier frequencies, thus very
high;
• properly choose intermediate frequencies to have simple filters at
highest rates
Last Stage in UpSampling
y[m]
xL1[n]
ML
FL1
FL
H L (z )
MFs  FL
2B  FL1  FL
X L1
 
F
FL1
FL1
B
wide region F  B
L 1
First Stage in DownSampling
x1[m]
d [n]
F0  Fs
H0 ( z)
F0
M1
F1
F0  F1  2B
X1

F
F1
F1
B
wide region F  B
1
Very simple Low Pass Filter: the Comb Integrator Cascade
(CIC)
x[n]
N 1
1  z 1  ... z ( N 1)
y[n]   x[n  ]
 0
same!!!
x[n]
1 zN
1
1  z 1
“Comb”
“Integrator”
y[n]  y[n  1]  x[n]  x[n  N ]

y[n]
y[n]   x[n  ]
these two are the same!
Notice: no multiplications!
N 1
 0
Frequency Response of the Comb Filter
1 zN
z e j 2
f

 1  e  j 2 N f  e  j N f e j N f  e  j N f
 2 je  j N f sin  N f 
1  e  j 2 N f
2
N
1
N
1
N
2
N
…like a comb!
3
N
f

Impulse Response of the CIC
 [n]
N
1 z
1  z 1
N
 [n]
c0[m]
interpolating sequence
c0[m]
 [m]
N 1
c0 [m]    [m  ]
 0
0
N 1
The CIC in the Time Domain
x[n]
N
N
x[n]
s[m]

s[m] 
 x[] [m  N ]
  
like a discrete time ZOH!
1 z
1  z 1
y[m]
y[m] 
y[m]

 x[]c [m  N ]
  
0
Two Important Identities: The “Noble” Identities
x[n]
x[n  kN ]
z  kN
y[m]  x[m N  kN ]
N
Same !!!
x[m N]
x[n]
N
z
k
y[m]  x[(m  k ) N ]
As a consequence we have one of two “Noble Identities”:
x[n]
 
H z
N
y[m]
N

Same!!!
x[n]
N
H z 
y[m]
Other “Noble” Identity
y[m  kN ]
y1[m  kN ] 
y1[m]
x[n]
z  kN
N

 x[n] [m  kN  nN]
n  
Same !!!
x[n  k ]
x[n]
z
k
N
y2 [m] 

 x[n  k ] [m  nN]
n  
As a consequence we have the other of the two “Noble Identities”:
x[n]
N
 
H zN
y[m]
x[n]
H z 
y[m]
N
Efficient Implementation of Upsampling CIC
x[n]
N
1 z
1
1  z 1
N
y[m]
Use Noble Identity:
x[n]
1 z
1
1  z 1
N
1
y[m]
Very simple implementation (no multiplications):
x[n]
z
1

y[m]
N
z 1
Efficient Implementation of Downsampling CIC
x[n]
y[m]
1
1  z 1
1 zN
N
Use Noble Identity:
x[n]
y[m]
1
1  z 1
N
1  z 1
Very simple implementation (no multiplications):
y[m]
x[n]
N
z
1
z
1

Frequency Response of the CIC
5
0
dB
-5
only 13 dB attenuation
-10
-15
-20
-25
0
0.1
0.2
0.3
0.4
0.5
f=F/Fs
f PASS
f STOP
Not a very good Low Pass Filter. We want a better attenuation in the
stopband!
Put M Stages together
x[n]
 1  zN 
 1  z 1 


N
x[n]
1 z 
 1  z 1 


N
y[m]
M
y[m]
M
N
Frequency Response:
CM 1 ( f ) 
 j 2 N f
1 e
1  e  j 2 f
 j ( N 1) Mf  sin  N f  


e
 sin  f  
M
Improved Frequency Response of CIC Filter
Resampling Factor N=10
0
-10
-20
M 2
dB
-30
M 3
-40
M 4
-50
M 5
-60
-70
-80
0
0.1
0.2
0.3
0.4
f=F/Fs
With M=4 or 5 we already get a very good attenuation.
0.5
0
-2
-4
-6
-8
0
0.005
0.01
0.015
0.02
f=F/Fs
0.025
0.03
0.035
0.04
0
-10
-20
-30
dB
dB
Example: M=4 Stages
-40
-50
-60
-70
-80
0
0.1
0.2
0.3
f=F/Fs
0.4
0.5
Implementation of M Stage CIC Filter: Upsampling
x[n]
1  z 
N
N
M
 1 

1 
1 z 
M
y[m]
Use Noble Identity:
x[n]
1  z 
1 M
 1 

1 
1 z 
N
M
y[m]
x[n]
y[m]
z
1

z
1

N
z 1
z 1
Implementation of M Stage CIC Filter: Downsampling
x[n]
1 z

1
1

z

N



M
xN [n]
y[n]
N
Use Noble Identity:
x[n]
 1 

1 
1

z


1  z 
M
y[n]
1 M
N
x[n]
y[n]
N
z
1
z
1
z
1

z
1

Problem: DownSampling CIC is Unstable
x[n]
 1 

1 
1

z


1  z 
M
y[n]
1 M
N
x[n]
y[n]
N
z
1
z
1
z
1

z
1

Now we have to be careful: the output of the integrator will easily go to
infinity
CIC Implementation.
x[n]

k 
z


 k 0

N 1
M
xM [n]
y[n]
N
x[n]
N 1
z
k
x1[n]
k 0
z
k 0
At the p stage:
This implies:
and
N 1
k
x2 [n ] x p1[n]
N 1
z
k
x p [n ]
xM [n]
k 0
x p [n]  x p1[n]  x p1[n  1]  ...  x p1[n  N  1]
max| x p [n] | N max| x p1[n] |
max| xM [n] | N M max| x[n] |
y[n]
N
If we use Q bits for the integrators then we need to guarantee
max | xM [n] |  2Q1
Let the input data x[n] use L bits:
max | x[n] |  2L1
Then:
max | xM [n] |  N M max | x[n] |  N M 2L1  2Q1
Q  L  M log2 N
decimation factor
input bits
number of stages
Application: Software Defined Radio
Definitions:
• Software Defined Radio: modulation, bandwidth allocation … all in software
• Field Programmable Gate Array (FPGA): reprogrammable logic device which is
able to perform a number of operations in parallel. They can process data at a rate
of several 100s of MHz
• DSP Chip: optimized for DSP operations by some hardwired ops (such as
multiplies).
An HF SSB Software Defined Radio
by Dick Benson, The Mathworks,
Fs 
64MHz
15.6kHz
RF
7.8kHz
IQ
AUDIO
Rec.
Rec.
Trans.
Trans.
Rec/Tr
DAC
IQ
RF
FPGA
AUDIO
DSP Chip
Transmitter:
AUDIO
2
FIR
I
2
FIR
Q
SSB
x (t )
7.8125 kHz
DSP Chip
 sin 2fC n
Xilinx Library Modules
I
8
FIR
8
FIR
64
CIC
Q
8
FIR
8
FIR
64
CIC
FS  64MHz
FPGA
RF
cos2fC n
Receiver:
sin 2f C n
RF
Xilinx Library Modules
CIC
64
FIR
8
FIR
8
I
CIC
64
FIR
8
FIR
8
Q
cos2fC n
I
FIR
FPGA
2
AUDIO
Q
FIR
2
DSP Chip