Chapter 3
Condition Codes
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N (Negative Flag):
Set if the MSB of a result is set
Clear otherwise
Please note that the MSB depends upon the
type of operation involved.
Condition Codes
• Z: Zero Flag
• Set if the result of an operation is zero.
• Clear otherwise.
Condition Codes
• V: Overflow
• Set when the result represents the possibility of the sign
change.
• Clear otherwise.
• Example:
• MOVE.B #$77,D0
V=0
• ADDI.B #30,D0
V=1
• ADDI.B #9,D0
V=0
• SUBI.B
#40,D0
V=1
• SUBI.B
#4,D0
V=0
Condition Codes
• C: Carry Flag
• Set is the operation of an Addition result in
a carry out
• Clear otherwise.
Condition Codes
• X: Extend Flag:
• Is not set directly by the results of the
operations.
• Many instructions have no effect on the
carry flag
• Those set this does in the same way as the
carry flag.
DATA TRANSFER GROUP
Writing Data into Memory
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D0: 55556666
D1: 77778888
D2: 9999AAAA
D3: BBBBCCCC
TAB1: refers to the data area in memory that is
located at the address 0030B8.
• MOVEM.W D0-D3, TAB1…..
• MOVEM.L D0-D3, TAB1
Writing Data into Memory
• Can you think about any other way doing
the same operation
• Hint:
– Address register Indirect
– Address register Indirect with Predecrement
Reading Data From Memory
• MOVEM.L #data, D0/D1;
• Can you think of other ways of doing the
same operation
Moving Peripheral Data
• For communication with all the peripherals
• Note: Only one-half of the system bus is used for the
peripheral data
• MOVEP
• Accesses two locations at a time
• Only long-word and word data size is allowed
• No condition codes are affected
• Only register indirect with displacement addressing
is allowed.
Moving Peripheral Data
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MOVEP.W D2,0(A1)
D2 contains: 12345678
A1 contains: 00045000
MOVEP.W 0(A1), D2
Quick Move
• MOVEQ
• Used for moving only 8-bits of data
• The data is moved to one of the eight data
registers.
• Before the data is moved the data is sign extended
to 32bits.
• All the condition codes else than X are affected
• X remains unchanged
• So why do we use MOVEQ and not MOVE?
• MOVEQ #B7, D4?
Push Effective Address
• Where does the data go or say where we
want to push the data?
• No condition codes are affected
• The effective address of the operand is
computed and translated into 32-bit value
before being pushed onto processor’s stack.
• PEA
$40,(A5)?
• A5: 00003060
SWAP
• For swapping register halves
• The upper and the lower word of the data
register are swapped.
• No condition code is affected
• D5: 3CFF9100
• SWAP D5
Exchange
• Any of the 16 data and address registers
may be exchanged
• EXG
D3, D5
Load Effective Address
• It is used to load 24 bit address into address
register
• Whenever the addressing mode is used ro compute
the address of an operand, the result is called the
effective address.
• No condition codes are affected
• The value is sign extended before being loaded
• LEA
$8500, A1
• LEA
$10(PC), A1
LINK
• Link and allocate
• Used for allocating the stack space and implementing
linked lists
• The specific address register is pushed onto stack
• SP is copied into the specified address register
• The signed 16-bit displacement is added to the SP
• No condition codes are affected
• A0: 00006200
A2: 0000FFC4
• LINK
A0,#$FFF0;
– In any stack operation the SP is first decremented
– Since the address value is being pushed the SP is decremented
by 4
– Next A0 is loaded with the new value of the SP.
– Then the signed displacement is added to the SP.
UNLINK
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Opposite of Link operation
A2: 0009FFB4
UNLK A2
What will be value of A2 register and the
final stack pointer
Arithmetic Group
ADD
• To add binary numbers
• Can be used for 8-bit, 16-bit, 32-bit data.
• All the condition codes are affected as per
the result of the operation
ADD
• D2: 12345678
• D3: 5F02C332
• ADD.B D2,D3
Add Address
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ADDA
To add the data to a address register
All the addressing modes may be used.
Only word and long word data size is
possible
• The condition codes are not affected
Add Address
• ADDA.W
A0, A3
• A0:CE001A2B
• A3:00140300
Add Immediate
• Byte, word and long-word values may be
added to the destination operand
• PC relative addressing not allowed
• The destination can not be the address
register
• All the condition codes are affected
Add Immediate
• ADDI.B
#$10,D2
• ADDI.W
#$10,D2
• D2: 250C30F7
Other Addition Operations
• ADDQ
– Quick add
– Similar to immediate add else than the fact that the data is in the
range of 0 to 8
– Adding the immediate data to a address register affects the
complete 32bit register.
• ADDX
– Only two forms of addressing allowed
• Data register to data register
• Memory to memory with address register indirect with predecrement
– The content of the X flag is included in the addition operation
– All the data sizes may be used
– All the CC are affected
Add with Extend
• ADDX.B
• ADDX.W
D2, D3
-(A0), -(A1)
Clear
• Clear an operand
• This instruction writes 0s into the location
specified
• All the three data sizes may be used
• All the condition codes may be affected
Clear Example
• CLR.B D0
• CLR.W A4
• CLR.L ARRAY
Compare
• Compare the data with the data register and
set the condition codes accordingly
• All the three data sizes may be used
• All the condition codes except X are
affected
• CMP.W #$29AF,D6
• D6:485C29AF
Other Compare Operations
• CMPA.L A2, A3
• CMPI.W
#5,(A3)
– PC relative addressing may not be used.
• CMPM
– The source and the destination operands must be specific using
address register indirect with post-increment.
– All the data Sizes may be used
– All the CC except X are affected
• Two data areas 10 bytes each reside in the memory.
Address register A1 and A2 points to the 1st byte in each
data table. How can be do this?
Divide
• DIVS
– Signed 32 bit number to be divided by a signed 16
bit number.
– The destination operand must be a data register.
– Only word size may be used
– After execution lower 16bit contains the quotients
and upper 16 bit contains the remainder.
– The sign of the remainder is always the same as
the sign of the sign of the dividend.
– All the CC except X are affected.
Divide
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D2: FFFFFC18
D3: 000186A0
D4: 000001F4
D5: 000009C4
DIVS D2, D3
DIVS D4,D5
Divide
• DIVU
• D4: 0000019A
• DIVU D4, D5
D5: 0007A120
Extend
• EXT
• Used to extend the sign of the data register
into the remaining upper bits of the register.
• Word and long word operations are allowed
• All CC except X are affected
• EXT.W D3
• EXT.L D3
• D3: 000000C6
Multiply
• MULS
• 16 by 16 signed multiplication
• Data registers are used as the destination and
the source
• The long word of the data register us used
during the operation
• All CC expect X are affected
Multiply
• MULS D4, D5
• D4: 0000FFF0
D5:0000FFF6
• MULU
• MULU D4, D5
• D4: 0000000A
D5:00000064
Negate
• This is used to generate 2’s complement of
a number by subtracting from zeros.
• All the data sizes may be used.
• All the condition codes are affected.
• NEG.B D2
• D2: 052055C6
• NEGX
Subtract
• Follows the same pattern as ADD
instruction
Absolute Short Addressing
• How to know that we are trying to move a
data directly or a data which is stored at
some memory location
• To access the data in two specific ranges of
memory each of which are 32KB.
• Starting address of one of them is 000000
through 007FFF.
• Starting address of the second location is
008000 through FFFFFF
Absolute Short Addressing
• MOVE.B
• MOVE.W
$3C00,D1
$9AE0,D2
Absolute long Addressing
• Here no sign extension takes place.
• The full 24-bit address has to be provided.
• Any address within the range 000000 to
FFFFFF may be used with this instruction.
• Thus two additional words are used after the
op-code by the compiler.
• Example:
• MOVE.B
$2E000,D0
Program Counter With Displacement
• This uses the 68000’s PC along with the signed
16-bit displacement.
• The signed displacement allows accessing the
memory 32768 location behind and 32767
location forward in the program.
• This is used to implement the branch instructions
and also for referencing the memory.
• The required assembler syntax are: d(PC) and
(d,PC)
Immediate Data
• For loading some immediate value into
some register.
• # sign must be included for the immediate
data.
• Example:
• MOVE.B
#$3A,D5
Quick Immediate Data
• This is the same as the immediate data
movement
• The only difference is that only byte value
is suppose to be moved.
• MOVEQ
#$2C,D3
Implied Addressing
• This makes the reference to the processor
register within its mnemonics.
• Example:
• MOVE CCR,CODES
• ANDI #$27,SR
• TRAPV
Shift and Rotate Group
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ASL
ASR
LSL
LSR
ROL
ROR
ROXL
ROXR
Arithmetic shift left
Arithmetic shift right
Logical shift left
Logical shift Right
Rotate Left
Rotate Right
Rotate Left with Extend
Rotate Right with Extend
Shift and Rotate Group
• All the instruction may use byte, word and long-word
data sizes.
• Only data register and memory words are used as
operand.
• The count must be supplied so to by how many bits we
want to shift or rotate.
• When memory location is destination then only 1bit
may be shifted at a time and the data size is limited to
word operation in this case.
• When shift or rotate count is greater than 8-bits then it
must be placed in the data register.
Shift and Rotate Group
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ASL.B
#4,D2
LSR.W
#6,D1
ROR.L
#3,D5
ROXR.B #5,D4
ASL.L
D2,D3
ROR.W
(A0)
FLAGS: N, Z and C flags are affected by all the
eight instructions in the same way.
• V flag is always cleared, except when ASL or ASR
is used. In this case it will be set if the sign change
occur during the operation.
• Six of the eight instructions also affect the X bit.
Shift and Rotate Group
• ASL (Arithmetic Shift Left)
• A zero is shifted into LSB while the bits are
moved to left
• The bits shifted out of the MSB replaces the
X and C flag.
Shift and Rotate Group
• ASL (Arithmetic Shift Left)
• All the bits are shifted to the right
• The bit which leaves the LSB position
replaces the X and C flag.
• The MSB is shifted back into itself.
• This is important when we want to preserve
the sign of some register.
Shift and Rotate Group
• LSL (Logical Shift Left)
• LSR (Logical Shift Right)
• Like a shifter (shift Register) in the logic
design
• X and C receive the corresponding MSB or
the LSB bit, which is being shifted out.
Shift and Rotate Group
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ROR (Rotate Right)
ROL (Rotate Left)
The data is rotated instead of being rotated.
The last bit being rotated moves to carry
flag. X flag is unchanged.
• RORX
• ROLX
Bit Manipulation Group
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BCHG
BCLR
BSET
BTST