Unit 4 Arithmetic and Logic Units
Department of Communication Engineering, NCTU
1
4.1 Serial Adder with Accumulator
Department of Communication Engineering, NCTU
2
Hardware Project

Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
We design a control circuit for a serial adder with an
accumulator
Department of Communication Engineering, NCTU
3
Hardware Project

Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
Operation
Department of Communication Engineering, NCTU
4
Hardware Project

Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
State graph for serial adder control
Department of Communication Engineering, NCTU
5
Hardware Project
Unit 4 Arithmetic & Logic Units
Department of Communication Engineering, NCTU
Sau-Hsuan Wu
6
4.2 A Parallel Multiplier
Department of Communication Engineering, NCTU
7
Hardware Project
Unit 4 Arithmetic & Logic Units

A multiplier for binary positive number

Save the product in a register
Shift the product to the right each time

Department of Communication Engineering, NCTU
Sau-Hsuan Wu
8
Hardware Project

Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
Datapath of the multiplier
Department of Communication Engineering, NCTU
9
Hardware Project

Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
Operation for
a simple example
Department of Communication Engineering, NCTU
10
Hardware Project

Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
State graph for a straightforward implementation
Department of Communication Engineering, NCTU
11
Hardware Project

Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
An alternative approach
Department of Communication Engineering, NCTU
12
Hardware Project

Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
Operation using a counter
Department of Communication Engineering, NCTU
13
4.3 A binary Divider
Department of Communication Engineering, NCTU
14
Hardware Project


Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
A parallel divider for positive numbers
A circuit to divide an 8-bit dividend by a 4-bit divisor to
obtain a 5-bit quotient
Department of Communication Engineering, NCTU
15
Hardware Project

Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
Block diagram



Store the dividend in a register
Shift the dividend to the left each time
An extra bit is required on the left end of the dividend
register
Department of Communication Engineering, NCTU
16
Hardware Project

Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
The operation for an example

Load initial data

Subtraction cannot be carried out without a negative result
Thus, shift the dividend to the left before we subtract

Department of Communication Engineering, NCTU
17
Hardware Project

Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
The quotient digit of 1 is stored in the unused position of the
dividend register
The first quotient digit

Shift the dividend one place to the left

Shift once again
Department of Communication Engineering, NCTU
18
Hardware Project

Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu

Subtraction is carried out, and the 3rd quotient digit of 1 is
stored in the unused position of the dividend register

A final shift is carried out, and the 4th quotient bit is set to
zero
What if the quotient is too large > 4 bits

If the initial left five bits  the divisor overflow
Department of Communication Engineering, NCTU
19
Hardware Project

Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
Datapath
Department of Communication Engineering, NCTU
20
Hardware Project

Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
The state graph
 If X8 X7 X6 X5 X4  Y3 Y2 Y1Y0  C =1

 Sh and Sub and the quotient bit is 1
Otherwise  Sh and the quotient bit is 0
Department of Communication Engineering, NCTU
21
Hardware Project

Unit 4 Arithmetic & Logic Units
Sau-Hsuan Wu
Implementation with the one-hot assignment
Department of Communication Engineering, NCTU
22