ISSM 2012 Electrochemical Induced Pitting Defects at Gate Oxide Patterning Jungtae Park Sr. Engineer of Defect Analysis Team Samsung Electronics Co., LTD YE-O-055 jtpark@samsung.com ISSM 2012 1G-Number Yield Loss Mechanism in Leading-Edge Fabs Root cause of yield loss in leading-edge fabs: Physical Defects • Pits • Scratches • Particles • Bridging Defect Found No Defect Found Non-Visual Defects Residues Charge • Organic • Surface • Metallic • Trapped Up to 30% of yield loss in today’s fabs are not traceable to physical defects, and the root cause for these yield issues are due to NVDs. ISSM 2012 2G-Number Yield Loss Mechanism in Leading-Edge Fabs ChemetriQ® Inspection System uses a scanning surface potential difference technique to detect changes in materials and/or charge on the wafer surface ChemetriQ Data Charge Map Radial Charge Profile Defect Map / KLARF Image & Threshold Analysis 0 -500 Charge Value (mV) -1000 -1500 -2000 -2500 -3000 -3500 -4000 -4500 -5000 -150.0 -100.0 -50.0 0.0 50.0 100.0 150.0 Radial Position (mm) Reference: K. Höppner, et al; Advanced Semiconductor Manufacturing Conference; Novel In-Line Inspection Method for Non-Visual Defects and Charging, (2009) ISSM 2012 3G-Number Physical Defect Detected with BF Inspection Process flow Resist coat • Post etch and clean inspection (ACI) • BF inspection detected physical defects Exposure • Defects primarily located on edge side Develop • SEM review highlighted Si pitting defects ADI Inspection LAL Oxide Etch Pitting Defect Resist Strip & Wet Clean ACI Inspection ISSM 2012 BF Defect Map SEM Image 4G-Number Pitting Defect Correlates to End of Line Yield Defect maps showed strong correlation to end of line yield – but no tool commonality Only difference was p-Type pitting on left side of wafer, n-Type pitting on top of wafer Conclusion is that the defect was a process induced defect – but which process? p-Type n-Type BF Defect Maps – Multiple Lots, Multiple Process Tools ISSM 2012 5G-Number Correlating ADI Charge to ACI Pitting Defects p-Type ChemetriQ Charge Map (ADI) ChemetriQ Defect Map (ADI) BF Inspection Defect Map (ACI) SEM Review Image (ACI) > +4.0V charge results in high risk of p-Type pitting n-Type Pitting Defect < -2.5V charge results in high risk of n-Type pitting Pitting Defect ISSM 2012 6G-Number -------- Physical Model ++++ + resist p 1 n silicon + + + - + a - -- --+ resist c 1. Resist charge induced at ADI causes carrier redistribution 2. Immersion of the wafer in a wet chemistry causes: a) Charged regions to become neutralized by liquid b) Current flow in substrate as carriers redistribute c) Etch in presence of current begins pore formation ++++ + i b 2 + resist - + + + - + 3. 3 ISSM 2012 Once carriers redistributed, no more current flows and pore formation stops 7G-Number Modeled Potential at Equilibrium N Simulation Results We simulated carrier flow in junction under influence of applied potential Added a 0.01V bias to the N-Si surface and modeled the carrier distribution The bias was then removed (simulating charge removal in the liquid) A 1.19mA current flow was induced across the junction Assuming a pore size of ~100nm P Potential w/ 0.01V at N-silicon surface N P N carrier conc. (mol/m3) w/ 0.01V P carrier conc. (mol/m3) w/ 0.01V – This represents ~30mA/cm2 – vs. 2mA/cm2 required for pore formation ISSM 2012 Current duration proportional to junction resistance / capacitance (~1ms) 8G-Number Precursor NVDs can lead to Physical Defects Resist + + + + + + + + + + + + + + + + Substrate Resist Coat Expose & Develop LAL Oxide Etch Resist Strip & Wet Clean Resist Charging ACI Inspect (Pitting Defect) Pitting Defects Precursor NVDs A physical defect may be caused by an NVD at a previous process, which may be multiple steps back in the process flow ISSM 2012 9G-Number Conclusion Resist charge (NVD) can lead to pitting defects on the Si due to an electrochemical ER effect – referred to as a Precursor NVD This defect can occur on both p-type devices with (+) resist charge as well as n-type devices with ( ̶ ) resist charge This is consistent with an accelerated electrochemical etch of Si due to etch in presence of a current supplied by carrier redistribution in charged resist regions. ISSM 2012 10 G-Number