Flash Memory
Computer Science & Engineering Department
Arizona State University
Tempe, AZ 85287
Dr. Yann-Hang Lee
yhlee@asu.edu
(480) 727-7507
7/23
Flash Memory
 A type of EEPROM (Electrically-Erasable
programmable Read-Only Memory)
 an older type of memory that used UV-light to erase
 Non-volatile, solid state technology
 Relatively limited lifespan
 Information is stored in an array of memory cells
made from floating-gate (FG) transistors
 Packaged inside a memory card:
 Extremely durable
 Can withstand intense pressure
 Immersion in water
 Better kinetic shock resistance than hard disks
set 4 -- 1
USB Flash Memory
1.
2.
3.
4.
5.
6.
7.
8.
USB connector
USB mass storage
controller device
Test points
Flash memory chip
Crystal oscillator
LED
Write-protect switch
(Optional)
Space for second
flash memory chip
set 4 -- 2
Floating Gate Operation
 Not programmed
 No electronics trapped on
floating gate
 WL=1 turns on transistor,
pulling Bitline low
 Data out = 1
 As floating gate has no effect
 Programmed
 Electronics is trapped on
floating gate
 Increase threshold voltage
 Transistor remains off when
WL=1
 Bitline=1 and Data out=0
Sept 2007
3
Flash Memory Operations
 Write: programmed or not
 Read:
 Erase: make cells non-
programmed
write operation
read operation
erase operation
set 4 -- 4
NOR and NAND Flash
 NOR
 NAND
 BL = NOR (all WL’s of non-
 BL= NAND (all WL’s of non-
programmed cells)
 The word line of selected row
high
 Un-programmed = 1
 Programmed = 0
programmed cells )
 All word lines high by default with
exception of selected row
 Un-programmed = 1
 Programmed = 0
set 4 -- 5
Comparison of NOR and NAND Flash
 NAND Flash cells are 60% smaller than NOR Flash cells
 Wear leveling: limit in the number of times NAND Flash blocks can reliably
be programmed and erased.
 NAND Flash array: grouped into a series of blocks, which are the smallest
erasable entities
 Random access time on NOR Flash < 0.075μs; on NAND Flash, for the
first byte is significantly slower > 10μs
 NAND Flash: faster PROGRAM and ERASE times
Advantage
Disadvantage
Applications
NAND
Fast PROGRAMs
Fast ERASEs Byte
Slow random access
Byte PROGRAMs difficult
File (disk) applications
Voice, data, video recorder
NOR
Random access
PROGRAMs possible
Slow PROGRAMs
Slow ERASEs
Replacement of EPROM
Execute directly from nonvolatile
memory
Any large sequential data
set 4 -- 6
Parallel and Serial Flash Chips
 Parallel interface
 Direct control of flash memory operations
 Read, program, erase (sector or chip),
 write inhibit, standby
 Byte programming
 software id phase
 load address and data
 Program (20s)
 Serial interface (SPI, I2C, microwire)
 Send commands and receive responses
 Read, program (auto-increment), erase
 Status, write protection, etc.
set 4 -- 7
Coldfire Flash Module
 Interfaces
 As a read-only memory to the ColdFire
core
 A backdoor mapping for all program,
erase, and verify operations, as well as
providing a read datapath for the DMA.
 May be programmed via the EzPort,
which is a serial Flash programming
 Flash Configuration field (24 bytes)
 Stored in flash memory base+0x400
 Protection and access restriction
 On reset, read in the field to Flash
controller
 Flash program using BDM
set 4 -- 8