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ISA II
Microprocessor without Interlocked Piped Stages
Million Instructions Per Second
Meaningless indicator of Performance
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Addressing Objects: Endianess and Alignment
Big Endian: address of most significant byte = word address (xx00 = Big End of
word)
IBM 360/370, Motorola 68k, MIPS, Sparc, HP PA
Little Endian: address of least significant byte = word address (xx00 = Little End
of word)
Intel 80x86, DEC Vax, DEC Alpha (Windows NT)
3
2
1
little endian byte 0
0
lsb
msb
0
big endian byte 0
1
2
3
Alignment: require that objects fall on address
that is multiple of their size.
Aligned
Not
Aligned
0
1
2
3
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MIPS Assembly Language:
Instruction Set
3 different instruction formats
I-type,
R-type,
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R-type instructions
R-type
Three register operands
Arithmetic & logical opcodes
Format:
6 bits
5 bits
5 bits
5 bits
5 bits
6 bits
Opcode
Rs
Rt
Rd
shamt
function
Rd = destination operand (output)
Rs = source operand (input)
Rt = source operand (input)
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I-type instructions.
I-type
Two registers and an immediate
Format:
6 bits
5 bits
5 bits
Opcode
Rs
Rt
5 bits
5 bits
6 bits
address
Rt = destination operand
Rs = source operand
Immediate = a constant, also a source operand
Note: immediate operand must fit into 16
bits! (Why?)
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I-type instructions contd…
I-type: 4 fields
6 bits
5 bits
5 bits
Opcode
Rs
Rt
I-type at work
ADDI
$2,$1,32
LUI $7,OxABCD
5 bits
5 bits
address
6 bits
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Flow control instructions
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Unconditional Branch
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Unconditional jump
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example
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Branch formats
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Unconditional Branch
J label
transfer control unconditionally to instruction
following label
Ex.
loop: add
$t1,$s3,$s3
sw
$t1,8($s4)
j
loop
Why is the above code segment poor programming?
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Conditional Branches
Ex 1:
$s0==$s1?
Yes
label23
No
Ex 2:
c < 7?
No
Yes
label17
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Conditional Branches
Ex 3:
if (i==j)
f=f-i;
else
f=g+h;
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Branching far away….
26 bit field in jump instructions is a word
address
It represents a word address
Due to the fact that instructions are
located at multiples of 4, the 2 LSbits are
always 00 !!!!!!
Implicit and can be dropped
CPU appends the 2bits back on the instruction
when instruction is fetched and decoded.
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For & While Loops Using Arrays
Ex.
int
for
clear an uninitialized array
arrayA[100];
(i=0; i<100; i++) arrayA[i] = 0;
Let
i = $S3
base addr. of A = $S4
100 = $t1
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For & While Loops Using Arrays
.data
arrayA: .space
…
…
.text
LI
MOVE
LA
LOOP: BGE
ADD
ADD
ADD
SW
ADDi
J
DONE:
400
$t1,100
$s3,$zero
$s4,arrayA
$s3,$t1,DONE
$t2,$s3,$s3
$t2,$t2,$t2
$t2,$t2,$s4
$zero,0($t2)
$s3,$s3,1
LOOP
# load count
#i=0
# load base addr. of A
# done?
# i  2 * i Int: mult
By 4
# double again
# ArrayA[i]
# ArrayA[i]
# i++
Addressing Mode
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Variable Declarations
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Memory is a linear array of bytes
Used to store programs and data
Memory is numbered in bytes
MIPS can access up to 232 bytes
i.e. from 0000000016 to FFFFFFFF16
range of _______ to _______(??Bytes)
Note: addresses are always unsigned
Variable Declarations
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Every memory cell has two attributes
address (location)
contents
84302B94
sum 16
5F89025C16
Note: Recall registers are accessed by
name
Note: We may give a location a name for
convenience
Variable Declarations
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In MIPS, two types of memory accesses
are supported
1. Load Register with contents of a memory cell
2. Store Register into a memory cell
Reg
Memory
Reg
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Variable Declarations
In MIPS, 3 cell sizes can be accessed:
byte
halfword (2 bytes)
word (4 bytes)
lb
sh
lw
All accesses must be aligned
addresses of words must be divisible by 4
addresses of halfwords must be divisible by 2
bytes are always aligned
Data Allocation
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In assembly language, we need to
allocate memory for use by program
assign names to memory locations (declare
variables)
initialize memory
.data
#
start of data declarations
Data Allocation
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To allocate uninitialized memory, use .space
To allocate initialized memory, use .byte,
.half, .word, .ascii, .asciiz
To assign names to locations, prepend
allocation directive with a label
Data Allocation
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Examples
.byte 7
# allocate byte and put a 7 in it
.half 15
# allocate halfword and put a 15 in it
.word 9
# allocate word and put a 9 in it
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Data Allocation
Ex.
(assume we start at address
0 after .data directive)
a:
.word 0xab
b:
.word 0x1234
c:
.word
0x12345678
Symbol
Table:
a=
b=
c=
0
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Data Allocation
Can also draw memory in words
a:
.word 0xab
a: 0
b:
.word 0x1234
b: 4
c:
.word 0x12345678
c: 8
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Data Allocation
Multiple numeric values separated by commas
indicate repeat of directive
Useful for small initialized arrays
Ex.:
a:
.word 1,2,3
b:
.word 4,5
a:
.word 1
.word 2
.word 3
b:
.word 4
.word 5
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Data Allocation
Memory Map
a: 0
a:
word 1,2,3
b:
word 4,5
b: 12
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Data Allocation
Ex.
.data
datanums:
.byte 1,2,3,4
datanums: 0
Alignment in MIPS
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Words are said to be aligned if they begin
on a 4 byte boundary.
Halfwords are said to be aligned if they
begin on a 2 byte boundary
Bytes are always aligned!
Alignment in MIPS
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Default in MIPS is ALIGNED memory
allocation
i.e.
 .word means allocate at next quad address
(divisible by 4)
 .half means allocate at next even address
(divisible by 2)
When you skip locations, they are
uninitialized
Alignment in MIPS
Ex.
.data
Symbol a:
.word 1
b:
.byte 2
c:
.half
d:
.byte 4
e:
.word 0x12345678
3
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0
Alignment in MIPS
Q: Why bother
aligning data?
A: Because the
databus is 32 bits
wide. (i.e. memory is
accessed on word
boundaries.) An
unaligned access
cannot be done in a
single transfer.
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0
1
12
2
34
3
56
4
78
5
sum
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Uninitialized Allocation: .space
.space
n
# allocate n bytes
Ex.
a: 0
.data
a:
.space
4
b:
.word
4
c:
.space
4
d:
.ascii
“4”
Allocating Memory for
ASCII Strings
Ex.
string1: 0
.data
string1:
.ascii “abcdef”
string2:
.asciiz “abcdef”
number1:
.word 0x1234
4
Symbol Table:
8
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Allocating Memory: C example
Convert the C code to MIPS
machine language
.data
a:
.word 0
b:
.word 5
char string1 = “abcd”;
c:
.word 7
.word 8
char array1[10];
align
manually
string1:
.asciiz “abcd”
array1:
.space 10
int a,b=5,c[3]={7,8,9};
short int array2[7];
int d=0xAB
auto
align
.word 9
.space 1
array2:
.space 14
d:
.word 0xAB
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Allocating Memory: C example
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Allocating Memory: C example
Symbol Table
a
b
c
string1
array1
array2
d
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Loading from Memory to Register
Storing from Register to Memory
To get stuff into and out of registers,
must use load & store instructions
Only way to access memory
Memory access => Read or write from or to
memory
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Loading from Memory to Register
Storing from Register to Memory
Loads
e.g.
Lxx Rt, memory_address
LW
$S1,100($S2)
Memory[$S2+100]  $S1
Load word from memory location to register
Stores Sxx Rt, memory_address
e.g.
SB
$S1,100($S2)
$S1  Memory[$S2+100]
Store byte from register to memory location
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Loading from Memory to Register
Load  get contents of appropriate # of bytes from
memory starting at address memadd and put into
register Rt starting with low order.
 if # of bytes < 4, then fill high order with 0’s or
sign as indicated by instruction
Note: loads always affect the entire
register! (=> sign extension)
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Loading from Memory to Register
List of load instructions
LW
load word (4 bytes)
LH
load half word (2bytes) -- fill high order with sign
LHU
load half word (2bytes) -- fill high order with 0’s
LB
load byte (1 byte) -- fill high order with sign
LBU
load byte (1 byte) -- fill high order with 0’s
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Storing from Register to Memory
Store 
Store appropriate # of bytes
from Rt, (starting with low
order) into memory starting at
address memadd
List of store instructions
SW
SH
SB
store word (4 bytes)
store half word (2bytes)
store byte (1 byte)
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Sign Extension for Value Preservation
Sign extension is required to preserve value when
moving a 2’s complement number from a smaller
cell to larger cell.
Why?
Given: 16 bit register (for simplicity)
Want to store -7 in the register
What is -7 in 4-bit 2’s complement binary?
How do we store it in 16 bits?
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Sign Extension for Value Preservation
Some examples:
Ex. 1:
-1 in 8 bits =
-1 in 32 bits =
Ex. 2:
-7 in 8 bits =
-7 in 32 bits =
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Sign Extension for Value Preservation
Example 3:
1210 in 8 bits =
1210 in 32 bits =
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Sign Extension for Value Preservation
When moving a 2’s complement # from an mbit cell to an n-bit cell where n>m, the value is
preserved if bits xn-1...xm are set to
all 0’s if x is positive (xm-1=0)
all 1’s if x is negative (xm-1=1)
Another way to say: 2’s complement #’s
preserve value when the sign is extended. (i.e.
Copy bit xm-1 into xn-1...xm)
Loading and Storing
using Direct Mode
Address known at load time
(before execution)
Ex:
.data
a: .word
b: .word
c: .half
d: .half
e: .byte
f: .byte
g: .word
Ox1
OxFFFFFFFF
Ox7890
OxABCD
Ox10
OxEE
0
Addr.
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Value
Addr.
0
D
1
E
2
F
3
10
4
11
5
12
6
13
7
14
8
15
9
16
A
17
B
18
C
19
Value
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Loading and Storing using
Direct Mode
LW
$t0,a
B3
SW
$t0,g
$t0
LH
$t1,d
$t1
LHU
$t2,d
$t2
LH
$t3,c
$t3
SB
$t1,e
LB
$t4,f
SW
$t4,b
B2
B1
B0
Loading and Storing using
Direct Mode
Legal
LB $t0,a
SH $t0,e
LW $t0,e
(Not good
programming)
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Illegal
LW $t0,f
SW $t0,d
SH $t0,f
Note: Assembly
language does not care
about declarations, only
alignment
Quick Review
Part 1
Memory
Allocation/Initialization
.data
a:
.word Ox56
c:
.half Ox7623
e:
.byte Ox10
g:
.word 0
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Address
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
10
11
12
13
14
15
16
17
18
19