Lab 2 Pictures
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Amplification Rd ID ID Vds Vgs V gs ID Slope gm Small Rd V dd / R d Id Q point V gs Large Rd Q point Id Id V ds Vt Vgs V knee V dd Vds V ds R d I d g m R d V gs © Bob York Power Dissipation ID P Pm ax Imax Rd ID Vds P V ds I d Pm ax Vgs Vmax © Bob York Vds CD4007 CD4007 n-Ch 2.5 * Typical - Typical Condition .model MbreakND NMOS + Level=1 Gamma= 0 Xj=0 + Tox=1200n Phi=.6 Rs=0 Kp=111u Vto=2.0 Lambda=0.01 + Rd=0 Cbd=2.0p Cbs=2.0p Pb=.8 Cgso=0.1p + Cgdo=0.1p Is=16.64p N=1 1/2 * CD4007 NMOS and PMOS transistor SPICE models I d [mA] Sqrt(Id), mA^0.5 0.25 0.20 2.0 0.15 0.10 1.5 0.05 0.00 1.0 0.8 1 1.2 0.5 0.0 0 1 2 3 Vgs, Volts *The default W and L is 30 and 10 um respectively and AD and AS *should not be included. Id, mA 4 5 4 5 CD4007 N-ch 6 .model MbreakPD PMOS + Level=1 Gamma= 0 Xj=0 + Tox=1200n Phi=.6 Rs=0 Kp=55u Vto=-1.5 Lambda=0.04 + Rd=0 Cbd=4.0p Cbs=4.0p Pb=.8 Cgso=0.2p + Cgdo=0.2p Is=16.64p N=1 *The default W and L is 60 and 10 um respectively and AD and AS *should not be included. 1.4 5 Vt 1V 4 K n 0.4mA/V Data 2 Model 3 2 1 0 0 © Bob York 1 2 3 Vgs, Volts 2N7000 From DataSheet: (~2.5um technology) *2N7000 SPICE MODEL * .MODEL 2N7000 NMOS (LEVEL=3 RS=0.205 NSUB=1.0E15 +DELTA=0.1 KAPPA=0.0506 TPG=1 CGDO=3.1716E-9 +RD=0.239 VTO=1.000 VMAX=1.0E7 ETA=0.0223089 +NFS=6.6E10 TOX=1.0E-7 LD=1.698E-9 UO=862.425 +XJ=6.4666E-7 THETA=1.0E-5 CGSO=9.09E-9 L=2.5E-6 +W=0.8E-2) .ENDS * For large currents, Id-Vgs is approximately linear (dotted line) For small currents (<100mA) the behavior is parabolic © Bob York 2N7000 2N7000 120 10 9 8 7 6 5 4 3 2 1 0 Vt 2.35V 100 Id, mA I d [mA] Sqrt(Id), mA^0.5 1/2 2N7000 Subthreshold currents K n 220mA/V 2 Data Model 80 60 40 20 0 1.5 2.0 2.5 2.2 3.0 2.4 Vgs, Volts 2N7000 100 1 1.0 2.0 3.0 4.0 Id, mA 10 Id, mA 3.2 120 100 80 60 40 0.01 20 0.001 0 Vgs, Volts © Bob York 3.0 2N7000 1000 0.1 2.6 2.8 Vgs, Volts 2.2 2.4 2.6 2.8 Vgs, Volts 3.0 3.2 2N7000 Pdiss=400mW © Bob York Measuring Parameters gm, Vt This is a simple method for estimating device parameters Vdd • Use diode-connected device (forces operation in saturation) • With an ammeter, vary the supply voltage until the desired bias current is achieved, and record the gate voltage Vgs A • Adjust Vdd so that Vgs changes by a small amount (say 50mV), and record the resulting change in current gm Vout Id V gs • Continue varying the gate voltage until the current increases by a factor of 4. If the device follows a parabolic law, this means that the (Vgs-Vt) must have changed by a factor of 2 I d 1 K n V gs1 V t 2 I d 2 4 I d 1 K n V gs 2 V t r 2 Id 2 Id1 For r = 2: © Bob York Vt rV gs 1 V gs 2 r 1 V t 2V gs 1 V gs 2 Common Source Amps Vdd Rg1 Vdd Rd ∞ ∞ Rd Rg1 ∞ Rgen Vout Vin ∞ Vout RL Vgen Rg2 Rg2 Rgen Vin Rin © Bob York vin gmvin Rout Vout Vgen Rin vin gmvin Rout RL Lab Circuits +10 V +10 V 220 Ω 100 kΩ Vin 100 kΩ 220 Ω 10 μF Vout Vin 10 μF 10 μF 10 μF 10 kΩ 10 kΩ Rg1 Vout Rg1 100 Ω 10 μF © Bob York Common Source Amplifier Vdd Rg1 Rsig Rd ∞ ∞ Vout RL Vsig Rg2 Rs © Bob York ∞ Common Gate Amplifier Vdd Rd ∞ ∞ G Vout D gmvgs 1/gm S D 1/gm gmvin vin ∞ S Vin G Id Vin 1/gm vin gmvin R in 1 / g m Rd Vout R out R d © Bob York Av Vout V in g m Rd Common-Gate Amplifier Vdd Rg1 Rg2 Rd ∞ Vout ∞ RL ∞ Rgen Vgen Rs R in R s Rgen Vgen © Bob York Rin 1 gm 1 gm R out R d vin gmvin Rout RL Av Vout V in g m Rout RL Lab experiment +10 V 220 Ω 10 μF Rg1 10 μF 100 kΩ 10 kΩ Vin Rs 100 μF © Bob York 100 Ω Vout Source Follower Vdd Rg1 Rgen Rd ∞ ∞ Vout Vgen Rg2 Rs RL © Bob York CS Resistive Feedback Rf Vdd Vdd Rd Id ∞ Vout ∞ ∞ Vin © Bob York RL Vin Rg Vin ∞ Vout Rf vgs Rgen gmvgs Rout Vout Vgen Rg vgs gmvin RL CD4007 VDD 14 1 P P 2 13 3 12 4 P 11 N 5 VSS © Bob York 2 13 1 6 3 11 10 8 5 7 4 12 10 6 7 14 N N 9 8 9 Active Loading Vdd Vdd Q2 Q3 C2 Rf C1 Q4 Q1 Vin © Bob York Vout RL
