lecture22

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Shift/Rotate, Cycle
Counting, Stacks
Notes:
• Have you picked up your pocket reference yet?
• We’ll use them in lecture today…
Today:
• First Hour: Shift/Rotate, Cycle Counting
– Section 2.9-2.10 of Huang’s Textbook
– In-class Activity #1
• Second Hour: Stacks
• Section 3.3, 3.6, 3.7 of Huang’s Textbook
– In-class Activity #2
1
Arithmetic Shift Left
Apply to a memory location and accumulators A, B and D.
There are three 8-bit arithmetic shift left instructions:
ASL opr
ASLA
ASLB
memory location opr is shifted left one place
accumulator A is shifted left one place
accumulator B is shifted left one place
C
b7 ----------------- b0
0
Has the effect of multiplying by 2
2
Shift Instructions
16-bit arithmetic shift left instruction:
ASLD
C
b7 ----------------- b0
accumulator A
b7 ----------------- b0
accumulator B
0
Arithmetic shift right. E.g.:
ASR opr
memory location opr is shifted right one place
ASRA
accumulator A is shifted right one place
b7 ----------------- b0
C
Note: Divides by 2 each time
A negative number remains negative after shifting
3
Shift & Rotate Instructions
Logical shift left instructions. E.g.:
LSL opr
memory location opr is shifted left one place
LSLA
accumulator A is shifted left one place
C
0
b7 ----------------- b0
Logical shift right instructions:
LSR opr
memory location opr is shifted right one place
LSRA
accumulator A is shifted right one place
0
b7 ----------------- b0
C
Useful for unsigned multiply and divide by 2
4
Shift & Rotate Instructions
Rotate left instructions that operate on 9-bit operands.
ROL opr
memory location opr is rotated left one place
ROLA
accumulator A is rotated left one place
ROLB
accumulator B is rotated left one place
b7 ----------------- b0
C
Rotate right instructions: Eg:
ROR opr
memory location opr is rotated right one place
RORA
accumulator A is rotated right one place
C
b7 ----------------- b0
Useful for controlling stepper motors, computing checksums, etc.
5
How long does a
program take to run?
• The 6811 manual lists the number of clock cycles
that each instruction takes
• How long is a clock cycle?
– Let’s look it up.
500ns
• Execution time = # cycles x time per cycle
Table: Execution times of a sample of instructions
Execution time (E clock cycles)
Instruction
BNE <rel>
3
DECB
2
DEX
3
LDAB <imme>
2
LDX <imme>
3
NOP
2
6
Example
again
LDX #2
NOP
NOP
DEX
BNE again
; 3 cycles
; 2 cycles
; 2 cycles
; 3 cycles
; 3 cycles
Time = (3 + 102) cycles
7
Program Execution Time
Example Write a program loop to create a delay of 100 ms.
Solution: A delay of 100 ms can be created by repeating
the previous loop 20000 times.
The following instruction sequence creates a delay of 100
ms.
LDX
#20000
AGAIN
NOP
NOP
DEX
BNE
AGAIN
Longer delays can be created by using nested program
loops.
8
Time Delays
There are two ways to generate time delays
using the 68HC11
•
Timer-based interrupts
•
Cycle counting
Let's explore the cycle
counting technique
Interrupt methods come later
Let's see about generating a 1 ms delay subroutine
9
Do Activity #1 Now
Example Write a program loop to create a delay of 100 ms.
Solution: A delay of 100 ms can be created by repeating
the previous loop 20000 times.
The following instruction sequence creates a delay of 100
ms.
LDX
#20000
Things to do:
AGAIN
NOP
Choose number of times to do the loop
NOP
Add NOP instructions as “padding” if needed
DEX
BNE
AGAIN
Much longer delays can be created by using nested
program loops.
10
Complete Programmer's Model
15
D
0
8-bit Accumulators A & B
16-bit Accumulator D
15
IX
0
16-bit Index Register IX
15
IY
0
16-bit Index Register IY
15
PC
0
Program Counter
15
SP
0
Stack Pointer
7
A
7
0
S X H
STOP disable
X-interrupt mask
I-interrupt mask
B
0
I N Z V C
Condition Code Register
Carry/borrow (MSB)
oVerflow (2s C)
Zero
Negative
Half carry (bit 34),(BCD)
11
Stacks
• Very important data structure
– Also a source of headaches
– Very demanding, requires discipline
– If a stack is messed up by even one byte, a computer is
likely to “crash”
• A “last-in first-out” data structure
– A queue is a first-in first-out structure
• May be implemented differently on
different computers
• Let’s study the 6811 stack….
12
Stacks on 68HC11
Stack Area
Low address
Stacks
Grow down, toward low memory
Data
PuSHed on the stack (PSH)
PULled off the stack (PUL)
High address
cell
empty
Stack
Pointer
Top of
Stack
Always PUL as many times as PSH
15
SP
0
The Stack Pointer always points to the next empty cell on the stack
13
PuSHing Data on Stacks
Stack Area
SP decrements
and points to
empty cell
SP points to
empty cell
SP
empty
SP
empty
data
Data is PuSHed
on the stack
14
PUSH
A = $33, B = $20, SP = $00FF.
Question 1:
What will the top byte of the stack contain before and after a PSHA?
Question 2:
What will the top two bytes of the stack contain if PSHB is executed?
XX
SP
= $00FF
original stack
XX
$33
after PSHA
SP =
$00FE
XX
$20
$33
after PSHB
SP =
$00FD
15
PULling Data off Stacks
Stack Area
SP points to empty cell
SP increments
SP
empty
SP
data
empty
Data is PULled off stack
SP points to empty cell
16
Stack Instructions
Reserve a Stack Area, e.g., 256 cells:
ORG $0000
STACK RMB
256
INITSP EQU
*-1
Used
together
Top of Stack
Initialize the Stack Pointer:
INIT
LDS
#INITSP
Push Registers on Stack:
Similarly,
PSHA
Push ACCA
PSHB
Push ACCB
PSHX
Push IX (2 bytes)
PSHY
Push IY (2 bytes)
PULA, PULB, PULX, and PULY
17
More Stack Instructions
Transfer Registers:
TSX
SP+1  X
TSY
SP+1  Y
Notice the
TXS
IX-1  SP
increment SP and decrement IX, IY
TYS
IY-1  SP
Increment / Decrement Stack Pointer:
INS
SP+1  SP
DES
SP-1  SP
Lots of addressing
modes !!
Load / Store Stack Pointer:
LDS
M:M+1  SP
IMM, DIR, EXT, indX, indY
STS
SP  M:M+1
DIR, EXT, indX, indY
18
Subroutines
Program Structure
Subroutine Processing
Main program
Main program
Subroutine 1
Subroutine 2
<call> sub_x
.
.
.
Subroutine 3
sub_x:
Subroutine 1.1
Subroutine 2.1
Subroutine 3.1
Subroutine
Subroutine 2.1.1
.
.
.
<return>
Subroutine 2.1.2
19
Subroutine Instructions
Stack Area
JSR, BSR push
Return Address
on Stack
Subroutine call:
JSR
BSR
SP
Subroutine return:
RTS
RTS pulls
Return Address
off Stack
empty
empty
RTNH
SP
RTHL
empty
RTN is the address of
the instruction following
the subroutine call
20
Subroutine Checklist
Checklist:
 Remember that stack grows to lower memory
addresses
 Initialize stack pointer
 Create enough space for all items that need to be
pushed to the stack
 Push return address and other information on stack
 Jump or Branch to the subroutine.
 Special steps for different types of parameter
passing methods
 Execute subroutine
 RTS pulls return address off stack
21
Do Activity #2 Now
Due: End of Class Today.
RETAIN THE LAST PAGE(S) (#3 onwards)!!
For Next Class:
• Bring Huang Textbook, & HC11 PRG
• Required Reading:
– Sec 3.9-3.11 of Huang
• This reading is necessary for getting points in
the Studio Activity!
22
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