Chapter 8 – Stacks
1996
1998
1982
1995
Topics to Cover…

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The Stack
Subroutines
Subroutine Linkage
Instruction Timing
Stoplight Example
Saving Registers
Stack Operations
Recursive Subroutines
Activation Records
BYU CS/ECEn 124
Chapter 8 - Stacks
2
Levels of Transformation
Problems
Algorithms
Language (Program)
Programmable
Machine (ISA) Architecture
Computer Specific
Microarchitecture
Manufacturer Specific
Circuits
Devices
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Chapter 8 - Stacks
3
The Stack
Stacks


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Stacks are the fundamental data structure
of computers today
A stack is a last in, first out (LIFO) abstract
data type
A stack is a restricted data structure with
two fundamental operations, namely push
and pop
Elements are removed from a stack in the
reverse order of their addition
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Chapter 8 - Stacks
4
The Stack
MSP430 Stack

Hardware support for stack


Register R1 – stack pointer
Initialized to highest address of RAM

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

MSP430F2013  0x0280 (128 bytes)
MSP430F2274  0x0600 (1k bytes)
Stack grows down towards low addresses
Initialize stack at beginning of program
STACK
.set
0x0600
; top of stack
mov.w #STACK,SP
BYU CS/ECEn 124
; Initialize stack pointer
Chapter 8 - Stacks
5
The Stack
MSP430 Stack


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Stack pointer holds the address of the top
of the stack
The lsb of the stack pointer is always 0
PUSH, POP, CALL, RET, and RETI
instructions use the stack pointer
The stack is used for saving return
addresses, local variable storage, and
interrupts
BYU CS/ECEn 124
Chapter 8 - Stacks
6
The Stack
Computer Memory – Up or Down?
x0000
Up
Down
xFFFF
BYU CS/ECEn 124
xFFFF
Down
Up
x0000
Chapter 8 - Stacks
7
Subroutines
Subroutines

A subroutine is a program fragment that performs
some useful function.
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Specific functions that only apply to one program
Provides a way to organize the program.
Performs a specific task.
Relatively independent of the remaining code.
Keeps the program smaller (no need to repeat code).
Smaller programs are easier to maintain.
Reduces development costs while increasing reliability.
Fewer bugs – copying code repeats bugs.
Often collected into libraries.
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Chapter 8 - Stacks
8
Subroutines
The Call / Return Mechanism
BYU CS/ECEn 124
Chapter 8 - Stacks
9
Subroutine Linkage
Stack Operations

Single operand instructions:
Mnemonic
Operation
Description
PUSH(.B or .W) src
SP-2SP, src@SP
Push byte/word source on stack
CALL
SP-2SP, PC+2@SP
dstPC
Subroutine call to destination
TOSSR, SP+2SP
TOSPC, SP+2SP
Return from interrupt
dst
RETI

Emulated instructions:
Mnemonic
Operation
Emulation
Description
RET
@SPPC
SP+2SP
MOV @SP+,PC
Return from subroutine
POP(.B or .W) dst
@SPtemp
SP+2SP
tempdst
MOV(.B or .W)
@SP+,dst
Pop byte/word from stack to
destination
BYU CS/ECEn 124
Chapter 8 - Stacks
10
Subroutine Linkage
Subroutine linkage

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A subroutine is “called” in assembly with a CALL
instruction.
The address of the next instruction after the
subroutine call is saved by the processor onto the
stack.
Local variables are pushed/popped from the
stack.
At the end of a subroutine, a RET instruction
“pops” the top value from the stack into the
program counter.
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Chapter 8 - Stacks
11
Subroutine Linkage
“Calling” a Subroutine

Push PC+2 on the stack and move the source to the PC:
CALL
#TONI

Instruction code: 0x000100101
Op-code
call
b/w
16-bits
Ad
Immediate
D-reg
PC
000100101
0
11
0000
16-bit Destination Address



This instruction uses 2 words
Decrement the Stack Pointer (R1) by 2, store the Program
Counter (PC) + 2 indirectly through the Stack Pointer, and then
store the 16-bit, immediate value in the Program Counter (PC)
The 16-bit address is stored in the word following the instruction.
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Chapter 8 - Stacks
12
Subroutine Linkage
Return from Subroutine

Pop the stack into the Program Counter:
RET



; MOV @SP+,PC
Instruction code: 0x4130
Op-code
mov
S-reg
SR
Ad
Register
b/w
16-bits
As
Indirect +
D-reg
PC
0100
0001
0
0
11
0000
This emulated instruction uses 1 word
The instruction directs the CPU to move the value indirectly
pointed to by the Stack Pointer (R1) into the Program Counter
(PC) and then increment the Stack Pointer by 2.
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Chapter 8 - Stacks
13
Subroutine Linkage
Caution…


The destination of branches and calls is used indirectly,
and this means the content of the destination is used as
the address.
Errors occur often when confusing symbolic and
absolute modes:



; Subroutine’s address is stored in MAIN
; Subroutine starts at address MAIN
The real behavior is easily seen when looking to the
branch instruction. It is an emulated instruction using the
MOV instruction:



CALL MAIN
CALL #MAIN
BR MAIN
; Emulated instruction BR
MOV MAIN,PC ; Emulation by MOV instruction
The addressing for the CALL instruction is exactly the
same as for the BR instruction.
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Chapter 8 - Stacks
14
Instruction Timing
Cycles Per Instruction...

Instruction timing:



1 cycle to fetch instruction word
+1 cycle if source is @Rn, @Rn+, or #Imm
+2 cycles if source uses indexed mode

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1st to fetch base address
2nd to fetch source
Includes absolute and symbolic modes
+2 cycles if destination uses indexed mode
+1 cycle if writing destination back to memory
BYU CS/ECEn 124
Chapter 8 - Stacks
15
Instruction Timing
Cycles Per Instruction...
Src
Dst
Rn
Rm
1
1
MOV R5,R8
@Rm
2
1
MOV R5,@R6
x(Rm)
4
2
ADD R5,4(R6)
EDE
4
2
XOR R8,EDE
&EDE
4
2
MOV R5,&EDE
#n
x(Rm)
5
3
MOV #100,TAB(R8)
&TONI
&EDE
6
3
MOV &TONI,&EDE
BYU CS/ECEn 124
Cycles
Length Example
Chapter 8 - Stacks
16
Instruction Timing
Quiz

Given a 1.2 mhz processor, what value for
DELAY would result in a 1/2 second delay?
DELAY
.equ
mov.w
???
#DELAY,r12
delay1:
dec.w
jn
mov.w
r12
delay3
#1000,r15
delay2:
dec.w
jne
jmp
r15
delay2
delay1
delay3:
BYU CS/ECEn 124
Chapter 8 - Stacks
17
Instruction Timing
Quiz (cycles)

Given a 1.2 mhz processor, what value for
DELAY would result in a 1/2 second delay?
DELAY
.equ
mov.w
???
#DELAY,r12
; 2 cycles
delay1:
dec.w
jn
mov.w
r12
delay3
#1000,r15
; 1 cycle
; 2 cycles
; 3 cycles
delay2:
dec.w
jne
jmp
r15
delay2
delay1
; 3 x 1000
; = 3000 cycles
; 2 cycles
delay3:
BYU CS/ECEn 124
Chapter 8 - Stacks
18
Instruction Timing
Quiz (answer)

Known equates:

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
Delay time in cycles:

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1 second = 1,200,000 cycles
0.5 seconds = 1,200,000 / 2 = 600,000 cycles
((DELAY x 3008) + 3) cycles
= 600,000 cycles
Hence:
600000 – 3
DELAY = ---------3008
= 199.467 = 199
BYU CS/ECEn 124
Chapter 8 - Stacks
19
Stoplight Example
Stoplight Lab


Determine the clock speed of your
MSP430F2013 (or F2274) processor.
Use these calculations to program software
timing loops for you traffic light.

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Turn on the green LED for 5 seconds.
Blink the green LED on and off at 1 second intervals
for 6 seconds (3 off’s and 3 on’s).
Blink the green LED on and off at 0.25 second
intervals for 4 seconds (8 off’s and 8 on’s).
And finally, turn the green LED off for 10 seconds.
The total traffic light cycle time should be 25 seconds.
Repeat the stoplight cycle indefinitely.
BYU CS/ECEn 124
Chapter 8 - Stacks
20
Stoplight Example
Stoplight Lab
;***********************************************************************
;
CS/ECEn 124 Lab 1 - blinky.asm: Software Toggle P1.0
;
;
Description: Toggle P1.0 by xor'ing P1.0 inside of a software loop.
;***********************************************************************
.cdecls C,LIST, "msp430x20x3.h" ; MSP430F2013
;
.cdecls C,LIST, "msp430x22x4.h" ; MSP430F2274
;---------------------------------------------------------------------.text
; beginning of code
RESET:
mov.w
#0x0280,SP
; init stack pointer
mov.w
#WDTPW+WDTHOLD,&WDTCTL ; stop WDT
bis.b
#0x01,&P1DIR
; set P1.0 as output
mainloop:
xor.b
mov.w
#0x01,&P1OUT
#0,r15
; toggle P1.0
; use R15 as delay counter
delayloop:
dec.w
jnz
jmp
r15
delayloop
mainloop
; delay over?
; n
; y
.sect
.short
.end
".reset"
RESET
; MSP430 RESET Vector
; start address
BYU CS/ECEn 124
Chapter 8 - Stacks
21
Stoplight Example
Stoplight Lab
DELAY
.cdecls C,LIST, "msp430x20x3.h" ; MSP430F2013
.equ
(50/8)
.text
mov.w
mov.w
bis.b
#0x0280,SP
#WDTPW+WDTHOLD,&WDTCTL
#0x01,&P1DIR
mainloop:
xor.b
call
jmp
#0x01,&P1OUT
#delay1sec
mainloop
; toggle P1.0
delay1sec:
mov.w
#DELAY,r12
; get delay count
delay02:
dec.w
jeq
mov.w
r12
delay06
#0,r15
; done?
; y, return
; n, use R15 as delay counter
delay04:
dec.w
jnz
jmp
r15
delay04
delay02
; delay over?
; n
; y
delay06:
ret
".reset"
RESET
; MSP430 RESET Vector
; start address
RESET:
.sect
.short
.end
BYU CS/ECEn 124
;
;
;
;
Chapter 8 - Stacks
beginning of code
init stack pointer
stop WDT
set P1.0 as output
22
Saving Registers
Saving and Restoring Registers

Called routine -- “callee-save”

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Calling routine -- “caller-save”

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At beginning of routine, save all registers that will be
altered (unless altered value is desired by calling
program!)
Before returning, restore those same registers in
reverse order
If registers need to be preserved across subroutine
calls, save before calling routine and restore upon
returning from routine
Or, avoid using those registers altogether
Values are saved by storing them in memory,
preferably on the stack.
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Chapter 8 - Stacks
23
Saving Registers
Caller-Save vs. Callee-Save
Save Registers
call subroutine
Save Registers
subroutine
call subroutine
Restore Registers
BYU CS/ECEn 124
subroutine
Restore Registers
Chapter 8 - Stacks
24
Stack Operations
Stack Operations

Single operand instructions:
Mnemonic
Operation
Description
PUSH(.B or .W) src
SP-2SP, src@SP
Push byte/word source on stack
CALL
SP-2SP, PC+2@SP
dstPC
Subroutine call to destination
TOSSR, SP+2SP
TOSPC, SP+2SP
Return from interrupt
dst
RETI

Emulated instructions:
Mnemonic
Operation
Emulation
Description
RET
@SPPC
SP+2SP
MOV @SP+,PC
Return from subroutine
POP(.B or .W) dst
@SPtemp
SP+2SP
tempdst
MOV(.B or .W)
@SP+,dst
Pop byte/word from stack to
destination
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Chapter 8 - Stacks
25
Stack Operations
Push Operand

Push the contents of register R5 on the stack:




PUSH
R5
Instruction code: 0x000100100
Op-code
push
b/w
16-bits
Ad
Register
D-reg
r5
000100100
0
00
0101
This instruction uses 1 word
Decrement the Stack Pointer (R1) by 2 and store the
destination value indirectly through the Stack Pointer
Note: The stack pointer is always decremented by 2,
whether a byte or word instruction.
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Chapter 8 - Stacks
26
Stack Operations
Pop Operand

Pop the stack into the destination:
MOV @SP+,R5



Instruction code: 0x4135
Op-code
mov
S-reg
SP
Ad
Register
b/w
16-bits
As
Indirect +
D-reg
r5
0100
0001
0
0
11
0101
This emulated instruction uses 1 word
The instruction directs the CPU to move the value
indirectly pointed to by the Stack Pointer (R1) into the
destination and then increment the Stack Pointer by 2.
BYU CS/ECEn 124
Chapter 8 - Stacks
27
Recursive Subroutines
Recursive Subroutine


A subroutine that calls itself is said to be a
recursive subroutine
Recursion allows direct implementation of
functions defined by mathematical induction and
recursive divide and conquer algorithms




Factorial, Fibonacci, summation
Binary search
Reduces duplication of code.
MUST USE STACK!
BYU CS/ECEn 124
Chapter 8 - Stacks
28
Activation Records
Activation Records

A function is activated when called





Save return address and call-ee registers
Allocate memory for local variables
An activation record is a template of the relative
positions of its local variables in memory as
defined by the function
Activation records are allocated on the stack
A frame pointer is used to indicate the start of the
activation record


Could use a dedicated register
Or, more commonly, use the stack pointer
BYU CS/ECEn 124
Chapter 8 - Stacks
29
Activation Records
Activation Records



A new activation record is created on the stack
for each invocation of a function
When the function completes and returns
control to the caller, the activation record is
discarded.
An activation record may contain:




Memory for local function variables
Bookkeeping information
Parameters passed to function from caller
Saved registers
BYU CS/ECEn 124
Chapter 8 - Stacks
30
Activation Records
Example

Example activation record (6 bytes):
4(SP)
2(SP)
0(SP)



Return address
Outer loop counter
Inner loop counter
delay1sec:
sub.w
mov.w
#4,SP
#DELAY,2(SP)
; activate 2 variables
; set delay count
delay02:
dec.w
jeq
mov.w
2(SP)
delay06
#0,(SP)
; done?
; y, return
; n, init delay counter
delay04:
dec.w
jnz
jmp
0(SP)
delay04
delay02
; delay over?
; n
; y
delay06:
add.w
ret
#4,SP
; pop AR variables
; return from function
BYU CS/ECEn 124
Chapter 8 - Stacks
31
BYU CS/ECEn 124
Chapter 8 - Stacks
32