Product Deep Dive
Violin Memory 6000 Series
© Violin Memory, Inc. 2014
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More Demand for Data, Now!
MORE
USERS
MORE
DEVICES
Real time, concurrent
data access, heavily
virtualized infrastructure
Multi-Core Compute that
is I/O Starved, CPU
waiting for I/O
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Compute
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0
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Network
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Storage
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MORE
Storage
APPLICATIONS Must Deliver High Random IOPS & Low Latency
© Violin Memory, Inc. 2014
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How Do You Make Storage Go FAST?
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Short stroking
Wide striping
Adding SSD to legacy array
Host side read cache
“FAST”
“Easy Tier”
High Acquisition Costs
Higher Operational Costs
© Violin Memory, Inc. 2014
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6000 Series Flash Array
INSANELY POWERFUL
AMAZINGLY ECONOMICAL
ALWAYS AVAILABLE
Eliminate IO bottlenecks
Drastically reduce latency
Best Performance Value
Lower Infrastructure Costs
Full Redundancy Built-in
Fully Hot Swappable
Engineered For Flash
© Violin Memory, Inc. 2014
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Specification
VIMM Count & VIMM Capacity
6212
6224
6232
6264
6606
6616
24x 512GiB
24x 1TiB
64x 512GiB
64x 1TiB
24x 256GiB
64x 256GiB
Form Factor / Flash type
3U / Capacity (MLC)
3U / Performance (SLC)
Raw Capacity (TiB / TB)
12 / 13
24 / 26
32 / 35
64 / 70
6 / 6.5
16 / 17.5
Usable Capacity (TiB @ 84% / 65%)
6.5 / 5
13 / 10
20 / 15.5
40 / 31
3 / 2.5
10 / 7.5
I/O Connectivity
Maximum 4KB IOPS (Mixed)
Maximum Bandwidth (100% Reads)
Nominal Latency
© Violin Memory, Inc. 2014
8Gb FC, 10GbE iSCSI, 40 Gb IB, PCIe G2
200K IOPS
350K IOPS
500K IOPS
750K
IOPS
450K IOPS
1M IOPS
1.5GB/s
2GB/s
4GB/s
4GB/s
3GB/s
4GB/s
500 µsec (mixed)
250 µsec (mixed)
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Insanely Powerful.
NO MORE
“IO WAIT”
SUSTAINED EXTREME
PERFORMANCE
FAST BY
DEFAULT
1 Million IOPS, Latency in μsec
Scale without Fear
No Tuning Needed
Get Your Storage on Moore’s Law Curve
© Violin Memory, Inc. 2014
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Architecture Fundamentals: Violin Memory OS (vMOS)
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System Operations
- Web, CLI, REST

System Management
- Storage virtualization
- Hardware acceleration
- Multi-Level Flash Optimization

Data Management
-
Snapshots, Clones
Thin Provisioning
Encryption
Deduplication*
Replication*
© Violin Memory, Inc. 2014
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vMOS – Violin Memory Operating System
SYSTEM OPERATIONS
SYSTEM MANAGEMENT
DATA MANAGEMENT
System-wide wear leveling
LUN Management
Snapshots
Self-healing, integrated RAID
Multi-Pathing
Clones
High-Availability Clustering
Full-disk encryption
Multi-level wide striping
Die and block failure handling
Efficient garbage collection
© Violin Memory, Inc. 2014
Proactive health monitoring
SNMP, CLI, UI, REST API
Thin Provisioning
Space management
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Engineered For Performance & Reliability
© Violin Memory, Inc. 2014
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Engineered For Performance & Reliability
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Flash memory fabric
- Heart of the system
- 4x vRAID Control Modules (VCM)

Array control modules
- Fully redundant
- Controls flash memory fabric
- System level PCIe switching

FLASH
MEMORY
FABRIC
24 to 64
Hot Swappable
VIMMs
Active/Active memory gateways
- Storage virtualization
- LUN configuration

IO modules
- FC, 10GE, IB, PCIe Interfaces
© Violin Memory, Inc. 2014
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Multi-Level Redundancy – Hot-Swap Anything
© Violin Memory, Inc. 2014
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Fans (x6)
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Power Supply (x2)
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VIMM (60+4 hot spares)
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vRAID Controllers (x4)
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Array Controllers (x2)
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Memory Gateways (x2)
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Flash Memory Fabric – Up to 1 Million IOPS
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Up to 64 Violin Intelligent Memory Modules
-
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4 Active-Active vRAID Control Modules
Fabric level flash optimization
-
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vRAID patented algorithms
Dynamic wear leveling
Multi-level Error Correction Code
Hardware based garbage collection
Performance optimization
-
Dynamic data wide stripping
Flash erase hiding
VIMM failure protection
© Violin Memory, Inc. 2014
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01
10
01
01
10
Memory
Gateway
Memory
Gateway
VCM
01
01
10
VCM
VCM
VCM
Flash Memory Fabric
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PCIe connected
Fully hot swappable
4 global spares
01
01
10
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No SSDs ─ Violin Intelligent Memory Modules
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Core building block of the Memory Fabric
- 256 GB SLC Flash
- 512 GB / 1024 GB MLC Flash
- 3GB to 8GB DRAM
•
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All flash metadata & write I/O buffering
Hot Swappable
Proprietary flash endurance & wear leveling
extending Flash life up to 10x
- Continuous data scrubbing
- Advanced hardware based ECC
- Automated in-place die failure handling
© Violin Memory, Inc. 2014
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System Level Automatic Data Placement Optimization

4KB Write
VIMM Protection
Group
VIMM
VCM
VIMM
VCM
VIMM
VIMM
VIMM
-
MG
MG
© Violin Memory, Inc. 2014
3 VIMM Protection Groups
Each comprising 5 VIMMs
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Data is dynamically placed on VIMMs
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Example of an incoming 4KB write
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P
By default, each VCM controls 15 VIMMs
Received by MG
Forwarded to a VCM
4KB split in (4*1KB + 1 Parity) writes across 5
VIMMs in a protection group
Any VIMM failure triggers activation of a
VIMM global spare and vRAID rebuild
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Every LUN Capable of Up to 1Million IOPS, By Default
VCM
VCM
VCM

Full system bandwidth available for
every LUN
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Automatic multi-level striping
- Gateways to VCMs
- VCM wide striping to VIMMs
- VIMM wide striping on internal
Flash Chips
VCM

© Violin Memory, Inc. 2014
All operations implemented in
hardware, at line speed, ensuring
lowest levels of latency
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Low Level Flash Operations Can Lead to Poor I/O Latency
Read Ops
Write Ops
Erase Ops
SLC
25µs
250µs
1,000µs
e-MLC
50µs
1,500µs
5,500µs
MLC
50µs
900µs
3,000µs
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Read latency is low
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Write is 10x to 20x longer than read
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Erase is 100x longer than read
Spike free low latency requires special handling of Erase operations
© Violin Memory, Inc. 2014
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Write Cliff Affects All Flash Solutions To Some Degree
“Write Cliff”
Transient Random Write Bandwidth Degradation
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New Write operations get
queued behind Erase
operations
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Up to 60% performance drop

Real issue is that Erase
operations also get in the way
of Read operations
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Mitigating or eliminating the
Write Cliff requires special
flash management logic
Source: Nersc
© Violin Memory, Inc. 2014
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Patented Algorithms Deliver Spike Free Low Latency

Background garbage collection ensures free
pages for all incoming writes
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Garbage collection implemented in hardware
within each VIMM for line rate performance

Garbage collection tightly scheduled &
orchestrated at the system level to not affect
system performance

Garbage collection allowed one VIMM per
Protection Group at a time
VCM
© Violin Memory, Inc. 2014
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Patented Algorithms Deliver Spike Free Low Latency

Background garbage collection ensures free
pages for all incoming writes

Garbage collection implemented in hardware
within each VIMM for line rate performance

Garbage collection tightly scheduled &
orchestrated at the system level to not affect
system performance

Garbage collection allowed one VIMM per
Protection Group at a time
VCM
© Violin Memory, Inc. 2014
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vRAID Erase Hiding In Action
4KB Read
vRAID
Rebuild

Reads never blocked by garbage collection (vRAID rebuild
on remaining 4 VIMMs)

System level orchestration enables sustained low latency
for mixed workloads
VCM
P
© Violin Memory, Inc. 2014
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World Record Breaking Performance
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June 29, 2010 -TPC-E
World Record
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September 27, 2012 –
TPC-C World Record
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May 9, 2011 - TPC-C
World Record
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May 23, 2011 - TPC-C
World Record
October 02, 2012 –
VMmark 2.1 World
Record
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November 13, 2012 –
VMmark 2.1 World
Records (5 of them)
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June 22, 2011 – File
System World Record
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December 8, 2011 TPC-C World Record
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September 12, 2012 –
VMmark 2.1 World
Record
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September 18, 2012 –
VMmark 2.1 World
Record
http://vmem.com/benchmarks
© Violin Memory, Inc. 2014
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Amazingly Economical.
REDUCE STORAGE COSTS BY 7X
COMPARED TO DISK
UNMATCHED
OPERATIONAL COST
NEAR INSTANT
ROI
Never Overprovision
Plug and
play experience
Optimize Server and License Costs
Reduce Cost Across Your Infrastructure
© Violin Memory, Inc. 2014
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Storage Cost Per Application Is What Matters
Database Requirements
1TB
Tier 1 Disk Array
&
20K IOPS
Violin Memory 6264
- Flash Memory
- $5/Raw GB | $8.5/Usable GB
- vRAID
- 750k IOPS for any size LUN
- High Performance HDD
- $4/Raw GB
- 200 IOPS per disk
- 146GB per disk
100 Disks * 146 = 14.6 Raw TB
© Violin Memory, Inc. 2014
20K IOPS
1TB
750K IOPS
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Application Owners Pay 7x Less on Violin
Database Requirements
1TB
Tier 1 Disk Array
- 14.6 Raw TB
- $4/Raw GB
$58,400 For This Database
&
20K IOPS
Violin Memory 6264
- 1 Usable TB
- $8.5 / Usable GB
$8,500 For This Database
Application Storage Costs is 7x Lower With Violin!
© Violin Memory, Inc. 2014
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Simple Operations

Provision storage and Go!
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Select LUN capacity and let vRAID automate
placement
No tuning required
Hot swap for non disruptive operations
Seamlessly handle performance spikes
-
Customer example:
•
•

Rogue full table scans in dba scripts
System handled the load spikes and still met core
application SLAs
Advanced Graphical User Interface
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Fully customizable dashboard
Detailed performance statistics
Supported as a vCenter Plug-In
© Violin Memory, Inc. 2014
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Violin Memory Inc. Proprietary
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Violin Memory Inc. Proprietary
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Violin Symphony: Manage PB’s in a Flash!
Manage 100’s of Violin flash arrays
through a single interface
Enable multi-tenancy with role based
access control and Smart Groups
Share information through custom
reports with up to 2 years of historic data
Achieve pro-active wellness with
advanced health & SLA monitoring
Personalize visibility through fully
customizable dashboards and gadgets
© Violin Memory, Inc. 2014
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Eliminate “I/O Wait”; Reduce HW & SW Costs
CPU Cycle with
Magnetic Disk:
CPU Cycle with
Memory Storage:
t
I/O Wait
I/O Wait
80%
20%
Wait
Work
5%
95%
Wait
Work
t
Storage @ the Speed of Memory
More Ops/Sec With Less CPU Cores
More Ops/Sec with Less DRAM Cache
Less Software Licenses
© Violin Memory, Inc. 2014
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VMworld 1 Million IOPS – 2011 vs. 2012
8 Engines, 960 drives
1 Million Read IOPS
5 Racks or 210RU – 32,000 Watts
© Violin Memory, Inc. 2014
2 Violin 6616 Memory Arrays
1 VM at 1 Million IOPS (Random R/W Mix)
6 RU (97% less) – 3,600 Watts (90% less)
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Bringing the speed of Flash to all your applications
TARGETING ALL APPLICATIONS
DISRUPTIVE ECONOMICS

Enterprise Applications on Legacy SAN
 Reduced Capex

Enterprise Applications on Memory SAN
 Streamlined Opex

Scale Out Applications
 Ready for Petabyte Scale
© Violin Memory, Inc. 2014
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Back-up slides
© Violin Memory, Inc. 2014
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Violin 6264: A New Standard in Performance Economics
2X
2X
3X
DOUBLE
CAPACITY
HIGHER
EFFICIENCY
BETTER
ECONOMICS
SAME
FOOTPRINT
Violin 6232
© Violin Memory, Inc. 2014
Violin 6264
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Violin 6264 Flash Memory Array at a Glance
64 TiBs of Capacity in the Same 3U Form Factor
50% Lower Power
Memory Storage @ Disk $/GB
750K IOPS (Peak 70:30)
19nm Process Geometry
© Violin Memory, Inc. 2014
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Comparing 6264 and 6232 Hardware & Software
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6264 requires 250W less than 6232
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1500W for 6264 versus 1750W for 6232
Result of more power efficient VIMM hardware design
6264 specific hardware improvements
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New 1TiB MLC VIMMs
New chassis with better cable management
FC, iSCSI and IB configurations come with a new ACM
•
•

PCIe configuration leverages same ACM as 6232
6264 requires Array Firmware 6.2 and above
-
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Internal clustering for vMOS 6
40GE native port – for future use, enabling data movement across arrays
Memory Gateway software is equivalent functionality to vMOS 6.0
Memory Array firmware adds resilience and support for new ACMs and VIMMs
vMOS 6.3 will support all 6600 and 6200 Series arrays
© Violin Memory, Inc. 2014
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6264 Array Control Module with 40Gbps Ports
© Violin Memory, Inc. 2014
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Back panel view – 6264 FC/iSCSI/IB – New ACM
© Violin Memory, Inc. 2014
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