8255 Programmable Peripheral Interface
The Intel 8255 Programmable Peripheral Interface
chip is used to give the microprocessor (8088)
access to programmable input/ output devices.
It has three ports for input/ output devices and a
control port that contains the control word which
programs the 8255 (setting the ports status [I/O]
and their modes.
8255 Programmable Peripheral Interface
Port A
Data bus
[it could
be input or output]
D[7:0]
8255
A0
8088
A1
Control port
RD
WR
RESET
Two Address lines to
CS
RD:
Read
from
port(s)
select the port [PA,
PB, PC, Control port]
they could be any
WR: write to port(s)
two address lines
from A7 – A0
RESET: reset 8255
A7
A6
A5
A4
A3
Decoding circuit
A2
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IO/M
PA[7:0]
Port B [it could
PB[7:0]
Port C [it could
be input or output]
be input or output]
PC[7:0]
Control word is sent
to the Control Port
Chip Select
To enable the 8255
according to the Base
Address selected
8255 Programmable Peripheral Interface
• The decoding circuit will enable the 8255 chip
• 6 address lines will be inputted to a NAND gate along with IO/M
(input output device/Memory)
• The remaining 2 address lines will be inputted to the 8255 to select
the port [Port A, port B, port C or control port]
Example 1 [base address]
A7
A6
A5
A4
A3
A2
IO/M
Assume A7 – A2 are inputted to decoding circuit and
A1 - A0 are inputted to 8255 directly to select the port
A7
A6
A5
A4
A3
A2
A1
A0
Base
address
Port
1
0
0
1
1
1
0
0
9C H
Port A
1
0
0
1
1
1
0
1
9D H
Port B
1
0
0
1
1
1
1
0
9E H
Port C
1
0
0
1
1
1
1
1
9F H
Control port
8255 Programmable Peripheral Interface
Example 2 [base address]
A7
A6
A5
A4
A2
A0
IO/M
Assume A7, A6, A5, A4, A2 and A0 are inputted to the
same previous decoding circuit and A3 and A1 are
inputted to 8255 directly to select the port
A7
A6
A5
A4
A3
A2
A1
A0
Base
address
Port
0
1
0
1
0
1
0
0
54 H
Port A
0
1
0
1
0
1
1
0
56 H
Port B
0
1
0
1
1
1
0
0
5C H
Port C
0
1
0
1
1
1
1
0
5E H
Control port