E. Martínez (1) , K. Grange (1) , R. Jansen (2) , J. Ricart (1) , E. Pun (1) , J. López (1) ,
E. Prefasi (3) , M. García (3) , M. Bustamante (4) , L. de la Fuente (4) , D. Peña (4) , F. Gutiérrez (1)
(1) ARQUIMEA Ingeniería S.L.
(2) ESA/ESTEC
(3) Universidad Carlos III de Madrid
(4) EADS CASA ESPACIO
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
• About ARQUIMEA
• REDSAT ASIC & Development Phases
• Why an ASIC
• Project Restrictions
• Technology selection: ON SEMICONDUCTORS I3T80V
• Risk Analysis and Mitigation
• ASIC Description
• Radiation Hard Design
– Analog Modules
– Digital test vehicles
AMICSA 2010
ESTEC

100% private
Funded in 2007 as a spin off of UC3M
Based in Leganes (Madrid)
UC3M Scientific park
Employees: 22 (18 engineers/4 administratives).
Sustainable growth
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
Disruptive technologies/new electronic mechanic and electromechanic components
Technologies:
ASICs/FPGA design
Sensors
Actuators
Microsystems
Engineering provider/ technology partner.
Enthusiastic human team/Research Training Center philosophy.
Sectors:
Industrial
Automotive
Defence
Space
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
Mixed signal ASICS design for space applications.
Radiation hardening.
– Rad-hard libraries and IPs pre-selection or development.
– Application of rad hard design rules to rad tolerant technologies.
Foundry selection.
− Based on application analysis (voltage, power comsumtion, frequency, …).
− On Semi, AMS, IHP, MHS,
Xfab, IMS Fraunhofer
, …)
ASIC’s specification consolidation.
ASIC’s design.
− Functional
− Schematics
− Place & route,
− Timing analysis, extraction,
− Verification
− Design Rules Checking
(DRC).
ASIC Manufacturing
(at the selected foundry)
Package design.
− Custom package design,
− Thermal analysis.
− Chip / package interface simulation.
E S A P A r e q u I r e m e n t s
Device qualification
− Testability analysis
− Test development.
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
ICU Communications ASIC Control, power and monitoring RF CHAIN
PSU Power
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
ICU Communications ASIC Control, power and monitoring RF CHAIN
PSU
Power
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
Hundreds of
LNA points per antenna are needed.
ICU
Need to reduce total electronics area
Communications ASIC
Mass saving
Control, power and monitoring RF CHAIN
PSU
Higher reliabiliy
Power
Recurrent cost saving
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
ICU Communications ASIC Control, power and monitoring RF CHAIN
PSU
Power
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
ICU Communications ASIC Control, power and monitoring RF CHAIN
PSU
Power
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
Phase I
HIGH POWER MIXED
SIGNAL ASIC
FEASIBILITY STUDY
& DEVELOPMENT
Phase II
HIGH POWER MIXED
SIGNAL ASIC
QUALIFICATION
Phase III
HIGH POWER MIXED
SIGNAL ASIC
FLIGHT MODEL
UC3M/ARQUIMEA  EADS CASA ESPACIO
(ANTENNA)
ESA (ARTES 5) REDSAT PROJECT (HISPASAT)
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
High voltage transistors
(up to 80V)
Existence of buried layer which is an advantage regarding
LU immunity and hardening.
Radiation tolerant analog modules
(SPADA) and space heritage
(BAE).
I3T80 is manufactured in Europe.
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
High voltage transistors
Lack of radiation data
RH Digital cells in the I3T80 technology from ON SEMI .
Limited availabolity of radiation tolerannt digital cells
To perform preliminary radiation test of HV transistors (Total Dose and Heavy Ions effects)
To develop a radiation-hard digital library in the I3T80 technology from ON SEMI (the new digital cells will be validated in radiation tests).
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
Analog elements and libraries
Low voltage transistors
High voltage transistors
Total dose
SPADA ASIC *
>120Krad
CERN TEST ***
120 Krad
(High DR)
ON semi test vehicles* *
N-channel
Functional
Failure at
120Krad
ON semi test vehicles* *
P-channel.
Small drifts at
120Krad
Heavy Ions
SPADA ASIC *
LU free
ON semi test vehicles **
N-channel
BO at V
DS
30 V
ON semi test vehicles **
P-channel
No SEGR up to
V
DS
80V
*
SPADA ASIC with radiation hardened transistors (results from ESA project evaluation).
Karl Grangé, A systematic procedure for the development of hardened technology. Application to the I3T80-HR, AMICSA, 2006.
**
Representative samples from ON SEMI for test purposes. Test performed by HIREX Engineering during the project.
***
F.Faccio, DoseTest – A test circuit to measure the radiation response of the AMIS I3T80 technology Measurement report–
CERN/PH, 2006
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
ICU Communications ASIC Control, power and monitoring RF CHAIN
PSU
Power
AMICSA 2010
ESTEC

0
0
1
0
P
T
HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
Pre-layout radiation risk mitigation
Lay-out radiation mitigation techniques
TD
Lay-out radiation mitigation techniques
LU
Digital design SEU mitigation
• Minimize the use of N-MOS transistors (more sensitive to radiation than P-
MOS) by selecting the appropriate architectures.
• Use of P-MOS transistor for HV switch, at the expense of a higher silicon area .
• Pseudo enclosed layout for NMOS: ensures good D/S isolation from lateral transistor with acceptable accuracy with the foundry electrical model.
• Systematic guard rings => cut inter MOSFET leakage current
• NMOS and PMOS are designed inside floating pockets => improved physical isolation.
• NMOS and PMOS are manufactured above buried layers with deep biased plugs => improved charges evacuation towards power ties .
• Use of 3-vote flip-flops for digital storage (triple mode redundancy or TMR).
• Use of special monitoring logic for SEU (EDAC ).
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
Power on Reset
Temperature measurement (PT1000, 40ºC to 80ºC)
Power MOS current measurement (up to 250mA)
Level switching for Power MOSFETS for LNAs.
Vg voltage polarization selection.
Current Bias generation.
Reference voltage generation. Bandgap.
ADC (8 bits). 100KHz max.
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
Epitaxial N-pockets, allowing fully isolated devices floating on the substrate (up to 80V)
Bipolar
– D-MOS – CMOS
(0.35um)
High Voltage devices (HV),
Vds up to 80V, N-MOS and
P-MOS.
Design restriction: HV-
NMOS not used, due to its performance in radiation shows some important leakage. -> Future activity: design RH HV NMOS.
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
Bandgap voltage reference. Based on NPN transistors, but connected as diodes (Beta degradation under radiation)
ADC 8 bits (SAR - current steering)
High device matching (required for accurate PT-1000 biasing, etc.)
Internal power P-MOS current monitoring
Special “floating” level shifter designed to avoid the HV-NMOS
Provide backup circuits to decrease risk
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
Individual pocket isolation for P and N transistors
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
Preliminary layout, still to be routed
Chip Area ~25 mm2
Dual bonding pad to minimise scratch risk at EWS
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
Selection:
INVERTER CHAIN
Highest sensitive transistor area density for a given size
Each transistor is sensitive while for a
NAND or a NOR, in the stacked branch, one transistor is less sensitive
The inverter chain is also a very good test vehicle for SET sensitivity tests, due to its ability to pass very fast signals
As the digital library is designed from performances of the smallest inverter
(fanout definition…), generalization of results is easier
Large cell area of the order 15x when compared to the standard cells!!!!
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
It is not possible to provide definitive conclusions since the ASICs described herein are still at the end of the design phase and no results are available yet.
The HV functions have been developed using P-channel transistors, departing from radiation data from preliminary test performed on test vehicles from ON SEMI.
• These tests showed acceptable radiation performance for High Voltage P-channel transistors while the N-channel ones showed a high sensitivity to both heavy ions and gamma rays total cumulative dose .
A digital test vehicle has been developed that includes new rad hard digital structures.
• These designs will be verified in a first run and provide the digital functionality of the final mixed-signal ASIC.
• The main aspect to be improved will be the area ratio between the radiation hardened and the standard I3T80 digital cells (15x). Further area improvements are under investigation .
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
• Support on the ON
SEMI technology.
• Support on the
I3T80 technology.
IMEC
P.Malisse
G.Milczanowska
, G. Thys, R.
Brouns, etc
ON SEMI
A. De Langhe
J. Roig
CERN
F. Faccio
HIREX
F.X. Guerre
J.F. Pascal
• Support on radiation experience with
AMIS I3T80
• Support on radiation test activities.
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
RADIATION TOLERANT ANALOGUE MIXED SIGNAL TECHNOLOGY SURVEY
AND TEST VEHICLE DESIGN FOR COSMIC VISION (ESA TRP)
ARQUIMEA responsibilities:
• Project prime contractor.
• Analog and digital design
• Lay-out
• PA requirements
• ASIC verification testing
FRONT-END READOUT ASIC TECHNOLOGY STUDY AND DEVELOPMENT
TEST VEHICLES FOR FRONT-END READOUT ASICS (ESA TRP)
ARQUIMEA responsibilities:
• Project prime contractor.
• Analog and digital design
• Lay-out
• PA requirements
• ASIC verification testing
AMICSA 2010
ESTEC

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
HYDE-GASPARD collaboration areas (through the Spanish
Delegation support):
– Particles detection ASICs (high proximity readout electronics).
OPTIMISE/APOLO (Catrene labeled project):
– ARQUIMEA participates in the project OPTIMISE as a new partner proposing rad-hard ASIC structures in deep submicron technologies .
AMICSA 2010
ESTEC

INITIAL
ANALISYS
HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
PRE-DESIGN DESIGN
FPGA
IMPLEME
NTATION

HIGH POWER DISTRIBUTION, CONTROL AND MONITORING ASIC (SMART POWER) FOR SPACE
RAD-HARD FPGA design and implementation: MEIGA/MetNet DUST SENSOR, (INTA,
Spain).
Digital ASIC implementation in FPGA for design verification: REDSAT (EADS CASA
ESPACIO, Spain).
FPGAs for Hardware Accelerator for Cryptography (Spanish Defence Department, Spain).
FPGAs for Touch-less Optical Sensors Technologies for Biomedical applications. (TBS,
Switzerland).
FPGA Applications for CPLD testing Coolrunner-II (INTA, Spain).
VHDL design for the 8279 (SEDECAL. Spain).
FPGA for interface communications for the 8031microcontroller. (ThyssenKupp
Elevadores, S.A., Spain)