Waiving Known DRC Violations from
Layout IP
John Ferguson
Technical Marketing Engineer
Mentor Graphics Corp.
The Problem

Due to Process Limitations the Number of DRC
Rules is Growing
—

Rule Complexity is Also Growing
Difficulty in Defining Rules to Capture Failure
Configuration Leads to Over Constrainment
—
Many ‘Errors’ Can Actually Yield Well
Additional Metal DRC Rules
3 Layer Metal DRC Rules

Meeting all Design Rules is Difficult if Not
Impossible
AE Training – mbDRC – Advanced Checks are simple
2
Manifestation: DRC “Waivers”

Waivers = Real DRC Violations That are Allowed
in a Design Layout for Mask and Chip
Manufacturing

Examples:
Historic IP Block Has Been Manufactured Clean for
Years. Now with New DRC Rules, It Fails.
— Certain Blocks (Memories) Take Advantage of Rigid
Design Approach. Fail Standard Logic Rules, But
Will Manufacture at a Reasonable Yield.
— Block is DRC Clean, but Has “Recommended Rule
Violations” that Cannot be Fixed Without
Generating DRC Violations
—
AE Training – mbDRC – Advanced Checks are simple
3
Traditional IP Waivers Dilemma
IP Provider (e.g. ARM, Virage, etc.)
Foundry (e.g. TSMC, UMC, etc.)
Can I waive these?
Sure, why not.
Runs DRC
Gets Results
Phones Foundry
Delivers IP to Customer
What is with this
IP you sold me!!.
What do you mean? Foundry said I could waive!
Can I waive these?
Let’s call him together and waste What?!? Heck No!!
tons of your time sorting thi out!
Designer:
Integrates IP into Design
Gets Results
Manually Reviews All
Why so many in IP??
Phones Foundry
Phones IP Provider
Fabless (e.g. Broadcom, Qualcomm, etc.)
AE Training – mbDRC – Advanced Checks are simple
4
Historic Approaches to Try to Solve the
Problem

Black-Box the IP During DRC
—
—
—

Fast RunTimes
False Results Eliminated
Missed Real Errors
Remove Results Per Block Per Cell
—
—
—
At DRC Runtime or Post-Process
No Missed Real Errors
Many False Errors Still Exist
AE Training – mbDRC – Advanced Checks are simple
5
Issue: Interaction Errors Between Waived Cells
Can be Incorrectly Waived
Identify Blue Inside Waived Cell
Waive Spacing Errors Between Identified Shapes
Waived Cell
Waived Result
Errors from Interactions
Also Waived
X = M1 NOT INSIDE CELL A
Y = M1 INSIDE CELL A
Check {EXTERNAL X < .2
EXTERNAL X Y < .2}
AE Training – mbDRC – Advanced Checks are simple
6
Result Promotion
Unique Errors
Reported at Top
Results Not Consistent with All Instances:
Reported at Top
Waived Cell
Waived Result
Results No Longer Associated
with Waived Cell
Waivers Do Not Apply
AE Training – mbDRC – Advanced Checks are simple
7
Proposed DRC Waiver Flow

The Waiver Flow is a 2-Step Process
1.
Waiver classification:
Cell
Library
Waiver_flow
Identify Waived Results within Cells
Cell
Characterization
Rules
2.
Chip level run:
Merge chip database with waived results
Distinguish waived results by waiver
requirements during DRC
Remaining results output
Also capture all waived results for record
keeping
AE Training – mbDRC – Advanced Checks are simple
Cell
Library
W/
Waivers
Waiver Setup
File
Chip Verification
Chip
GDSII
Results
Final Results
Waived Results
Unused waivers
8
Solving the IP Waiver Dilemma
IP Provider (e.g. ARM, Virage, etc.)
Foundry (e.g. TSMC, UMC, etc.)
Can I waive these?
Runs DRC
Gets Results
Phones Foundry
Delivers IP to Customer
Sure, why not.
Designer:
Integrates IP into Design
Gets Results
Waived Results Removed!
Goes Home Early for the Day!
Fabless (e.g. Broadcom, Qualcomm, etc.)
AE Training – mbDRC – Advanced Checks are simple
9
Typical Flows Representing 3rd Party Foundry
& IP Provider
IP Block Containing
Errors to Waive
3rd Party IP with Waivers Embedded into Design
Foundry
Golden
Rules
Waiver Setup
File
Waivers Merged with IP
By IP Provider
Rules from Foundry
Other Files Created by IP Provider
waiver_flow
DRC
Cell
Chip Verification
Characterization
Waiver
Description
File
Waivers Stripped from Final Results Using Info from Waiver Files
IP with Waivers and Waiver Files Passed to Customer By IP Provider
Purchased /
Reused IP
AE Training – mbDRC – Advanced Checks are simple
10
Proposed Waiver Flow
DRC
DRC
Debug
Debug

The Proposed Waiver Flow Provides a Automated
Communication Channel Between Foundry, IP
Providers and Designers for Significantly Reducing
Design Debug Time by Eliminating the Reporting
of Known and Waived Errors from IP Blocks

Unlike Historic Approaches, The Waiver Flow
Requires Little Effort by the Designer and
Minimizes the Risk of Missed Real Errors without
Increasing the Reporting of False Errors
AE Training – mbDRC – Advanced Checks are simple
11
Waiver_Flow: Capturing the Waivers
at the IP Level
waiver_flow:
Capturing the Cell Results to Waive
A
B
C
ALL
foo
bar
rules
waiver_flow waiver_setup
Chip or
Cell Lib
A
B
C
./Waiver_results/A/
DRC_RES.db
All Rule Results
./Waiver_results/B/
DRC_RES.db
./Waiver_results/C/
All Rule Results
DRC_RES.dbAll
Rule Results
Waiver.gds
Waived
Results Only
Ascii Result May be Edited to Selected Results Only
Optionally Create New Library with Original Lib and Waivers Merged
AE Training – mbDRC – Advanced Checks are simple
13
Minimizing Reserved Layers


Creates Empty Cell for Each Waived
Cell Name
Instantiates Child Cell into Waived
Cell
—
—
—
<waiver_keyword>_<check_name>_< orig cell
name>
Once Cell For Each Waived Check
All Results on Specified Layer from waiver_setup



Cell Nand2_2x
Cell =
Subsequent DRC Differentiates Results by Cell Name waive$$_PO.W.R.2_in_Nand2_2x
waive$$_PO.W.S.5_in_Nand2_2x
Only One Reserved Layer Required!
Output Library GDS Files Merges
Waiver.gds with Original Cell Data
—
—
Waiver Cells Instantiated
Added Cell Naming Convention Remains Intact
AE Training – mbDRC – Advanced Checks are simple
14
Waiving from Chip Level
Removal of Waivers

The Removal of Waived Results from Real Results
is Done at the Time of Running DRC
Determined by Pattern Matching Previously
Captured IP Waivers to Chip Level Results for the
Same Rule
— DRC Hierarchical Engine Resolves Issues of Results
Promotion
—

The Pattern Matching is Determined through the
Setup File
—
As Qualified Per Check by the Foundry or Fab
AE Training – mbDRC – Advanced Checks are simple
16
Pattern Matching Criteria:
Handling Multiple Overlaps
IP Block
Original IP Should Final
Generated
Result be
Parent
Level
Waivers
Waived?
Results
(pre-waived)
Context
Waiver Setup Specifies Handling of Multiple Overlaps
AE Training – mbDRC – Advanced Checks are simple
17
Tolerances for Waiver Overlap?
Chip
IP Block
IP Waiver
Should the Green Results Still Be Waived?
Waiver Setup Specifies Required IP Waiver to Chip Error Pattern Matching
AE Training – mbDRC – Advanced Checks are simple
18
Allowing Tolerances for Waiving
Chip
IP Block
Chip level result
IP Waiver
Allowable Difference?


Waiver Setup Specifies Chip Error to IP Waiver
Pattern Matching Criteria
A Result is Either Fully Waived or Not Waived
—
No chopping of results
AE Training – mbDRC – Advanced Checks are simple
19
Example 1
inv_1
inv_1 in Layout
Full-chip result
A single waiver interacts
with the result
m1_space_waiver
The waiver matches the
result exactly
The result matches the
waiver exactly
AE Training – mbDRC – Advanced Checks are simple
20
Example 2

Waiving Will Depend On the Specification of the
Waiver to Result Matching
inv_1
inv_1 in Layout
Full-chip result
A single waiver interacts
with the result
m1_space_waiver
The waiver is not fully
covered by the result
The result is fully covered
by the waiver
AE Training – mbDRC – Advanced Checks are simple
21
Example 3

Waiving Will Depend On the Specification of the
Result to Waiver Matching
inv_1
inv_1 in Layout
Full-chip result
m1_space_waiver
AE Training – mbDRC – Advanced Checks are simple
22
Example 4

Waiving Will Depend On the Specification of the
Waiver to Result Matching AND Count Tolerance
inv_1
inv_1 in Layout
m1_space_waiver
AE Training – mbDRC – Advanced Checks are simple
23
Summary

The Proposed Waiver Flow Provides Significant Value Over
Historic Automated Approaches to Waiving DRC Violations
—
—
—
—
—
—
All Waived Results Automatically and Accurately Waived at
DRC Run Time
Enables Passing of IP Between 3rd Parties with Waiver
Information in Tact
Enables Foundry to Specify Acceptable Waiving Tolerances
Per Rule Per IP
Eliminates Need for Rule File Modifications
Works from Standard GDSII, No Proprietary Formats
All Waived Results Captured for Final Review and Tracking
AE Training – mbDRC – Advanced Checks are simple
24
AE Training – mbDRC – Advanced Checks are simple
25