Complex interlaced infrastructure onboard testing: how much real scale testing should be needed? 11th UIC ERTMS Conference, Istanbula 1-3 April 2014 Current situation: Positive messages 1 ERTMS will be the worldwide standard for rail signaling for the next decades 2 ERTMS will be deployed in European core and comprehensive corridors 3 ERTMS Specifications are stable enough and properly managed by ERA • Baseline 2 (2.3.0.d) is an stable version in successful commercial operation in many European and non-European countries (Spain, Italy, Switzerland, The Netherlands, China….) ERTMSalready Atlas 2012 published into the TSI • Baseline 3 hasUICbeen (3.3.0) and it includes some added functionality (braking curves, crossing level, limited supervision…) as well as bugs debugging. Laboratory Validation & Operational scenarios • • Baseline 2 (2.3.0.d) is an stable version in successful commercial operation in many European and nonEuropean countries (Spain, Italy, Switzerland, The Netherlands, China….) Baseline 3 has been already published into the TSI(3.3.0) and it includes some added functionality (braking curves, crossing level, limited supervision…) as well as bugs debugging. Main pending challenges: time and money 1 ERTMS costs are too high • Increase market scale √ • Increase competition (multiple suppliers) • Very high deployment costs (tests on track) √ Increase system complexity 2 Too long process to place in service Operational and train-track integration tests on lab: • Reduce time • Reduce cost • Increase system reliability • Advance “last minute problems” (always appeared in the signaling world). ERTMS works!!! ERTMS reliability and punctuality in Madrid-Barcelona HSL Kms between incidences 35000 30000 25000 Level 1 Level 2 Cumulative L1 Cumulative L2 20000 Punctuality (delay <5’) 15000 10000 5000 0 Level 1 2006 2007 2008 2009 2010** 2011 2012***2013 2014 Level 2 2011* 2012 2013 2014 * L2 started in October 2011 ** Line was extended in L1 up to Barcelona *** Line was extended in L1 up to French border 100.00% 99.00% 98.00% Level 1 97.00% Level 2 96.00% 95.00% Level 1 2006 2007 2008 2009 2010 Level 2 2011 2012 2013 2014 2011 2012 2013 2014 3. How to solve interoperability problems before placing in service a new line? SYSTEM AUTHORITY AND INTEROPERABILITY (IOP) TESTS Within the new European frame where the operators and infrastructure are separated, it is essential the existence of a System Authority to manage the solution of interoperability Operational and train – problems. IOP TESTS track integration TESTS MFOM has played this role in the Spanish ERTMS projects. The group led by MFOM (ADIF, RENFE, CEDEX and INECO) has created the validation procedure that allows the opening of railway lines with full warranties of interoperability. NATIONAL AUTHORITY: Ministry of Fomento (Public Works) Independent Assesment INFRASTRUCTURE MANAGER 5 OPERATOR 3. How to solve interoperability problems before placing in service a new line? Integration Tests. Main Tested Functionality • • • • • • • • • • • • • • • Speed supervision and braking curves Level transitions Mode changes TSR Managing Managing of MA timers Odometry Track conditions Train Interface unit ATO and preset speed DMI National Functions Maximum Speed for exploitation with free route ahead Degraded situations (loss of comunications, balise group lost, etc) EoA override RBC Handover 3. How to solve interoperability problems before placing in service a new line? To achieve full interoperability two options are possible: 1. Performing INT tests once the whole system is installed on the track. 2. Advance interoperability issues by performing INT tests in a lab and after solving the problems appeared, running INT tests on track. This is the selected way in Spanish Projects Radio Block Centre (RBC) GSM-R ETCS Onboard Unit Interlocking Eurobalises (Fix) End of section 3. How to solve interoperability problems before placing in service a new line? • CEDEX Rail Interoperability Lab is the first laboratory in the world accredited for certifying ERTMS components and for testing ERTMS lines. • The laboratory was created in 1999. It is has been the pioneer on testing ETCS components and subsystems and it has tested equipment's from almost all ERTMS worldwide suppliers. • The laboratory has actively participated in the process of placing in service ERTMS in the Spanish High Speed and Conventional Lines (Madrid commuter lines). • The laboratory has designed, together with Adif, Renfe and the Ministry of Fomento, the set of INT tests (around 200 tests) which really guarantee full interoperability. 3. How to solve interoperability problems before placing in service a new line? On-board subsystem • Components specification, including functional tests specification – Subset-076 • Tests defined for the whole lifecycle (almost) • Components specification • No functional tests for key components (RBC) • ETCS Language too flexible: lack of procedures to validate ETCS trackside implementations Trackside subsystem 3. How to solve interoperability problems before placing in service a new line? IN THE MID-LONG TERM: • Develop functional test specifications for the (generic) RBC. • Develop procedures for verification of the trackside ETCS engineering from the design phase (project specific). • Insist on the operational harmonization, keeping in mind the strong relationship among operational rules, ETCS functionality and ETCS language syntax. IN THE SHORT TERM: • Bring the final project specific integration/interoperability tests into the laboratory to perform Operational and Train-Track integration tests with real ETCS components (ETCS OBU and/or RBC) 4. Testing the line in the laboratory. The real track data and configuration is introduced into the real Radio Block Center (RBC)……… Track layout, switches, signals, track circuits... 4. Testing the line in the laboratory. And the real RBC is connected to the laboratory 4. Testing the line in the laboratory. The real train data are introduced into the real On Board Unit (EVC)….. Braking capacity, brakes activation, train interface unit (odometry, pantograph, main switch)….. 4. Testing the line in the laboratory. And the real On Board Unit is connected to the laboratory 4. Testing the line in the laboratory. RBC and OBU are integrated and tested in the lab connected to all the simulators reproducing: a) the real train dynamics and b) track circuits occupancy, interlocking selected routes and balise telegrams. Real RBC Dimetronic Madrid – Levante Line Real EVC ALSTOM Simulators with real project data for: • Interlockings • Train dynamics, • Train odometry • Track circuits and switches • Routes. • Balise telegrams……. 4. Testing the line in the laboratory. USE OF COMMON FORMATS AND INTERFACES 4. Testing the line in the laboratory. Route Map Controller (RMC) (active) Define signal aspects Define points position Tra ns to L1 Cond. Tra ns (L2- L1- L0) Tra ns to L1 + ra dio session Tra ns to L0 Ra dio cancel Ra dio session EID RBC Thales EID1 ETCS N 1+ N 2 ETCS N 1 ETCS N 1+ N 2 ETCS N 1 ATOCHA (SS-112) Route Map Controller (RMC) (passive) Track Occupation Routes’ dialog Track occupation IXL (CITEF) RBC Invensys-Siemens Track layout, switches, CHAMARTIN (SS-112) signals, track circuits... ERTMS/ETCS ON-BOARD EQUIPMENT EVC ODO TIU JRI STMI RTM EVC Adaptor Ada p TCL TDA-A CMD-A ODO-A TIU-A TDS SSS CMS LSC TMS LER Test Layout for independent RBC / EVC integration tests Map to SS-111 Architecture LSE TIS LTM BTM EL-A EB-A DMI JRS ALSTOM EVC SS-094 Architecture JRI-A SCS RCS LCS BCS SMS RMS LMS BTS TCP-IP Radio REPORT AET Network Isdn Simulator isdn ERSA DIS REFERENCE TEST FACILITY CMD Peri ph TDA EQUIPMENT UNDER TEST Signal aspects Point pos. 4. Testing the line in the laboratory. Route Map Controller (RMC) ATOCHA & CHAMARTIN SS-112 unified Tra ns to L1 Cond. Tra ns (L2- L1- L0) Tra ns to L1 + ra dio session RBC Invensys-Siemens Routes’ dialog Track occupation Tra ns to L0 Ra dio cancel Ra dio session RBC Thales EID IXL (CITEF) EID1 ETCS N 1+ N 2 ETCS N 1 ETCS N 1+ N 2 ETCS N 1 ERTMS/ETCS ON-BOARD EQUIPMENT EVC TDA-A CMD-A ODO-A TIU-A TDS SSS CMS LSC TIS JRI STMI RTM LTM BTM EL-A EB-A DMI Peri ph TIU ODO JRS SCS RCS LCS BCS SMS RMS LMS BTS DIS TCP-IP Radio TMS LER Network AET Simulator ERSA LSE REPORT PABX RDSI RDSI RDSI RDSI ISDN-IP Test Layout for handover tests between RBCs ALSTOM EVC SS-094 Architecture JRI-A Invensys / Thales HO Com. channel REFERENCE TEST FACILITY EVC Adaptor CMD Ada p TDA EQUIPMENT UNDER TEST Track layout, switches, signals, track circuits... Track layout: Project data in unified format (SS-112). Madrid-Valencia line: Horcajada station TRACK / LAB COMPARISON: LABORATORY VALIDATION 4. Testing the line in the laboratory. Laboratory Validation CEDEX ERTMS lab has been previously validated by comparison between the simulated and the real results. This validation it is needed to guarantee a full confidence in the lab results and to assure a correct signaling system behavior during the commercial exploitation. TRAFFIC SIMULATOR ERTMS L2 LABORATORY 4. Testing the line in the laboratory. Laboratory validation DEFINITION OF THE OPERATIONAL SCENARIO FOR LABORATORY VALIDATION VLD SES PCA 637 - 640 713 E1 S1/1 - 716 E4 E1 E4 S1/1 SR E3 E2 S1/2 S2/2 E2 E3 E3 715 639 Speed FS 714 638 S2/2 E2 S2/1 716 FS S1/4 E1 S2/1 640 S1/2 S2/3 S1/3 713 637 E4 VRU Trip between Valdemoro y Villarubia stations Trackside: Dimetronic / Onboard: Siemens S2/3 S1/3 PCA S2/4 S1/4 S2/4 MRSP Bra king FS SB SR D_LRBG Cur ve TR D_LRBG L_DOUBTUNDER L_DOUBTOVER FS PT SR Distance 4. Testing the line in the laboratory. Laboratory validation COMPARISON OF THE CALCULATION OF PERMITTED SPEEDS (L1) Permitted Speed Permitted Speed Vía Permitted Speed Lab 300 Vpermitica (km/h) 250 200 150 100 50 0 40000 45000 50000 55000 60000 65000 DTeórica (m) 70000 75000 80000 85000 90000 4. Testing the line in the laboratory. Laboratory validation D_LRBG (m) COMPARISON OF THE ESTIMATION OF TRAVELLED DISTANCES X(i) 4. Testing the line in the laboratory. Laboratory validation COMPARISON OF BRAKING CURVES: TRACK; LABORATORY & LIF & ERA MODELS 4. Testing the line in the laboratory. Laboratory validation DEFINITION OF THE OPERATIONAL SCENARIO FOR LABORATORY VALIDATION Validation trip in LEVEL 2 Trip between Nuevos Ministerios and Atocha commuter stations Atocha Trackside: Thales / Onboard: Alstom Atocha Nuevos Ministerios Level 2 Laboratory validation operational scenario for the commuter lines of Madrid: Train starting at the Balise Group 8102 (associated to signal S2/6M). Track free until signal S32 (Balise Group 8102) that will take free aspect when train approaches. Once S32 shows green aspect the signaling system will allocate track free until Atocha Atocha entry signal E6 shows non proceed aspect 4. Testing the line in the laboratory. Laboratory validation Speed Validation trip in LEVEL 2 Distance Permitted Speed Lab Permitted Speed Track BG Track BG Lab Track MA Lab MA P24 Lab P24 Track P136 Lab P136 Track 5. CEDEX Rail Interoperability Lab . RIL Eurocab Laboratory EVC Certification Placing in service Project data bases Assesment & Maintenace Traffic Simulation Laboratory Level 2 tests 2.3.0 “d” Migration Train-track integration tests Operational tests Remote connections Eurobalise and BTM Laboratory Eurobalise certification Antenna/BTM Certification Euroloop Certification Eurobalise Assesment Energy Laboratory CEDEX-CIEMAT Energy storage Power electronics New sources of energy Management of energetic resources 5. CEDEX Rail Interoperability Lab . RIL Eurocab Laboratory • • • • • • • • European Test campaigns Alstom Ansaldo Bombardier Dimetronic Siemens VUZ (Chech Republic)* CAF* Eurobalise and BTM Laboratory Traffic Simulation Laboratory Level 1: • Ansaldo • Thales • Dimetronic • Alstom Level 2: • Thales • Dimetronic • General Electric* • Ansaldo* • CAF* Infrabel European Cross tests • • • • • • • • • European Test campaigns Alstom Ansaldo Bombardier Siemens Thales Digitek Beijing Microunion Hitachi Energy Laboratory CEDEX-CIEMAT • • • • • • • • • Kyosan (Japan) Shingwooeng (Korea) CARS (China Academy of Railways Science) Beijing Hollysysy (China) Beijing Jioda Signal Beijing Railway Signal Lanxin (China) Casco (China) CAF* EUROBALISE LABORATORY European Test Specifications (SS 085) were debugged at CEDEX lab (2004) EUROLOOP LABORATORY CEDEX Euroloop lab is the first independent lab performing these tests TRAFFIC SIMULATION LABORATORY THALES RBC DIMETRONIC / SIEMENS RBC ALSTOM European Cross Tests are EVC being run at CEDEX lab Tra ns to L1 Cond. Tra ns (L2- L1- L0) TEST LAY-OUT TO TEST THE LEVEL 2 ON THE COMMUTER LINES OF MADRID (MINISTRY OF FOMENTO) Tra ns to L1 + ra dio session Tra ns to L0 Ra dio cancel Ra dio session EID EID1 ETCS N 1+ N 2 ETCS N 1 ETCS N 1+ N 2 ETCS N 1 EUROCAB LABORATORY Eurocab lab for certifying EVCs against european specifications. CEDEX is the leader of the European Group creating these specifications (SS076) 5. CEDEX Rail Interoperability Lab . EUG CROSS TEST BETWEEN COMMERCIAL PROJECTS Using remote connection between EBC and EVC for level 2 RBC-EVC connection according to S111 EVC B2 Siemens B2 MER MEC B2 CAF Signalling B3 MER MEC Lab DLR MultitelItalcertifer Cedex Multitel 01/09/13 31/10/13 01/01/14 28/02/14 01/04/14 30/05/14 2014 (TBC) Cedex 01/01/14 28/02/14 N/A 01/06/14 31/07/14 2014 (TBC) Alstom 01/11/13 31/12/13 01/03/14 30/04/14 N/A 2014 (TBC) RFI N/A 01/05/14 30/06/14 01/08/14 30/09/14 2014 (TBC) Line Track data in SS112 and OTCs linked to the line L1 Infrabel line (L36-36N) L2 ADIF line (MadridValencia) L2 ProRail line (Betuwe line) L2 RFI line (MilanoBologna) RBC N/A Siemens (formerly Invensys) Alstom Ansaldo N/A (Track data directly loaded in the EVC lab) 6. Conclusions. CONCLUSIONS 1. At the time being, ERTMS reliability and punctuality in Spain is very high, it is really comparable with the mature national systems previously installed in HSL(LZB,TVM). 2. By following the proposed test procedure, the whole ERTMS line functionality is tested in advance. 3. All interoperability problems appeared between the track subsystem supplier and the On board subsystem supplier are previously solved. 4. In all Spanish ERTMS lines, once the integration tests have been successfully completed, not any important interoperability issue has appeared during the commercial exploitation. 4. CEDEX lab has already performed these tests in all Spanish ERTMS lines. It is the European first Reference lab (and therefore the first lab in the world) in this area and it has tested ERTMS equipments from almost all the world suppliers. 5. Before placing in service any new line, integration tests will be also run on track, but these tests will be strongly supported by the integration tests at lab. This is the way of avoiding any “last minute” problems. THANKS A LOT FOR YOUR KIND ATTENTION CEDEX Rail Interoperability Laboratory Testing real projects signalling system at the Railway Interoperability Laboratory (LIF) of CEDEX CEDEX ( Studies and Research Center of the Ministry of Public Works and Transport-Fomento) Madrid, April 2014 Jaime.tamarit@cedex.es Jorge.iglesias@cedex.es