*********************** VLSI PD COMMANDS *******************************
Lib_path :
Block_name :
Importing a design
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Invoke tool – fc_shell
Open_lib < lib_path> .
List_blocks
Open_block <block name>.
start_gui
Save_block <any name.nlib> { saves the changes to current design}
Save_block -as < any name> { saves the changes as new block with out changing
current design}
Close_lib -all
Close_block -force
Exit { if you want to exit shell }
sanity checks
{before starting the PNR do this sanity checks in the design}
It should be clean before implementation
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Check_netlist
Check_timing
Check_design
FLOORPLAN
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****** command will create the shape of the block rectilinear with offset value ******
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initialize_floorplan -core_utilization 0.75 -core_offset {L T R B}
***** command will create the shape of the block rectilinear with offset value and we use
aspect ratio if we want to change the shape of the block *****
* initialize_floorplan -core_utilization 0.75 -core_offset {L T R B} -side_ratio {3 2} [ W/H ]
******** command will create the required shape of the block with offset value ********
{by using the side ratios we can form the shape of the block like T,L ect.}
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initialize_floorplan -core_utilization 0.75 -core_offset {L T R B} -side_ratio {side_a side_b
side_c side_d side_e side_f} -shape T/L
initialize_floorplan -core_utilization 0.75 -shape T -side_ratio {2 1 3 1 3 1} -core_offset
{100 100 100 100 100 100 100 100}
{man initialize_floorplan}
******* command will create the shape of the block with req shape and we can change the
orientation of the block ******
* initialize_floorplan -core_utilization 0.75 -core_offset {L T R B} -side_ratio {side_a side_b
side_c side_d side_e side_f} -shape T/L -orientation N/S/E/W
######## set routing direction for metal layers in the block ########
{check the given metal layers and set the routing direction for it. No of metal depends on design}
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set_attribute [get_layers {M1 M3 M5 M7 M9}] routing_direction horizontal
set_attribute [get_layers {M2 M4 M6 M8}] routing_direction vertical
######### create pin guide for the placement of ports ########
{before placing the I/O ports create the pin guide in between die & core area for the placement
of ports by using the create placement blockage [bbox] in the toolbar}
{by using the get attribute command will get the bbox values of the blockage to create the pin
guide with that bbox values}
or
{by placing the cursor at that point in the die area & core area {llx lly & urx ury} we will get the
values of the bbox in description we can specify that in the boundary values2}
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get_attribute [get_selection] bbox
create_pin_guide -boundary {{0 360} {1 570}} -layers {M3} -name inputports [get_ports filter "direction == in"]
create_pin_guide -boundary {{859.3680 180} {860.3680 570}} -layers {M3} -name output
ports [get_ports -filter "direction == out"]
################ place pins #################
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place_pins -ports [get_ports -filter "direction == in"]
place_pins -ports [get_ports -filter "direction == out"]
******** This command will place the I/O ports without any pin guide or blockages *******
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place_pins -self
******* By this command we can removes the blockages and pin guides created for I/O
placement ******
{we can remove pin guide and placement blockages once ports placed in the design}
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remove_placement_blockages -all -force
remove_pin_guides [get_pin_guides {inputports/ outputports}]
remove_pin_guides -all
######## Place macros in the core area with the guidelines #########
{place them based on hierarchy & all the sub hierarchy should be place together in the core
area for better results}
{check the fly line connectivity of all the macros, std cells, I/O in the design and place them}
{Manually we should place all the Macros in the core area no need to align it to site rows}
{We can change the orientation of the macro but 90 & 270 is not allowed}
******** by using the set app option we can place macros in the design *******
* set_app_option -list {plan.macro.macro_place_only {true}}.
* create_placement -floorplan
{all the macros will place inside the block by tool}
************* By this command we can get all the macros names in the shell **************
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get_cells -hierarchical -filter "is_hard_macro == true"
get_cells -physical_context -filter "is_hard_macro == true"
*************** This command will give the number of macros in the gui *****************
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sizeof_collection [get_cells -hierarchical -filter "is_hard_macro == true"]
sizeof_collection [get_cells -physical_context -filter "is_hard_macro == true"]
*************** This command will select all the macros at a time in the gui *************
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change_selection [get_cells -hierarchical -filter "is_hard_macro == true"]
change_selection [get_cells -physical_context -filter "is_hard_macro == true"]
Or
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ctrl+shift+m
{fix all the macros at a time by this command}
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set_fixed_objects [get_selection]
{first select all the macros and then fix them by this command}
**************** By this command we can unfix the fixed cells in the design ***************
set_fixed_objects [get_selection] -unfix
################# Keepout_margin ##################
{provide keepout margin to the macros in the design} {man for more switches}
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create_keepout_margin -type hard -outer {1 1 1 1} [get_selection]
create_keepout_margin -type hard -outer {2 2 2 2} [get_cells -filter design_type ==
macro]
remove_keepout_margin [get_keepout_margins]
{if M1 rails are crossing the keepout margin then use this command}
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create_keepout_margin -type routing_blockage -outer {2 2 2 2} [get_cells -filter
design_type == macro]
{after this remove the routing blockage and execute the keepout margin}
################## Place physical only cells ##################
{its optional these are pre placed cells we can place after powerplan or we can place in floor
plan as well}
[Note: First place the boundary cells then tap cells in the design]
We will insert spare cells and de cap cells at floorplan stage at some given window
******** creating BOUNDARY CELLS ********
{this command will bring all the cells with FILL name}
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get_lib_cells */*FILL*
******** set the rules for the boundary cells in the design before placing **********
set_boundary_cell_rules -left_boundary_cell saed32_hvt_std/SHFILL1_HVT right_boundary_cell saed32_hvt_std/SHFILL1_HVT
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create_boundary_cells -left_boundary_cell saed32_hvt_std/SHFILL1_HVT right_boundary_cell saed32_hvt_std/SHFILL1_HVT
sizeof_collection [get_cells *boun*]
******** creating TAP CELLS ********
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create_tap_cells -lib_cell saed32_hvt_std/SHFILL1_HVT -distance 30 -pattern stagger
create_tap_cells -lib_cell saed32_hvt_std/SHFILL1_HVT -distance 30 -pattern stagger skip_fixed_cells
sizeof_collection [get_cells *tap*]
[Note : check_legality {after the placement of tap & boundary cells in the design}]
************** By this command we can change the status of the required tap cell or any
cell in the design *************
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set_placement_status placed tapfiller!SHFILL1_HVT!20151
************** By using this command if we have any legality after the physical cells placed
it will overcome *************
{by using this command we can overcome the overlaps while placing tap cells in the design. if
we have any overlaps with boundary cells while placing we can use this switch to overcome}
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create_tap_cells -lib_cell saed32_hvt_std/SHFILL1_HVT -distance 30 -pattern stagger skip_fixed_cells
or
{we can manually move the overlap cells tap cell to some micros distance from each other}
################## checks after floorplan ###################
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check_mv_design
Check_legality
check_pin_placement
Macro_grid_alignment_check in gui
Port_placement_check in gui {perfectly aligned to track or not}
check_boundary cells :*************** Verifying Boundary cells ***************
{set the boundary cell rules then verify it}
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set_boundary_cell_rules -left_boundary_cell saed32_hvt_std/SHFILL1_HVT right_boundary_cell saed32_hvt_std/SHFILL1_HVT
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check_boundary_cells -error_view [get_cells *BOU*] or
check_targeted_boundary_cells -target_objects [get_cells boundraycell!SHFILL1_HVT!*]
################## Reports after floorplan #################
{create_utilization for required aspect we need by using this command then check it}
{we can include or exclude the required option when creating}
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create_utilization_configuration -capacity core_area config1
Report_utilization -capacity core_area config1
Report_utilization
Report_design