EC600M-CN QuecOpen Reference Design LTE Standard Module Series Version: 1.2 Date: 2023-02-24 Status: Released EC600M-CN_QuecOpen_Reference_Design 0 /5 LTE Standard Module Series At Quectel, our aim is to provide timely and comprehensive services to our customers. If you require any assistance, please contact our headquarters: Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local offices. For more information, please visit: http://www.quectel.com/support/sales.htm. For technical support, or to report documentation errors, please visit: http://www.quectel.com/support/technical.htm. Or email us at: support@quectel.com. Legal Notices We offer information as a service to you. The provided information is based on your requirements and we make every effort to ensure its quality. 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EC600M-CN_QuecOpen_Reference_Design 2 /5 LTE Standard Module Series About the Document Revision History Version Date Author Description - 2022-04-27 Andy ZHAO Creation of the document 1.0 2022-08-31 Andy ZHAO First official release Andy ZHAO Updated related information of ADC interface: Added ADC voltage divider and related notes (Sheet 3); Updated ADC voltage domain from 1.8 V to 1.2 V (Sheet 1 and 3). Howell KANG 1. Updated the UART Level-shifting Circuit in IC Solution (Sheet 7). 2. Added a note about the capacitors of the signal pins (Sheet 13). 1.1 1.2 2022-09-14 2023-02-24 EC600M-CN_QuecOpen_Reference_Design 3 /5 LTE Standard Module Series Contents About the Document .................................................................................................................................. 3 Contents ...................................................................................................................................................... 4 1 Reference Design ................................................................................................................................ 5 1.1. Introduction ............................................................................................................................... 5 1.2. Schematics ............................................................................................................................... 5 EC600M-CN_QuecOpen_Reference_Design 4 /5 LTE Standard Module Series 1 Reference Design 1.1. Introduction This document provides the reference design for Quectel EC600M-CN QuecOpen® module. 1.2. Schematics The schematics illustrated in the following pages are provided for your reference only. EC600M-CN_QuecOpen_Reference_Design 5 /5 5 4 3 2 1 Block Diagram MCU D Main Antenna EC600M-CN D Bluetooth Antenna ANT_MAIN Main UART VDD_MCU VDD GPIO06 PWRKEY VBAT_EN GPIO01 GPIO07 RESET_N VBUS_CTRL GPIO02 GPIO08 CODEC_POWER_EN GPIO03 GPIO09 W_DISABLE# CAM_GPIO1_MCU GPIO04 GPIO10 AP_READY PCM Transistor I2C ASR5801 Headset or Handset ALC5616 WAKEUP_IN Circuit SPK MIC Handset Microphone C C CAM_GPIO2_MCU GPIO05 12-bit ADC 0–1.2 V ADC1 RESET_N Debug UART PWRKEY USB Test Points B Download Control UART Level-shifting Circuit USIM USIM Card × 2 CAM_SPI Matrix Keypad Camera Matrix Keypad 5×5 NET_STATUS/USB_BOOT SLEEP_IND VBAT GPIO1 NET_MODE NET_STATUS/USB_BOOT B Status Indication STATUS VDD_EXT 1.8 V / VDD_MCU LCM GND GPIO2 USB 2.0 SPI ADC0 USB 2.0 VBAT_BB Main UART 3.8 V/ 2.0 A VBAT VBAT_RF NOTE A A NOTE: A level-shifting circuit or a voltage-level translator TXS0108EPWR provided by Texas Instruments is recommended. Friday, February 24, 2023 Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 1 OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 Power System Block Diagram D D AUDIO_PA_EN EN TPA6205A1 USIM1_VDD e.g. DC 12 V Input DC-DC DC 5 V Output VBAT_EN DC 3.8 V @ 2.0 A MIC29302WU EC600M-CN USIM1 USIM2_VDD EN USIM2 C C CAM_VDD CAM_VDDIO VBUS_CTRL USB_VBUS MOS ON/OFF EN External LDO VDD_EXT Camera CAM_VDDIO LCD_VDD LCM LCD_VDDIO DC 3.3 V SGM2019-ADJYN5G/TR CODEC_POWER_EN CAM_VDD EN Codec B B ALC5616 DC 1.8 V SGM2019-ADJYN5G/TR VDD_EXT EN A A Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 2 OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 Module Interface D D [14] KP_MKIN[3] [18] NET_MODE [14] KP_MKOUT[3] [14] KP_MKIN[2] [18] STATUS [14] KP_MKOUT[4] [18] NET_STATUS/USB_BOOT AP_READY [4] R0341 NM-0R R0303 NM-0R KP_MKOUT[2] [14] R0312 0R R0349 0R WAKEUP_IN [4] R0314 NM-0R R0336 NM-0R KP_MKIN[1] [14] R0339 0R R0320 NM-0R AUDIO_PA_EN [17] 77 R0347 0R MAIN_DCD [7] 78 U0301-B 79 80 82 39 NM_0R 41 0R R0345 40 NM_0R R0340 42 R0308 43 0R 44 NM_0R R0322 46 0R R0332 45 R0301 48 NM_0R 47 R0326 49 0R 50 R0354 53 NM_0R 52 0R R0318 51 R0330 81 MAIN_DTR [7] 56 [15] I2C_SCL [13] BT_I2C_SCL MAIN_DTR MAIN_RI RESERVED13 RESERVED14 GND5 GND6 GND7 ANT_MAIN GND8 MAIN_DCD AP_READY WAKEUP_IN W_DISABLE# STATUS SLEEP_IND MIC_N GND9 SPK_P PWRKEY SPK_N RESET_N ADC1 GND10 GND25 GND11 GND24 GND12 GND23 GND13 GND22 GND14 GND21 GND15 GND20 GND16 GND19 GND17 GND18 38 91 90 89 88 87 86 85 VBAT 36 35 34 33 32 31 30 29 VBAT 28 USB_VBUS R0348 NM_0R BT_UART_RTS [13] R0306 0R MAIN_RTS [7] R0302 NM_0R R0304 0R R0305 NM_0R R0310 0R BT_UART_RXD [13] MAIN_TXD [7] R0311 NM_0R BT_UART_TXD [13] R0307 0R MAIN_RXD [7] BT_UART_CTS [13] MAIN_CTS [7] C R0309 NM-0R 3 27 26 2 25 MIC_BIAS 24 C0301 100nF MIC_P [8] 23 C0302 100nF MIC_N [8] 22 SPK_P [8,17] 21 SPK_N [8,17] 20 ADC1 [3] 19 ADC0 [3] L0301 USB_DM_TEST [18] 4 USB_DM [4] 1 USB_DP [4] DLM0NSN900HY2B NM-0R R0334 USB_DP_TEST [18] NOTE 1 GND1 U0301-C NOTE 3 [6] USIM2_RST 145 [6] USIM2_DATA 146 [6] USIM2_CLK 147 USIM2_VDD 148 [12] SPI_CLK B 92 EC600M-CN_QuecOpen 37 18 1 ADC0 CAM_VDD VDD_EXT 17 76 DBG_RXD CAM_PWDN VDD_EXT MIC_P CAM_SPI_DATA1 75 MIC_BIAS DBG_TXD 16 74 GPIO2 SPI_CLK [4,18] PWRKEY [4,18] RESET_N USB_DP CAM_SPI_DTAT0 73 GPIO1 CAM_SPI_CLK 72 USB_DM 15 [18] DBG_RXD USB_VBUS 14 71 EC600M-CN_QuecOpen CAM_VDDIO 13 [18] GPIO2 [18] DBG_TXD VBAT_BB LCD_SPI_CLK CAM_I2C_SDA 70 LCD_SPI_DOUT CAM_I2C_SCL 69 [18] GPIO1 GND2 U0301-A 12 68 CAM_VDDIO MAIN_RXD LCD_SPI_CS CAM_MCLK 67 [9] LCD_SPI_CLK LCD_RST 11 [9] LCD_SPI_DOUT MAIN_TXD 10 66 LCD_SPI_RS USIM1_DET 65 MAIN_CTS 9 64 LCD_TE USIM1_VDD [9] LCD_RST [9] LCD_SPI_CS GND3 MAIN_RTS USIM1_RST [9] LCD_SPI_RS VBAT_RF1 USIM1_DATA 63 GND4 PCM_CLK 8 62 PCM_DOUT 7 C PCM_DIN 84 VBAT_RF2 6 61 PCM_SYNC USIM1_CLK 60 I2C_SCL SPI_CS 59 SPI_TXD 58 5 57 NET_MODE I2C_SDA 83 4 [15] PCM_CLK KP_MKIN[0] [14] 0R 54 NM_0R [13] BT_PCM_CLK W_DISABLE# [4] NM-0R R0324 55 R0344 [13] BT_PCM_DOUT 0R R0325 MAIN_RI [7] [14] KP_MKIN[5] [15] PCM_DOUT R0355 NM-0R 0R NM_0R [13] BT_PCM_DIN 0R R0316 ANT_MAIN [11] R0342 [13] BT_PCM_SYNC [15] PCM_DIN R0343 NM_0R [13] BT_I2C_SDA [15] PCM_SYNC KP_MKOUT[0] [14] NET_STATUS/USB_BOOT R0329 NM-0R SPI_RXD [15] I2C_SDA R0315 R0327 3 [14] KP_MKOUT[5] NM-0R 2 NOTE 2 R0346 [12] SPI_RXD CAM_VDD [12] SPI_TXD CAM_PWDN [10] [12] SPI_CS CAM_SPI_DATA1 [10] [6] USIM1_CLK CAM_SPI_DATA0 [10] [6] USIM1_DATA R0337 NM_0R [6] USIM1_RST R0335 0R BT_HOST_WK_INT [13] CAM_SPI_CLK [10] USIM1_VDD R0333 NM_0R [6] USIM1_DET BT_LDO_EN [13] R0331 0R CAM_I2C_SDA [10] R0328 NM_0R BT_RST [13] R0323 0R CAM_I2C_SCL [10] R0321 NM_0R HOST_BT_WK [13] R0317 0R CAM_MCLK [10] USIM2_RST RESERVED1 USIM2_DATA RESERVED2 USIM2_CLK RESERVED3 USIM2_VDD RESERVED4 109 110 111 B 112 EC600M-CN_QuecOpen ADC VDD_MCU VDD_MCU NOTE: 1. A common mode choke L0301 is recommended to be added in series between the module and your MCU to suppress EMI spurious transmission, and it R0350 R0352 should be placed close to the module. Meanwhile, reserve the test points for upgrading the firmware over USB interface and minimize the extra ADC0 [3] stubs of the trace. The two resistors R0309 and R0334 should be placed close to the module to ensure the integrity of USB signal. R0351 2. NET_STATUS/USB_BOOT cannot be pulled down to low level before the module starts up successfully. C0303 1nF ADC1 [3] R0353 C0304 1nF 3. The voltage input range of ADC0 and ADC1 is 0–1.2 V. A voltage divider with resistance of more than 100 kΩ must be used for ADC interface application. The accuracy of the two resistors in each voltage divider affects the sampling error of the ADC. It is recommended to use resistors with an accuracy of 1 %; if the accuracy of the ADC needs to be higher, resistors with an accuracy of 0.5 % are recommended. A A 4. All GND pins should be connected to the ground, and unused and RESERVED pins should be kept open. 5. For details of GPIO multiplexing function, see the GPIO configuration document of the module. 6. Ensure there is a complete reference ground plane below the module. The ground plane should be placed as close to the module layer as possible, and at least four-layer design is recommended. 7. The 6.0.1 and above version of QFlash tool must be used for firmware upgrading. Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 3 OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 MCU Interface D D It is used to turn on/off the module. VDD 1 It is used to reset the module. VDD_MCU PWRKEY [3,18] TXD 3 TXD_MCU [7] 4 RXD_MCU [7] 5 CTS_MCU [7] 6 RTS_MCU [7] 7 RI_MCU [7] Q0404 DTC043ZEBTL [4] ON/OFF_MCU RXD CTS RTS RI DCD DTR USB_VBUS USB_D+ USB_D- 8 DCD_MCU [7] 9 DTR_MCU [7] 10 USB_VBUS C0404 10nF 12 It is used to set the module into the airplane mode. USB_DP [3] USB_DM [3] WAKEUP_IN [3] GPIO01 GPIO02 GPIO03 GPIO04 GPIO05 GPIO06 GPIO07 GPIO08 GPIO09 GPIO10 GPIO11 GPIO12 14 VBAT_EN [5] 15 VBUS_CTRL [4] 16 CODEC_POWER_EN [5] 17 CAM_GPIO1_MCU [10] 18 CAM_GPIO2_MCU [10] 19 ON/OFF_MCU [4] 20 RESET_MCU [4] 21 WAKEUP_IN_MCU [4] Q0406 DTC043ZEBTL [4] WAKEUP_IN_MCU VDD_EXT GPIO13 C0403 10nF Q0405 DTC043ZEBTL [4] W_DISABLE_MCU C C0401 10nF 5 V power supply from motherboard. VDD_EXT Q0401 DC_5V 22 23 R0403 4.7K W_DISABLE_MCU [4] R0401 4.7K S C0402 1nF C0405 470nF SLEEP_STATUS_MCU [4] 24 USB_VBUS D R0404 100K 25 [3] AP_READY B W_DISABLE# [3] 13 1 B USB_ID MCU Q0407 DTC043ZEBTL [4] RESET_MCU It is used to wake up the module. 11 C U0401 RESET_N [3,18] 2 G GND 26 3 2 C Q0403 E 2SC4617 SLEEP_STATUS_MCU [4] R0402 10K B Q0402 DTC043ZEBTL [4] VBUS_CTRL NOTE: 1. U0401 represents your MCU. The power domain of GPIO interfaces of the module is 1.8 V. If the power domain of GPIO interfaces of U0401 is also 1.8 V, then the related level-shifting circuit is not needed. 2. The USB interface of the module can only serve as a slave device and supports full-speed and high-speed modes of USB 2.0. To communicate with the USB interface, MCU needs to support USB host mode or OTG function. The USB_VBUS pin of the module should be powered by an external power system for USB detection, and VBUS_CTRL is used to turn on/off the USB_VBUS power supply. 3. It is recommended to select the default low-level GPIO pins of MCU as the control pins for PWRKEY and RESET_N of the module. Please ensure that the load capacitance does not exceed 10 nF on PWRKEY and RESET_N pins. A A Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 4 OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 Power Supply Design VBAT Design DC-DC Application D D VBAT When the input voltage is above 7.0 V, use a DC-DC converter to convert the high input voltage to 5.0 V, VBAT Close to VBAT_BB pins. VBAT Close to VBAT_RF pins. and then use LDOs to convert it to 3.8 V, 3.3 V and 1.8 V to power the module, audio PA and Codec. The supply current of the module must be at least 2.0 A. DC-DC DC 5 V Output LDO1 DC 3.8 V Output + + D0501 EC600M-CN e.g. DC 12 V Input C0502 C0512 C0501 C0509 C0508 C0520 C0506 C0519 100uF 100nF 33pF 10pF 100uF 100nF 33pF 10pF TPA6205A1 DC 3.3 V Output LDO2 Codec NOTE: DC 1.8 V Output LDO3 1. The power supply should be able to provide sufficient current of at least 2.0 A for the module. Codec 2. The VBAT trace should be connected to VBAT_BB and VBAT_RF pins in a star configuration. C C 3. The width of VBAT_BB trace should be not less than 1 mm; and the width of VBAT_RF trace should be not less than 2 mm. 4. The recommended operating voltage of VBAT ranges from 3.4 V to 4.3 V, and the typical voltage is 3.8 V. LDO Application Power Supply for Codec U0502 SGM2019-ADJYN5G/TR 1 When the input voltage is below 7.0 V, use an LDO to convert the input voltage to 3.8 V. C0513 1uF C0511 100nF 3 DTC043ZEBTL IN EN FB VDD_3V3 = 1.207 × (1 + R0504 / R0509) = 3.3 V 5 VDD_3V3 R0504 4 73.2K +/-1% C0521 4.7uF C0518 100nF C0507 33pF 2 Q0502 OUT GND DC_5V U0503 2 DC_5V IN OUT EN ADJ [4] VBAT_EN GND2 51K 1 GND1 100nF R0507 R0505 3 470uF C0514 6 C0504 VBAT + + B R0510 10K VBAT = (R0507 / R0503 + 1) × 1.24 = 3.88 V 4 5 C0522 [4] CODEC_POWER_EN B R0511 100nF 330R U0501 SGM2019-ADJYN5G/TR DC_5V R0503 47K +/-1% VDD_1V8 C0516 100K +/-1% 470uF R0509 42.2K +/-1% NOTE 1 Q0501 R0502 C0503 1uF C0505 100nF 0R 3 EN OUT FB VDD_1V8 = 1.207 × (1 + R0501 / R0508) = 1.8 V 5 4 VDD_1V8 R0501 39K +/-1% C0510 4.7uF C0515 100nF C0517 33pF 2 DTC043ZEBTL IN GND MIC29302WU R0506 100K R0508 75K +/-1% VDD_EXT NOTE: NOTE: The recommended load current should exceed 10 mA. 1.VDD_EXT and CODEC_POWER_EN are used to turn on/off VDD_1V8 and VDD_3V3 respectively. 2.The following power-up/down sequences should be followed to ensure the audio codec works normally. Power-up sequence: power up VDD_1V8 first, and then VDD_3V3. Power-down sequence: power down VDD_3V3 first, and then VDD_1V8. A A Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 5 OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 USIM Interface Design D D USIM1 USIM1_VDD VDD_EXT 4 0R 100nF J0601 6 8 USIM2_VDD VCC GND RST VPP CLK I/O PRESENCE 7 C0607 1 2 [3] USIM2_RST 3 [3] USIM2_CLK 6 R0604 0R 5 R0605 0R 4 8 7 R0603 VCC GND RST VPP CLK I/O PRESENCE 7 1 2 3 7 C USIM Card Connector USIM Card Connector [3] USIM1_DATA 100nF J0602 15K 51K C0608 5 0R [3] USIM1_DET C USIM2_VDD USIM1_VDD R0608 R0609 R0602 15K [3] USIM1_CLK R0601 R0607 [3] USIM1_RST USIM2 0R [3] USIM2_DATA R0606 0R U0601 U0602 33pF 33pF 33pF C0605 33pF 33pF C0603 33pF C0604 C0601 C0606 C0602 NOTE: 1. U0601 and U0602 are recommended to be used to offer good ESD protection, and the parasitic capacitance should be less than 15 pF. 2. The pull-up resistors R0607 and R0608 can improve anti-jamming capability, and should be placed close to the USIM card connector. 3. R0601–R0606 are used for debugging, and C0601–C0606 are used for filtering out RF interference. B B 4. The capacitance of C0607 and C0608 should be less than 1 μF and they should be placed close to the USIM card connector. A A Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 6 OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 UART Interface Design D D UART Level-shifting Circuit - Transistor Solution VDD_EXT VDD_EXT C0703 R0701 R0702 R0705 C0704 R0703 1nF 4.7K 10K 10K 1nF 4.7K [4,7] TXD_MCU C VDD_MCU VDD_EXT MAIN_RXD [3,7] Q0702 [4,7] RXD_MCU 2SC4617TLQ 2SC4617TLQ Q0701 MAIN_TXD [3,7] C UART Level-shifting Circuit - IC Solution 51K R0708 100nF C0702 51K R0709 U0701 B 1 2 VDD_EXT 3 [3] MAIN_DCD 4 [3,7] MAIN_TXD 5 [3,7] MAIN_RXD [3] MAIN_RI 6 [3] MAIN_DTR 7 [3] MAIN_CTS 8 [3] MAIN_RTS 9 VDD_EXT 10K R0704 120K R0706 10 A1 B1 VCCA VCCB A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 OE GND 20 100nF C0701 B 19 VDD_MCU 18 DCD_MCU [4] 17 RXD_MCU [4,7] 16 15 14 13 12 TXD_MCU [4,7] RI_MCU [4] DTR_MCU [4] CTS_MCU [4] RTS_MCU [4] 11 TXS0108EPWR NOTE: 1. There are two level-shifting solutions: transistor solution and IC solution, and it is recommended to select the latter one. 2. The power supply of TXS0108EPWR's VCCA should not exceed that of VCCB. For more information, see the datasheet of TXS0108EPWR. A A 3. The transistor solution is not suitable for applications with high baud rates exceeding 460 kbps. The capacitors C0703 and C0704 of 1 nF can improve the signal quality. 4. MAIN_RTS and MAIN_DTR level-shifting circuits are similar to that of the MAIN_RXD. MAIN_CTS, MAIN_RI and MAIN_DCD level-shifting circuits are similar to that of the MAIN_TXD. Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 7 OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 Analog Audio Design D D Microphone Bias Circuit Microphone Application MIC_BIAS 100nF C0818 R0802 510R C0803 R0801 1.5K C0807 C0805 10pF 33pF C0814 C0815 10pF 33pF C0809 C0812 10pF 33pF Close to microphone interface D0801 2.2uF [3,8] MIC_P MIC_P [3,8] [3,8] MIC_N MIC_N [3,8] [3,8] MIC_P J0801 MIC [3,8] MIC_N R0803 1.5K D0802 R0804 C C 510R 33pF 10pF 33pF C0806 C0804 C0808 [3,8] MIC_P [3,8] MIC_N [3,17] SPK_P B C0810 C0813 C0816 33pF 10pF 33pF B0803 0R B0802 0R B0804 0R B0801 4 1 J0802 HANDSETCON 3 B 2 5 C0811 10pF 0R D0806 C0801 33pF D0805 C0819 10pF [3,17] SPK_N Close to handset interface 6 10pF C0802 D0804 33pF C0820 D0803 10pF C0817 Handset Application NOTE: 1. Both the MIC and SPK signal traces need to be routed as differential pairs. 2. All MIC and SPK signal traces should be surrounded with ground on the layer and ground planes above and below, and far away from noises. 3. An external microphone bias circuit must be added when using electret microphone. A A 4. It is recommended to use 10 pF and 33 pF capacitors to filter RF interference. Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 8 OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 LCM Interface Design D D PWM 40510W90-26N-SHL2ETBR 0R NOTE 4 1 26 2 25 3 24 4 23 5 22 6 21 J0901 7 20 VDD_EXT 8 19 LCD_VDD 9 18 10 17 11 16 12 15 13 14 R0904 0R R0905 0R R0903 0R C0901 C0902 C0903 C0908 C0909 2.2uF 2.2uF 100nF 100nF 28 C0904 NM_33pF C C0907 [3] LCD_SPI_RS NM_33pF [3] LCD_SPI_CLK NM_33pF [3] LCD_SPI_CS NOTE 3 27 NOTE 1 VDD_EXT R0902 0R R0901 0R LCD_RST [3] LCD_SPI_DOUT [3] C0905 51R R0906 C0906 R0907 NM_33pF LED-A NM_33pF Q0901 DTC043ZEBTL NOTE 2 C NOTE 3 NOTE: 1. It is recommended to design LCM power supply by yourself. 2. To avoid abnormal LCM display caused by power fluctuation, it is recommended to mount filter capacitors. 3. The 33 pF capacitors of the signal pins should be reserved, and be used according to the actual debugging situation. 4. The LED-A backlight power supply is designed by youself, and you can select the approriate resistor (R0907) according to the B B digital transistor rated current and LED-A voltage value. A A Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 9 OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 Camera Interface Design CAM_VDDIO 2.2uF NOTE 3 C1006 C1007 17 1 C1002 100nF D 100nF D 2 CAM_VDD 3 CAM_VDDIO 4 CAM_I2C_SCL [3,10] 5 J1001 C FH34SRJ-16S-0.5SH(50) CAM_I2C_SDA [3,10] 6 7 R1005 0R R1003 0R R1002 0R R1008 0R R1010 0R R1006 33R R1004 33R C CAM_SPI_CLK [3] 8 4.7K 4.7K R1001 R1009 9 CAM_MCLK [3] 10 11 CAM_SPI_DATA0 [3] CAM_SPI_DATA1 [3] 12 13 CAM_I2C_SDA [3,10] CAM_PWDN [3] 14 15 R1007 C1008 C1005 C1003 C1004 NM_33pF NM_33pF NM_33pF C1009 NM_33pF 18 Q1002 VBAT 0R 1uF C1001 16 NM_33pF CAM_I2C_SCL [3,10] CAM_GPIO1_MCU [4] NOTE 2 DTC043ZEBTL Q1001 NOTE 2 CAM_GPIO2_MCU [4] DTC043ZEBTL NOTE 1 B B NOTE: 1. By controlling the triode switching circuit, CAM_GPIO1_MCU controls the cathode of the positioning light of the camera, and CAM_GPIO2_MCU controls the cathode of the supplement light of the camera. It is recommended to select GPIO pins which are in pull-down status by default as the two control pins. 2. The 33 pF capacitors of the signal pins should be reserved, and be used according to the actual debugging situation. The values of current limiting resistors of positioning light and supplement light (R1004 and R1006) should be varied according to the required brightness. 3. The capacitors (C1002 and C1006) of the CAM_VDD power supply should be connected to the GND layer directly. Otherwise, power supply noise may lead to abnormalities such as white dots on the preview screen. A A Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 10OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 Antenna Interface Design D D J1101 R1101 ANT_MAIN [3] 0R C C C1102 C1101 NM NM NOTE: The single-ended impedance of the RF antenna is 50 Ω. B B A A Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 11OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 SPI Interface Design D D Module As Slave Module As Master C C EC600M-CN U1202 SPI_CS EC600M-CN SPI_CLK [3,12] SPI_CLK 2 SPI_RXD [3,12] SPI_MISO 1 SPI_TXD [3,12] SPI_MOSI SPI_CS [3,12] 3 SPI_CLK [3,12] 2 SPI_TXD [3,12] 1 SPI_RXD [3,12] C1202 NM D1202 D1205 D1201 C1201 NM D1207 Peripheral D1204 Peripheral 4 D1206 SPI_MOSI SPI_CS [3,12] 3 D1203 SPI_CLK SPI_MISO 4 D1208 SPI_CS U1201 B B A A Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 12OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 Bluetooth Interace Design D D BT_HOST_WK_INT [3] 1 0R 2 [3] BT_PCM_CLK R1307 0R 3 [3] BT_PCM_SYNC R1302 0R 4 5 [3] HOST_BT_WK 6 4.7K 7 8 NC4 25 26 27 GPIO12 FM_OUTL FM_OUTR 30 28 29 GPIO13 32 31 PCM_DOUT NC3 PCM_DIN NC2 PCM_CLK NC1 U1301 PCM_SYNC FM_IP ASR5801 GPIO5 FM_IN MODE0 AVDD_BT MODE1 RF HWRESET LDO_EN 24 23 22 21 J1301 20 ANT_BT 19 C AVDD_1V8_BT C1304 18 17 10pF C1315 10pF BT_LDO_EN [3] C1319 NM 12 C1309 NM D1301 GESD1005H5R5CR10GPT 1 AVDD_18 L1301 NM 16 DVDD_12 AVDD_FM 15 14 XEN_OUT I2C_SCL I2C_SDA XTAL 13 12 9 BT_I2C_SCL [3,13] 11 BT_I2C_SDA [3,13] 10 XIN_32K 2 [3] BT_RST HOST_WAKE 0R R1301 UART_TX 33 GND R1305 UART_RX C1314 NM [3] BT_PCM_DIN R1304 R1306 C1318 NM BT_UART_RTS [3] [3] BT_PCM_DOUT 4.7K R1303 C BT_UART_CTS [3] [3] BT_UART_RXD 0R VDD_EXT C1306 NM C1317 NM NOTE 3 [3] BT_UART_TXD AVDD_1V8 [13] BT_CLK_32K [3,13] BT_I2C_SDA AVDD_1V8_FM [3,13] BT_I2C_SCL DVDD_1V2 [13] BT_CLK_26M X1302 4 AVDD_1V8 C1321 B 220nF 1 VCC NC OUT GND 3 DVDD_1V2 AVDD_1V8 BT_CLK_26M [13] 2 C1311 C1301 C1303 C1322 C1312 C1313 100pF 470nF 1uF 100pF 470nF 1uF C1320 C1310 C1316 C1302 C1305 C1307 100pF 470nF 1uF 100pF 470nF 1uF B TCXO 26MHz +/-10ppm X1301 4 AVDD_1V8 C1308 220nF 1 VCC OUT NC GND 3 BT_CLK_32K [13] AVDD_1V8_FM 2 AVDD_1V8_BT TCXO 32kHz +/-10ppm NOTE 2 NOTE 1 NOTE: 1. 1.8 V power supply of the Bluetooth chip (AVDD_1V8) shall be designed by yourself. And the other three (DVDD_1V2, AVDD_1V8_FM and AVDD_1V8_BT) are the internal power supply pins of the chip, which are used to connect external filter capacitors. A A 2. It is recommended to choose 26 MHz and 32 kHz oscillators and to design power supply circuits on your own. 3. The 33 pF capacitors of the signal pins should be reserved, and be used according to the actual debugging situation. Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 13OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 Matrix Keypad Design D D [3] KP_MKIN[1] D1408 S1405 2 D1402 2 2 1 2 2 2 2 2 S1410 S1408 1 1 2 2 2 2 2 S1424 S1415 1 S1412 1 S1409 1 1 1 1 2 2 2 2 2 S1419 1 S1406 1 S1403 C S1421 1 S1407 1 S1402 D1401 [3] KP_MKOUT[3] D1405 1 S1404 D1403 [3] KP_MKOUT[2] [3] KP_MKIN[5] 1 S1401 C 2 S1416 D1404 [3] KP_MKOUT[0] D1409 S1414 S1420 2 [3] KP_MKIN[3] S1413 D1410 [3] KP_MKIN[2] S1411 [3] KP_MKIN[0] 1 1 1 1 1 2 2 2 2 2 NOTE 1 1 S1422 S1423 1 1 B 1 D1407 [3] KP_MKOUT[5] S1425 S1418 B S1417 15K R1401 D1406 [3] KP_MKOUT[4] NOTE: When pin 55 of the module is multiplexed into KP_MKOUT[4], the pin must be pulled down to the ground by adding an external 15 kΩ resistor. A A Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 14OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 Audio Codec Design (ALC5616) R1516 R1517 0R 0R C1520 C1505 C1516 C1522 C1523 C1527 C1511 C1512 C1517 C1513 4.7uF 100nF 4.7uF 100nF 33pF 4.7uF 100nF 33pF 2.2uF 2.2uF 29 100nF DBVDD 30 DCVDD DACREF MICBIAS C 15 C1529 4.7uF 31 C1524 CPVDD 0R 6 R1513 MICVDD 0R 5 R1502 AVDD VDD_1V8 VDD_1V8 VDD_1V8 D VDD_3V3 D C R1503 C1528 510R R1504 1.5K R1509 0R 2 4.7uF C1503 32 MICBIAS1 CPP1 IN1P/DMC_DAT CPN1 14 C1515 2.2uF C1521 2.2uF 13 MICBIAS 2.2uF C1514 [16] MICP CPP2 2.2uF 3 4 [16] MICN C1530 2.2uF IN2P CPN2 HPO_R 25 R1515 [3] PCM_DOUT R1520 [3] PCM_DIN 510R 0R 22 R1510 0R 21 R1518 0R 24 R1511 0R 23 [3] PCM_CLK [3] PCM_SYNC HPO_L U1501 MCLK ALC5616-CGT DACDAT1 LOUTL/P ADCDAT1 LOUTR/N NM NM LRCK1 CPVPP CPVEE CPVREF NM VREF2 28 1 JD1 SCL 7 DGND NM_10K AGND R1508 33 VDD_3V3 R1514 0R C1508 1uF 20 R1507 0R C1518 1uF R1501 0R C1531 1uF R1521 0R C1507 1uF 9 10 SPK_R [16] SPK_L [16] SPKP [16] 16 C1504 2.2uF SPKN [16] 19 C1525 2.2uF C1501 4.7uF 18 8 GPIO1/IRQ1 SDA B 17 BCLK1 C1509 C1502 C1526 C1510 NM 11 IN2N/JD2 R1512 1.5K 12 27 I2C_SDA [3] 26 I2C_SCL [3] B C1506 NM_33pF C1519 R1519 4.7K R1506 4.7K NM_33pF VDD_1V8 R1505 0R R-0805 NOTE: 1. ALC5616 power-up sequence: DBVDD/I2C pull-up power/AVDD/DACREF/CPVDD → MICVDD → software initialization. 2. ALC5616 power-down sequence: disable Codec function by software → MICVDD → DBVDD/I2C pull-up power/AVDD/DACREF/CPVDD. 3. The module will automatically initialize the Codec via I2C interface after it is turned on successfully, so all power supplies for the Codec need to be powered up before that. 4. Please pay attention to the distinction between analog ground and digital ground. The analog ground and digital ground need to be connected with a 0 Ω resistor packaged as R-0805. For more details, please refer to sheet "Audio Codec Interface Design". 5. For more details, please refer to the datasheet of ALC5616. A A Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 15OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 Audio Codec Interface Design D D 33pF 10pF 33pF C1618 C1610 C1617 [15,16] MICP [15,16] MICN [15] SPKP C1612 C1604 C1620 33pF 10pF 33pF B1601 0R B1602 0R B1604 0R B1603 4 J1601 1 HANDSETCON 3 2 5 C1603 10pF 0R D1602 C1609 33pF D1601 C1607 10pF [15] SPKN Close to handset interface 6 10pF C1606 D1604 33pF C1616 D1603 10pF C1611 Handset Application C C Headset Application J1602 R1601 NM-0R R1605 0R JAF00-06227-0301 6 [15,16] MICP 1 [15] SPK_R 3 [15] SPK_L 5 B C1613 33pF D1605 C1621 10pF C1605 33pF D1607 C1602 10pF C1601 33pF D1606 C1608 10pF [15,16] MICP NM-0R R1602 0R C1615 10pF 4.7uF R-AUDIO L-AUDIO GND DETECT CTIA OMTP R1601/R1604 NM M R1602/R1605 M NM R1603 [15,16] MICN C1619 C1614 MIC B 2 4 Closer to Headset 33pF R1604 6 0R R-0805 NOTE: 1. The Codec analog output can drive handset and headset. For larger power loads such as loudspeaker, an audio power amplifier should be added in the design. A A 2. In handset application, route the MIC and SPK signal traces as differential pairs respectively. 3. In headset application, route the MIC signal traces as a differential pair. 4. All MIC and SPK signal traces shall be surrounded with ground on the layer and ground planes above and below, and far away from noises such as clock and DC-DC signals. 5. Please pay attention to the distinction between analog ground and digital ground. The analog ground and digital ground need to be connected with a 0 Ω resistor Quectel Wireless Solutions packaged as R-0805 (short-circuit through single point grounding). PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 16OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 Analog Audio Design (Audio Power Amplifier) D D NOTE 3 R1702 51K R1704 51K C1704 C1708 33pF 10pF D1701 U1701 [3,8] SPK_N [3,8] SPK_P C1703 100nF R1703 C1709 100nF R1705 20K 20K 4 3 1 [3] AUDIO_PA_EN C1710 C 100nF 2 11 R1701 100K 13 IN- TPA6205A1 IN+ VO+ VOVDD /SHUT_DOWN GND BYPASS GND1 GND3 GND2 GND5 GND4 5 8 6 600Ω@100MHz B1701 1 B1703 14 600Ω@100MHz C1706 C1707 33pF 10pF 10pF 33pF C1712 C1701 J1701 2 D1702 7 9 C 10 12 B1702 VBAT 600Ω@100MHz C1702 C1705 C1711 10pF 33pF 4.7uF NOTE: 1. SPK_P and SPK_N are differential output channels that can be used for an external audio power amplifier. It is recommended to use MAIN_DCD of the module to control the enable pin of the audio power amplifier to eliminate POP noise. For more information about AUDIO_PA_EN, please contact Quectel Technical Support. 2. The type of power amplifier in this design is for reference only. Select the appropriate audio power amplifier according to actual needs. B B 3. Filter capacitors and ESD protection components should be placed close to the loudspeaker. 4. The selection of ESD protection components is related to the selection of audio power amplifier. Please ensure that the output voltage of audio power amplifier is within the maximum reverse working voltage range of ESD protection components under normal working condition, so as to avoid damage to ESD protection components. A A Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 17OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2 5 4 3 2 1 Other Designs D D Indicators VBAT VBAT D1809 VBAT D1803 R1804 2.2K D1802 R1802 2.2K 3 D R1803 2.2K Q1802 DTC043ZEBTL [3] STATUS Q1801 RUM001L02T2CL Q1803 DTC043ZEBTL [3] NET_MODE 1 G S 2 [3,18] NET_STATUS/USB_BOOT C C NOTE: 1. For more details about STATUS , NET_MODE and NET_STATUS/USB_BOOT, see the hardware design document of the module. 2. If the low current consumption is required when your device is in sleep mode, replace the power supply VBAT of the STATUS, NET_MODE and NET_STATUS/USB_BOOT indicators with the external controllable ones, which can be turned off when the module is in sleep mode to reduce the power consumption. 3. Note that the maximum value of Q1801's Vgs (th) should not exceed 1 V, since the NET_STATUS/USB_BOOT pin of the module outputs high level by default. If the MOSFET is used, the pin's level will be lowered, and the module will enter the emergency download mode and cannot be turned on normally. Reserved Test Points USB_BOOT Interface J1801 1 VBAT 2 3 B B PWRKEY [3,4] 4 5 6 USB_VBUS J1802 USB_DP_TEST [3] T-PIN-1X3 USB_DM_TEST [3] 7 4.7K R1805 DBG_RXD [3] VDD_EXT 8 DBG_TXD [3] 9 GPIO1 [3] 10 NET_STATUS/USB_BOOT [3,18] GPIO2 [3] 11 RESET_N [3,4] D1807 12 D1813 D1805 D1811 D1804 D1812 D1810 D1808 D1801 D1806 13 T-PIN-1x13 NOTE: NOTE: 1. Ensure to reserve the USB_BOOT interface design and test points. 1. Test points for both USB and debug UART interfaces are reserved for catching logs. 2. Before the module is turned on, pull NET_STATUS/USB_BOOT down to GND, and the module will enter emergency download mode 2. Test points for USB interface can also be reserved for firmware upgrading. when it is turned on. In this mode, the module supports firmware upgrade over USB interface. 3. The junction capacitance of the ESD protection components on USB data lines should be less than 2 pF. 3. The 6.0.1 and above version of QFlash tool must be used for firmware upgrading. 4. The debug UART interface supports 1.8 V power domain, and a voltage-level translator should be used A A if the power domain of your application is 3.3 V. Quectel Wireless Solutions PROJECT VER EC600M-CN QuecOpen DRAWN BY Howell KANG DATE 5 4 3 2 SIZE SHEET 18OF 18 Friday, February 24, 2023 1 1.2 CHECKED BY Kelly WANG A2
