Synopsys Design Constraints
Support In the Galaxy Platform
Design Compiler, IC Compiler (H-2013.03),
PrimeTime(H-2012.12)
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Agenda
• Galaxy Platform Support Of Synopsys Design Constraints
(SDC)
• Constraint Generation Best Practices
• SDC Transfer Between Tools
• Summary
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What is Synopsys Design Constraints
(SDC)?
• SDC is a standard format and syntax used to specify
design intent
– Includes timing, area, power, and physical design constraints
• SDC is used as a standard design constraints interchange
format across EDA tools
• SDC v2.0 is the standard used across the Synopsys
Galaxy Design Platform
• Third-party tools may not support all the constructs
defined in the SDC standard
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Galaxy Platform Support Of Synopsys
Design Constraints
Golden
SDC
+
Synthesis
Specific
Constraints
+
Physical
Synthesis
Constraints
+
Layout
Specific
Constraints
+
Signoff
Constraints
Legend
SDC v2.0
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Design
Compiler
IC
Compiler
PrimeTime
• Additional process or
tool-specific constraints
might be required in the
design process
– These constraints are toolspecific and not part of SDC
version 2.0
SDC Documentation
• Using the SDC Format Application Note can be found at:
https://solvnet.synopsys.com/dow_retrieve/latest/sdc/sdc.html
• List of supported timing constraint commands and options
in Design Compiler, IC Compiler and PrimeTime
https://solvnet.synopsys.com/retrieve/015193.html
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Agenda
•
•
•
•
Galaxy Platform Support Of SDC
Constraint Generation Best Practices
SDC Transfer Between Tools
Summary
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Constraint Generation: Best Practices
synthesis
specific
constraints
+
e.g.
set_max_area
Design
Compiler
Golden
SDC
(Contains
SDC v1.8
commands
and
options)
For example,
set_max_area for synthesis
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• Have a “Golden SDC”
constraint file based on
SDC v2.0 common for all
Galaxy tools
• Have additional process or
tool-specific constraints in
separate files
Constraint Generation: Best Practices
• Use the write_sdc command when using PrimeTime to
generate golden SDC for implementation tools (IC Compiler,
Design Compiler)
– Do not use the write_script command to write SDC for
implementation flow
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Agenda
•
•
•
•
Galaxy Platform Support Of SDC
Constraint Generation Best Practices
SDC Transfer Between Tools
Summary
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SDC Transfer Between Tools:
Best Practices
• Use consistent hierarchy separators in all tools
– Use change_names in Design Compiler
– Use sdc_write_unambiguous_names to turn on or off the
hierarchy separator in Design Compiler
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SDC Transfer Between Tools:
Best Practices
• Check log files in each tool for error/warning messages while
reading in constraints
• Use check_timing in Design Compiler to check for any
additional issues
• Check timing reports for top worst paths in each clock domain
when moving from one tool to another
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SDC Transfer Between Tools: Flow
Step 1: PrimeTime
(optional)
Step 2: Design Compiler
Step 3: IC Compiler
Step 4: PrimeTime
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SDC Transfer Between Tools:
Checklist
• Step 1
– Use PrimeTime to generate SDC for Design Compiler,
IC Compiler
– Did you use write_sdc?
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Step1:
PrimeTime (optional)
Step2:
Design Compiler/
IC Compiler
SDC Transfer Between Tools:
Checklist
• Step 2
– Any error/warning while reading constraints?
– Check if non-SDC version 2.0 options being used
– Divide constraints into golden SDC version 2.0 and
tool-specific constraints
– Any constraints specific to logical hierarchy?
– Generate an updated SDC after group/ungroup
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Step2:
Design Compiler
Step3:
IC Compiler
SDC Transfer Between Tools:
Checklist
Step3:
IC Compiler
Step4: PrimeTime
• Step 3
– Check the items listed in Step 2
• Step 4
– Any errors in log file while parsing SDC?
– Follow the guidelines about using golden SDC and
tool-specific constraints (PrimeTime signoff constraints)
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Summary
• Synopsys Galaxy Design Platform support SDC version 2.0
– Use SDC version 2.0 as a common set of constraints through the flow
• Follow the constraint generation Best Practices throughout
the flow
• Follow the checklist to manage constraint transfer throughout
the flow
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