eBook
High Linearity
March 2023
Technologies Enabling
5G and Other Applications
A Look Into the Latest Design Trends and Technology
S P O N S O R E D
B Y
Table of Contents
3
Introduction
Patrick Hindle
Microwave Journal, Media Director
5
6
15
New pSemi Sub-6 GHz RF Switches Enable Hybrid
Architectures in 5G Massive MIMO Base Stations
pSemi®
SOI-RF enabling mMIMO Active Antenna Radio Design
for 5G Sub-6
Payman Shanjani, Technical Director of RFIC Design
Vikas Choudhary, VP of Global Sales, Marketing & System Engineering
pSemi®
The Perfect HF Receiver. What Would it Look Like Today?
Ulrich L. Rohde
Universität der Bunderwehr, Munich, Germany
Thomas Boegl
Rohde & Schwarz, Munich, Germany
20
Improving Linearity of a Doherty Power Amplifier with a
Dual-Bias Structure
Zhiwei Zhang, Chen Li and Guohua Liu
Hangzhou Dianzi University, Hangzhou, China
Zhiqun Cheng
24
31
Hangzhou Dianzi University, Hangzhou, China, Chinese Academy of Sciences, Suzhou, China
A Dive Into Integrated PA Topologies for 5G mMIMO
Wolfspeed
5G NR Challenges & Trends in RFFE Design
Peter Bacon, Senior Director of Systems and Applications Engineering
Young-Taek Lee, Senior Staff Engineer of RF Cellular Systems
pSemi®
38
SOI RFIC Tunable Filters Improve Phased Array System
Performance
Leopold E. Pellon
Otava Inc., Moorestown, N.J
2
Taking mmWave
Mainstream with
our Complete
5G Front-End
Solutions
mmWave
Product
Portfolio
• Antenna-integrated
Modules
• Beamforming
Front Ends
• Up-down Converters
• Digital Step
Attenuators
Our new RF SOI ICs are our latest mmWave
products offering full IF-to-RF coverage across
the n257, n258, and n260 bands in the industry’s
smallest form factors. For 5G and beyond, we
continue to expand our portfolio and invest in
technology that supports your needs as
higher-frequency spectrums are released.
At pSemi, we take what “can’t be done” and
transform it into an industry first. We build
intelligent electronics for the connected world.
Learn more: www.psemi.com
Introduction
High Linearity Technologies Enabling 5G and
Other Applications
Linear devices in electronics have their output signal as a linear function of the input signal. We typically use thirdorder intermodulation intercept point (IP3) to measure how much distortion can arise in the time-domain waveform and
constantly strive for higher IP3 performance. This eBook covers several design trends and technologies with high linearity
devices ranging from switching to power amplifiers to complete systems.
The first two articles cover new RF SOI device technologies addressing 5G MIMO and mMIMO systems. New high
linearity, high power switches are featured in the first article followed by an analysis of mMIMO systems architecture and
how RF SOI solutions can optimize component performance for better power efficiency, size, weight and cost.
The next article looks at what the perfect HF receiver look like today - one that combines all available technologies
into the most modern concept of a software-defined receiver. The next article covers Improving Linearity of a Doherty
Power Amplifier with a Dual-Bias Structure. The article after that continues to cover integrated PA topologies for 5G
mMIMO.
5G NR RF front end design engineers can benefit from understanding these trends and aspects of the new RF
hardware and technologies needed to address the new challenges of 5G, so the next article covers these aspects. Finally,
the capabilities and impact of new SOI tunable filter ICs on the design of the RF chains of phased arrays are discussed.
These new devices provide an advancement in tunability, small size and high linearity, which supports efficient approaches
addressing challenges of interference and wider operating bandwidth.
pSemi UltraCMOS® products allow engineers the flexibility to prioritize attributes — like small form factor, low power
consumption, high reliability, radiation tolerance, high ESD ratings, programmability, affordability, reduced board area;
based on use case. With UltraCMOS® intelligent integration, a single chip can integrate features such as RF amplifiers,
analog DC tracking, digital logic control, high-performance switching, phase shifters and digital step attenuators. And
pSemi HaRP Technology allows for very linear FETs that, when stacked together, provide excellent linear performance.
We hope these new devices and design developments driving higher linearity and improved system performance are
useful for your next design. We thank pSemi Corporation, a Murata Company for sponsoring this eBook.
Patrick Hindle, Microwave Journal Media Director
4
New pSemi Sub-6 GHz RF
Switches Enable Hybrid
Architectures in 5G Massive
MIMO Base Stations
pSemi®
p
Semi® Corporation, a Murata company focused
on semiconductor integration, expands its portfolio of RF SOI switches targeted for the latest 5G
wireless infrastructure and massive MIMO base station
deployments. By using the new high linearity switches
in hybrid architecture topologies, base station designers can save valuable board space and improve thermal management, reducing the overall system’s cost,
weight and power consumption. pSemi’s advanced
SP4T switches deliver best-in-class linearity, insertion
loss and power handling performance to improve spectral efficiency in sub-6 GHz active antenna systems."
5G base stations covering sub-6 GHz offer network
providers an immediate path to wider bandwidths and
increased data throughput. New 3 to 5 GHz allocations
and added antenna design complexities create the
need for new hybrid beamforming and phase-shifting
topologies. Massive MIMO systems use hybrid architectures to minimize power-hungry digital processing
and reduce the number of power amplifier components. These hybrid architectures offer the ideal balance
of digital and analog, combining the flexibility of digital
beamforming with the power efficiency and design simplicity at the analog RF front end (RFFE).
“Active antenna systems are driving a drastic increase in demand for RFFE components, along with
tougher FR1 switching requirements for advanced 5G
networks. As the industry leader in RF and mmWave
switching, pSemi continues to push the boundaries of
SOI technology and design RFIC solutions that empower base station OEMs and support the demands of
5G and beyond," said Vikas Choudhary, vice president,
Sales & Marketing.
FEATURES & BENEFITS
High Linearity RF Switches
Covering a frequency range of 1.8 to 5 GHz, each
UltraCMOS® PE42443 and PE42444 switch delivers industry-leading RF performance across the n41, n77, n78
and n79 bands. Two back-to-back pSemi SP4T switches
with selectable phase shifts enable the analog beam
control utilized in hybrid beamforming architectures.
Available in two pin-to-pin compatible configurations,
the PE42443 (negative and positive supply voltage) and
the PE42444 (positive supply voltage only) are offered
in 4 x 4 mm LGA packages.
• Spectral efficiency—High linearity and high power
handling maximizes data throughput
• Energy conservation—Low insertion loss improves
overall system efficiency
• Flexible beam management—Fast switching speed
supports symbol-level analog beam adjustments to
enable massive MIMO systems.n
www.mwjournal.com/articles/37646
5
SOI-RF enabling mMIMO Active
Antenna Radio Design for 5G
Sub-6
Payman Shanjani, Technical Director of RFIC Design
Vikas Choudhary, VP of Global Sales, Marketing & System Engineering
pSemi®
The superior performance of active/advanced antenna systems (AAS) compared to traditional
passive antenna systems (PAS) is driving a transition towards AAS for telecommunications
base stations. These AAS are composed of several to even hundreds of antenna elements
that, depending on the design, require distinct RF signal chains to the antenna elements. This
approach allows for multi-input multi-output (MIMO) and beamforming capability, but also
dramatically increases the antenna system complexity, though generally at lower RF power
per signal chain. This changes the telecommunications RF front end (RFFE) dynamic from a
small number of very high powered signal chain components to a multitude of lower power
components with a divergence in design criteria and considerations.
The latest generation of RF silicon-on-insulator (SOI) RF component technology is well suited to
filling this new niche for telecommunications signal chain components for both sub-6 GHz and
even massive MIMO (mMIMO) transceivers.
TRANSITION TOWARD AAS
Traditional cellular mobile base stations are based on
a homogenous cellular design with large base stations
spaced sparsely to cover targeted regions. Covering
these distances has traditionally required base stations
to be located on large towers or the tops of tall buildings in more cluttered urban environments. Due to this
placement, the radio unit (RU) is generally in a location
that is readily accessible to technicians, with the antenna distantly placed on top of the tower or edge of the
building (i.e. a remote radio head system). The RU must
route RF signals to and from the antenna along stretches
of RF coaxial cables, which have significant loss over distance, and is a passive antenna system (PAS).
This cellular model requires omni-directional or only
partially directional antennas that radiate over a wide
“coverage area” in order to serve as many customers
as possible. The result of this is low received energy
levels by the user equipment (UE) proportional to the
high amount of radiated energy, or low radiated energy
efficiency. As there is only a single large transmitting antenna, the same signal must be sent to the entire coverage area. Indiscriminate transmission means that only
one user is served at a time per frequency band or time
slot. Therefore, only a limited number of users can be
supported simultaneously from a given traditional base
station. Attempts to serve more customers or to ensure
adequate coverage may result in high transmit power
levels of a cell or a nearby neighboring cell causing interference.
In all, this approach successfully served legacy devices
and traditional use cases. However, there are now more
mobile telecommunications UE, demands for enhanced
cellular performance, and new use cases that cannot be
adequately supported with the legacy approach. Given
the growing numbers of UE in high density urban areas,
a new type of base station has emerged, the massive
MIMO (mMIMO) base station, which is capable of supporting a significant number of UEs and necessitates
a shift in base station architecture. Hence, there has
been ongoing development of multi-input multi-output
(MIMO) and beamforming technologies to realize active
antenna systems (AAS).
The RF unit in a mMIMO AAS is closely located,
and potentially even integrated, with the antenna. This
means that the RF signal routing between the RU and
antennas is much shorter. Moreover, mMIMO AAS use
array antennas composed of an array of antenna elements, with transmit and receive signals routing to these
elements. These AAS, depending on topology, have at
least one RFFE per group of antenna elements, and
possibly even an RFFE per antenna element. This type
6
s Fig. 2
High-level conceptualization of an mMIMO and
beamforming-capable AAS base station with 32 antenna
elements supporting multiple UEs simultaneously.
s Fig. 1
A traditional cellular base station model with radio
unit, base station antenna, and user equipment elements
displayed.
s Fig. 3
A comparison of the signal chain for macro base
stations, remote radio heads (RRH) and radio server base
stations, and integrated antenna base stations. Source: 5G
Americas.
of antenna structure is needed to support the mMIMO
and beamforming technologies, and results in an antenna system with a controllable beam pattern that is
compatible with spatial multiplexing. Spatial multiplexing allows for simultaneous communication between a
base station and UEs in different locations within the
coverage zone of the base station using overlapping
frequency bands and/or time slots.
mMIMO AAS are much more compact than traditional base stations, with a multitude of lower-power RF
signal lines instead of a single large and less efficient
signal path as with traditional base stations. mMIMO is
a breakthrough technology that demonstrably improves capacity and
user experience of 5G enhanced
mobile broadband (eMBB). Modern
AAS with MIMO capability exhibit enhanced radiated efficiency compared
to legacy PAS, as beamforming and
mMIMO technologies enable concentration of the radiated energy from the
base station toward the UE with much
more directional antenna patterns.
Depending on the use case, MIMO
and beamforming AAS can also enhance the downlink (DL) and uplink
(UL) signal strength and cell through-
put by allocating multiple beams to one or more users.
Another benefit of modern AAS is that the high directionality afforded by beamforming antennas helps to
reduce the transmitted and received interference from
a base station to itself and from neighboring base stations. This can dramatically improve network performance within a cell and with adjacent cells, especially in
interference-limited cell deployments.
Though modern AAS that support beamforming and
mMIMO exhibit better throughput, interference, capacity, scalability, stability, reliability, and energy efficiency
s Table 1
7
Forecasted Base Stations
Base Station Shipments (Thousands)
2,000
1,800
1,600
1,400
1,200
1,000
800
600
400
200
0
2018
2019
2020
2021
2022
2023
2024
2025
GPRS/EDGE CDMA/EVDO WCDMA/HSPA TD-SCDMA
TD-LTE LTE-FDD 5G NR < 6 GHz NB-IoT
(a)
Transceiver Shipments, by Level of Complexity
200 M
180 M
160 M
s Fig. 4
A table comparing traditional passive antenna
system base stations to modern AAS base stations with mMIMO
capability.
140 M
120 M
100 M
than traditional PAS base stations, these enhancements
in performance do have trade-offs. Namely, modern
AAS are much more complex with many more internal
components and routing considerations, and are more
expensive. Modern AAS also require more substantial
baseband processing and antenna processing technologies, and the typical flat panel AAS design can be larger
and possibly heavier than traditional PAS antenna elements that cover the same frequencies.
Despite these factors, AAS adoption is growing year
over year, with Yole Développement predicting that
AAS will account for 45% of all 5G deployments by
2025.2 These AAS are clearly being deployed in densely
populated areas, and RRH-style base stations will still
be used for 5G deployments in areas that don’t require
high levels of capacity or support other use cases outside of eMBB.
In the same report, Yole Développement also estimates that with the rise of AAS, RF component demand
is also rising (see Figure 5).
According to these forecasts, 32 transmit by 32 receive (32T32R) and 64T64R mMIMO AAS are likely to
be the most popular RF lines for mMIMO base stations.
This prediction indicates that out of 142 Mu, 120 Mu
will be 32T32R and 64T64R in 2025. This trend toward
higher order AAS also seems to correlate with the trend
toward lower power transceivers. Sources predict that
this trend will continue and, by 2025, 5 W to 19 W transceivers will account for the majority of new transceiver
shipments. This is clearly due to the increase in transmit
(TX) and receive (RX) paths per radio, and indicates a
significant opportunity for sub-20 W PAs, switch-LNAs,
and switch products.
Earlier generations of cellular telecommunications
base station technologies relied on higher power RF
chains, above 20 W, typically. These power levels were
only reasonably achievable with laterally diffused metal
oxide semiconductor (LDMOS), GaAs, and more re-
80 M
60 M
40 M
20 M
0M
2018
2019
2020
2021
2022
2023
2024
2025
1T1R or 1T2R 2T2R 4T4R 8R8R 16T16R 32T32R 64T64R
(b)
Transceiver Shipments, by Power Level
160 M
Transceivers Shipped
140 M
120 M
100 M
80 M
60 M
40 M
20 M
0M
(c)
2018
2019
2020
2021
2022
2023
2024
2025
Below 5 W 5-19 W 20-39 W 40 W and Above
s Fig. 5
(a) Forecasted base stations by generation or
technological capability. (b) Transceiver shipments by level of
complexity. (c) Transceiver shipments by power level. Source:
Yole Développement.
cently gallium nitride (GaN) technologies. However, the
shift to high order AAS and the subsequent lower RF
power levels per signal chain open the opportunity for
other semiconductor technologies (see Figure 7). It can
be observed from this figure that RRH macrosites with a
limited number of streams favor higher power RF chains,
whereas mMIMO AAS and multi-stream small cells with
a higher number of RF chains favor chain power levels
below 25 W.
With many more RF chains and lower power per RF
chain for mMIMO AAS, the balance for RF semicon8
s Fig. 6
A field plot of power per RF chain in Watts versus operating frequency in hertz. Source: Yole Développement, “5G’s
Impact on RF Front-End for Telecom Infrastructure 2021”.
s Fig. 7
A canonical 64-channel MIMO RRU architecture.
ductor technologies has shifted from the need for high
power LDMOS and GaN to lower power technologies,
such as silicon-on-insulator (SOI) and gallium arsenide
(GaAs). This, of course, applies to the wireless infrastructure portion of cellular telecommunications where 3GPP
has not set a limit for the amount of RX and TX RF lines
despite UE which are still limited to 4 RX and 2 TX lines.
Possibly for a trade-off of complexity and performance,
the industry appears to be converging on 32T32R and
64T64R RF lines for wireless infrastructure (see Figures
7 and 8).
From this architecture example (Figures 7 and 8), it
can be observed that there is a need for highly integrated RF switches, switch LNAs, single/dual channel LNAs,
single/dual channel amplifiers, Doherty power amplifier
(PA) modules etc.
AAS HERALD SOI OPPORTUNITIES
As previously discussed, there are clear trends that
the wireless infrastructure industry is veering strongly toward mMIMO AAS base station technology. As this is a
substantial shift in the type of design, RF components,
and fabrication, RF vendors face new challenges in developing antenna systems and sourcing components.
mMIMO AAS have much higher element counts, greater complexity, and consumer demand for performance
continues to grow while willingness to pay for higher
performance is stagnant. This leads telecommunications
operators (telcos) to expect relatively low return for their
capital expenditure investments in converting RRH systems to modern AAS. The reality now is that there is
substantial price pressure on OEMs to build competitive
modern AAS at budget prices, which in turn is pressur9
s Fig. 8
A Front-end module (FEM) signal chain from a canonical 64 channel MIMO RRU architecture.
s Fig. 9
A figure depicting transistor stacking and the subsequent lumped element model.
ing RF parts suppliers to reduce prices or provide more
cost-effective solutions in larger numbers.
The shift to modern AAS also has other ramifications.
Though the RF per-line power is lower with modern
AAS, the high number of RF lines and more substantial
digital baseband processing does require more overall power consumption and leads to increases in total
area and RF unit weight. There is often a limit to the
size, weight, and power that these RF units can take up,
especially with the shift to small cells being installed in
dense urban environments where wireless infrastructure
is at a premium. Hence, OEMs are also pressuring RF
parts suppliers to make more efficient and more highly
integrated solutions that result in better overall efficiency and smaller footprints. These factors are leading to
SOI technology becoming a more compelling wireless
infrastructure solution than they have been in the past.
Better SOI stacking also leads to better SOI power
handling compared to competing technologies (see
Figure 9). Transistor stacking is a method to increase
the maximum voltage a process can handle by “floating” a series of transistors, each with a limited maximum
voltage handling capability. Ideally, a stack of transistors
would allow for a perfect increase in voltage handling
of the maximum voltage of each transistor times the
number of stacked transistors, and virtually any maximum voltage can be achieved. However, with stacked
transistors, the parasitic capacitor to substrate degrades
the overall power handling of the stack. The higher the
parasitic capacitance to substrate (Csub) relative to the
gate-drain capacitance (Cgd) and the gate-source capacitance (Cgs), the more degraded the stacking performance. Fortunately, the very low Csub exhibited by SOI
technology enables very efficient stacking compared to
other technologies.
RF SOI PRIMER & ADVANTAGES
SOI technology is the fabrication of silicon semiconductor devices in a layered silicon-insulator-silicon
substrate. This approach leads to a reduction in parasitic capacitance within the device and to the substrate,
thereby improving the performance. SOI technology
enjoys higher isolation, linearity, transit frequency (FT)
and lower loss passive devices (higher Q inductors)
compared to silicon (Si). Like silicon, SOI technology is
made on a similar process to bulk CMOS and benefits
from larger wafer sizes and well established fabrication
verticals. Lastly, transistors in SOI process are not susceptible to latch-up as are silicon transistors.
SOI OPPORTUNITIES IN 5G NR SUB-6 GHZ (FR1)
MMIMO SYSTEMS AND BASE STATIONS
Previously, the trends toward AAS and the ways this
changes the hardware makeup of cellular telecommunications base stations was discussed. The following is
a practical analysis of the technical requirements of a
legacy RRH base station (see Figure 10) and a modern sub-6 GHz FR1 AAS base station (see Figure 11). A
highlight of this discussion is the type of semiconductor
technologies that are viable for the given elements in
the RF signal chains for these base station types.
10
s Fig. 10
High-level remote radio head base station RF line diagram.
s Fig. 11
High-level 32T32R AAS base station RF line diagram. The green blocks are possible with SOI technology.
Assuming a typical transceiver’s input (RXIC) and output (TXIC) power of around 0 dBm and average radiated
output power at the antenna for an RRH base station
is 320 W, or 55 dBm, only a limited number of technologies can support these power levels (see Figure 10).
Namely, LDMOS devices in a Doherty-type amplifier topology are a preferred solution with enhanced efficiency
and linearity of the PA of the transmitter compared to
other amplifier topologies. With a LDMOS Doherty PA
driving the antenna exhibiting a peak-to-average power
ratio (PAPR) of 10 dB, the peak output power of the PA
needs to be no less than 65 dBm. It is likely that such a
PA will have relatively low gain as a necessary trade-off
to support the high power level. To reach the necessary
power threshold, multiple gain stages are required, as
each stage must handle relatively high power with limited gain at each stage. Of all the cascaded amplifiers,
only the TX gain block could be SOI technology, while
GaAs amplifiers could serve the other gain stages except for the output PA. A coupler at the output of the PA
samples the output to provide feedback for the digital
pre-distortion (DPD) to enhance the transmitter linearity
and efficiency. The topology presented here also has a
circulator at the antenna port to route the TX and RX signals to the appropriate signal chain, and a receiver protection circuit, such as a high power handling (non-SOI)
PIN diode, is located at the input to the receiver LNA in
case of antenna or circulator failure. The RX signal chain
also uses GaAs LNAs and gain blocks as GaAs exhibits
good low-noise figure (NF). It can be observed that in
legacy RRH base stations there is limited potential for
using SOI technology.
However, the technical considerations for a mMIMO
AAS, as seen in Figure 10, create a variety of opportu11
s Fig. 12
High-level diagrams of digital, analog, and hybrid beamformers.
s Fig. 13
Beamforming topologies pros and cons. Source: “Massive MIMO, mmWave and mmWave-Massive MIMO
Communications: Performance Assessment with Beamforming Techniques” Tewelgn Kebede Engda, et al.
nities to employ SOI technology. In this example, the
radiated power from each antenna (32T32R) is only 10
W, with a total radiated power equivalent to the example in Figure 9. The output power of the AAS could be
lower and still provide the desired coverage due to the
advantages in antenna directivity provided by beamforming technology. Now the output peak power for
the transmitter PAs can be as low as 50 dBm, which can
be achieved using GaN or even GaAs technology with
higher gain because the output power is not as high. A
SOI digital step attenuator (DSA) may be used after the
SOI TX gain block for beamforming enhancement. As
there are multiple RF lines, there also needs to be multiple couplers at the output of each PA that provide the
feedback for DPD. To simplify the circuitry, these couplers can all be connected to an array of SOI single-pole
four throw (SP4T) switches. In this case, the protection
circuit for the RX signal chain can be realized with SOI,
as the relative power levels are within SOI diode power
handling range. A GaAs LNA is still desirable for low NF
performance, but an SOI RX gain block can be used, as
well as a SOI DSA at the receiver input for level control.
It is also possible to use SOI switched filter banks at the
input of the transceiver to enhance the transceivers selectivity and output performance. SOI is particularly well
suited for use as switches in filter banks as SOI switches
exhibit both relatively high-power handling, high isolation, and excellent linearity. It is clear from this example
that in modern AAS technologies there are now a multitude of opportunities for SOI in mMIMO sub-6 GHz
cellular telecommunications RFFEs.
12
s Fig. 14
Comparison of a fully digital beamformer and hybrid beamformer topology.
s Fig. 15
Typical hybrid AAS base station block diagram.
SOI OPPORTUNITIES FOR 5G BEAMFORMERS
Beamforming technologies are essential to achieve
high gain/directivity from antenna arrays and to provide
seamless connectivity to highly mobile UE. The three
main beamforming methods are analog, digital, or hybrid analog-digital (see Figure 12). A fully digital beamformer processes each RF stream in digital blocks, with
a dedicated digital-to-analog converter (DAC) and analog-to-digital converter (ADC) per line. In a fully analog
beamformer, a single stream is processed by the base
band, and the beamforming is done using attenuators
and phase shifters at the antenna elements. A hybrid
system splits the antenna elements into a number of
blocks, each with their own digital stream, with analog
phase shifters and attenuators for each element. Each
beamforming topology has its advantages and tradeoffs
(see Figure 13).
A fully digital beamformer has the highest degree of
freedom, data throughput, and UE coverage as each
RF line is processed as a dedicated stream, and each
stream is processed simultaneously. However, this requires power hungry processing for each stream and a
dedicated RF interconnect to each antenna element. An
analog beamformer has the lowest amount of complexity and power consumption at the expense of flexibility
and number of data streams. A hybrid beamformer is a
compromise between the flexibility and higher performance of a fully digital beamformer and the lower complexity but less effectiveness of an analog beamformer.
In the example in Figure 14, a fully digital beamformer
with 4 RF lines is presented as well as a hybrid beamformer, also with 4 RF lines. The hybrid beamformer only
has one data stream that is digitally processed and uses
4 phase shifters and switches instead to perform the
beamforming. The hybrid beamforming consumes only
roughly one quarter the power of the fully digital beamforming, as the downstream RF electronics are passive
(phase shifters) or only require digital control (switches).
Moreover, the hybrid solution is also likely to be smaller,
lower cost, and to weigh less overall than a fully digi13
s Fig. 16
64T64R hybrid beamforming mMIMO block diagram.
tal beamforming solution. However, this comes at the
expense of only one independent stream compared to
full 4 streams in the case of digital beamforming for this
specific example.
To flesh out this example, Figure 15 is a high-level
diagram of a hybrid mMIMO base station with phase
shifting implemented with 8 SOI switches. In another
example, Figure 16, a 64T64R hybrid beamforming
mMIMO base station is detailed. In this diagram there
are 16 RF lines, each with their own PA, LNA, protection
switch, DAC/ADC etc. Each RF line is then connected to
4 antennas through 4 switched phase shifters. This hybrid topology exhibits much lower power consumption
and cost efficiency, as there are only 16 RF lines instead
of a full 64 RF lines with PA, LNA, circulator, coupler,
protection switch, DAC/ADC, and digital processing.
This approach is an opportunity for SOI, as the switched
phase shifters are composed of two SOI SP4T switches
and delay lines. SOI is well suited to help realize these
very high power (50 dBm), highly linear (IIP3>85 dBm)
and low insertion loss switches.
GaN, GaAs, SiGe, and CMOS technologies for a variety
of RF components. n
Resources
1. New Opportunities for SOI Technology in 5G Massive MIMO Base
Stations
2.5G’s Impact on RF Front-Ends for telecom Infrastructure – Overall
infrastructure RF front-end market share
Dual-channel Up-Down
Converter
PE128300
The PE128300 is a dual-channel TDD up-down
converter designed for 5G FR2 n258 and n257
frequency bands. Up to 16 different mode definitions
are pre-stored and selectable via a single-byte SPI
command. Mode definitions contain seven elements:
LO power on/off, V/H RX power on/off, V/H TX power
on/off and V/H T/R switch state. Learn More
CONCLUSION
5G NR mMIMO base station deployment is beginning to ramp up, and OEMs need to shift from reusing
legacy components and designs geared toward early
cellular telecommunication generations. New mMIMO
technology requires dramatically different components
than legacy base stations, and this necessitates a complete overhaul of the wireless technology. The new base
stations have far more RF lines and lower individual RF
line powers, which opens doors for the use of SOI technologies with many advantages. More development
and collaboration is needed by OEMs and RF component vendors to redefine new 5G NR mMIMO system
requirements and to optimize component performance
for better power efficiency, size, weight, and cost. This
will likely require greater levels of integration for which
SOI solutions provide some inherent advantages over
14
The Perfect HF Receiver.
What Would it Look Like Today?
Ulrich L. Rohde
Universität der Bunderwehr, Munich, Germany
Thomas Boegl
Rohde & Schwarz, Munich, Germany
Modern HF receivers must fulfill requirements such as sensitivity, robustness and many others.
Key requirements often lead directly to RF concepts and architectures with their specific
advantages and disadvantages. What would the perfect HF receiver look like today, one that
combines all available technologies into the most modern concept of a software-defined
receiver? Would it employ “IF sampling,” “direct sampling” or something else?
T
he architecture of a receiver is directly driven
by some key requirements which must be fulfilled. The number of these requirements can
be quite high but for an HF receiver design
there are only three major ones: 1) pick up weak and
wanted signals, 2) in the presence of strong interferers
within a given frequency offset, 3) at the same time.
Within these requirements are hidden values that
must be known in detail, for example, the required
sensitivity, the maximum level for interferers and the
frequency offsets between wanted signals and interferers. These three “golden parameters” can and must be
extracted from the operational scenario in which the receiver is used. In combination with the capabilities of
typical building blocks, such as analog-to-digital converters (ADCs), these three parameters determine the
most suitable receiver architecture.
Wanted
Signal
Interferer
Total Decoupling
Receiver
 Fig. 1
ATU
Transmitter
Receiver co-location scenario.
operated within short distances. Interferers at small frequency offsets not only provide strong signals at the
receiver front-end, but also introduce external interference caused by transmitter sideband noise. This falls
into the receiver’s passband and masks weak signals at
the receive antenna.
The transmitter in Figure 1 radiates a high-power signal shown as red arrows while the receiver tries to pick
up the weak signals shown as green arrows. The total
decoupling between the transmitter output and the receiver input determines how strong specific parts of the
transmitter spectrum appear at the receiver front-end.
The receiver specifications must be determined based
OPERATIONAL SCENARIOS FOR SOFTWAREDEFINED RADIO (SDR) HF RECEIVERS
High-end HF receivers must be able to provide high
sensitivity (if required) while strong interferers are simultaneously present (see Figure 1). Very strong interferers
can come quite close to the tuned center frequency of
the receiver, which is the case within some co-located
installations, for example, navy ships or coastal stations,
but also at field days with many amateur radio stations
www.mwjournal.com/articles/38120
15
on the characteristics of the interfering signals and the
transmitter installation close to the receiver.
Figure 2 illustrates this situation. The red interferer
transmits a strong signal at an offset of ∆f and the sideband noise of the transmit signal falls into the receiver
passband. This external noise is added to the noise floor
of the receiver given by the receiver noise factor which
leads to a resulting noise figure that limits its sensitivity.
In Figure 2, it is assumed that the receiver has a noise
figure of 10 dB. Other key parameters are strongly dependent upon the installation. The following values are
assumed for two different operational scenarios.
For military installations: frequency offset ∆f = 10
percent, total decoupling = 15 dB and interferer transmit power = 1000 W.
For amateur radio installations: (e.g., field days), frequency offset ∆f1 within same amateur band =100 kHz,
frequency offset ∆f2 to the next amateur band is greater
than 10 percent, total decoupling = 25 dB and interferer
transmit power = 150 W.
Note that a high-end receiver will not be able to
demonstrate its full performance in the presence of lowend transmitters. This requires feasible values for transmitter sideband noise available in both scenarios. The
transmitter parameters stated here are beyond those
of currently fielded transmitters because it is assumed
there will be improved transmitter capabilities in the
near future.
Excellent interferer TX sideband noise: -150 dBc/Hz
at 100 kHz for ∆f1
Excellent interferer TX sideband noise: -180 dBc/Hz
at 10 percent for ∆f2
The sideband noise at an offset of 100 kHz is determined by the synthesizer concept within the transmitter
while the value at 10 percent can be achieved by using additional so-called cosite filters in the right position within the block diagram. These cosite filters can
be switched into the receive chain and then reused as
preselector filters in the receive mode.
Difference in Levels X (dB)
Level (dB)
Interferer
Frequency Offset ∆f
Wanted
Signal
Interferer TX
Sideband Noise
Resulting Noise Floor of RX
Min. Noise Floor of RX: – 174 dBm/Hz + NF (dB)
Min. Noise Figure
NF of RX Design
Natural Noise Floor: – 174 dBm/Hz
Frequency
 Fig. 2
Key parameters for co-located installations.
Fa vs. Frequency (104 to 108 Hz)
180
2.9 × 1020
160
2.9 × 1018
140
2.9 × 1016
A
2.9 × 1014
100
2.9 × 1012
Fa (dB)
80
Ta (K)
120
C
60
WHAT IS THE PERFECT SDR HF RECEIVER
CONCEPT?
This is determined by combining the best available
technology for each of the required building blocks
within a block diagram and evaluating its performance
with respect to the influence of external interferers. This
approach is based on the concept of designing a receiver that may not be as good as technically possible but
is as good as operationally usable, which is a significant
difference.
The quality of a receiver is defined by the maximum
usable sensitivity in the presence of strong interferers.
How much stronger can these interferers be compared
to the weakest signals which can still be heard while the
interferers are present? Clearly, noise plays a significant
role in the design of the receiver, therefore the design
starts with an analysis of noise.
2.9 × 108
B
40
E
104
2.9 × 106
D
20
0
2.9 × 1010
2
 Fig. 3
5
105
2
5
2
106
Frequency (Hz)
5
107
2
2.9 × 104
5
2.9 × 102
108
Noise external to an HF receiver.
noise floor may be obscured by a noise floor picked up
by the antenna and applied to the receiver front-end.
This noise floor is variable over time, frequency, location
and antenna configuration. ITU has provided information within ITU-R P.272 to determine the level of external
noise (see Figure 3).
Figure 3 gives guidance on the external noise picked
up by an omnidirectional antenna and then fed to the
receiver front-end. The curves (A to E) within graph represent the noise level expected for:
A. Atmospheric noise, value exceeded 0.5 percent of
the time
Limits to Sensitivity – External Noise
The sensitivity of a receiver based on its design can
be very high. In many operational situations a receiver’s
16
B. Atmospheric noise, value exceeded 99.5 percent of
the time
C. Man-made noise, quiet receiving site
D. Galactic noise
E. Median city area man-made noise
F. Minimum noise level expected.
The intensity of the external noise within the graph
is shown as equivalent noise figure of a receiver, which
allows an easy comparison with the noise figure of any
given receiver design. In addition to the noise contributions shown in Figure 3, sideband noise of interfering
transmitters may also be received. Both noise contributions may mask the native sensitivity of the receiver design.
The most challenging environment for a receiver is
therefore when the receiver is installed in a very quiet
geographical area and all interferers are of high quality.
This allows interferers to come very close and with high
levels to the receiver’s passband channel before their
sideband noise masks either the receiver’s own noise
floor or the low atmospheric noise.
The receiver design provides some gain to adjust its
sensitivity and some selectivity to suppress strong interferers. The quality of the receiver design is simply defined, therefore, by the quality of the balance between
these parameters to bring the spectrum at the antenna
into the operational window of the ADC.
ADC Full Scale (dBFS)
Back-Off (dB)
Head Room (dB)
Max. Operation (dBFS)
ENOB
Level (dB)
SFDR (dB)
WB Sensitivity dBm
SNR WB (dB)
Max. IM D (dBm)
Wideband
Noise Bandwidth
(dB)
NB Sensitivity dBm
SNR NB (dB)
Narrowband
ADC Device Noise (dB)
 Fig. 4
Device Noise Floor
Thermal Noise Floor
ADC parameters.
information of weak signals is hidden and can be extracted, for example, by decimation mechanisms. These
decimation algorithms can be seen as a kind of averaging. Averaging across ten samples, for example, may
increase the resolution by a factor of ten while reducing the sample rate by the same factor of ten as well.
Decimation algorithms basically enhance the effective
resolution of the signal processing chain by diving into
the noise and jitter at the output of the ADC.
The possible depth of this dive is limited to a point
where the jitter of the ADC itself cannot be separated
any further from the jitter related to the input spectrum.
The jitter from the ADC may also contain jitter from the
clock signal, therefore it is important that the applied
sampling clock signal is generated with the highest possible quality with respect to phase noise and spurious
content.
The value for ENOB does not yet provide any information about the quality of the signal processing chain
with respect to intermodulation or any other unwanted
signal which is not present at the input of the ADC but
appears at its output.
Unwanted signals at the output of an ADC may be
caused by a variety of effects, such as nonlinearity of
input stages or others. These discrete output signals often show a correlation between the sample rates used
and the spectral components of the input signals but
are normally not reliably predictable, either in their frequency or in their levels. Within a data sheet of an ADC,
its quality with respect to unwanted signals is given as
spurious free dynamic range (SFDR). Values for SFDR
depend on the settings, especially with sample rates,
input spectrum and chosen levels at the ADC input.
The ADC and its Essential Parameters
An ADC datasheet is filled with specifications, but
which ones should be looked at first when selecting a
particular ADC type? It is important to know the difference in magnitude between weak wanted signals and
strong unwanted signals at the input of the ADC. This
determines the operating window of the ADC and is an
important characteristic in the receiver design.
The analysis of an ADC data sheet normally starts
with resolution, noise factor and other parameters that
are fundamentally linked to achievable sensitivity. This is
done here in the opposite direction because it is easier
to understand the behavior of an ADC within the complete architecture of a receiver. Figure 4 shows the relevant parameters of an ADC that should be analyzed
first before any design decisions are made.
We start with the maximum level allowed at the input of an ADC, which is the ADC Full-Scale-Level. Any
signal present at the antenna of the receiver must safely
remain below this threshold, otherwise further processing steps are strongly affected and will deliver unusable
results. If strong signals at the antenna are very close to
the wanted frequency, an automatic gain control circuit
must set the right maximum gain to avoid ADC overload.
The next important parameter is the effective number
of bits (ENOB). It indicates how far below the ADC FullScale-Level a weak signal can be found and identified
by the ADC. It is important to know that a perfect lowresolution ADC may have a significantly higher ENOB
than an imperfect high-resolution ADC.
After sampling the input signals, any ADC will show
some jitter within the digitized data. Inside this jitter the
Receiver Design
The ADC is the key component within the concept
of a software-defined receiver. Dynamic range is one of
the most important parameters required for the selection
of the ADC itself and the right receiver concept as well.
For very high RF frequencies (far higher than 30 MHz) the
17
possible operating frequencies might be the only available criteria for the selection of an ADC. An HF receiver
requires either a direct sampling capability of any frequency up to 30 MHz or the capability to process a fixed
frequency typically below 100 MHz for an IF sampling
concept.
Several companies offer ADCs with up to 18-bit resolution with sample rates of up to 100 MHz or more. The
input stages can be operated with a bandwidth of some
hundred MHz. This would allow the use of the same devices with subsampling as part of an IF sampling receiver. Subsampling concepts require a clear knowledge of
the input spectrum to be sampled, therefore, sufficient
band limitation, for example with a bandpass filter, is
required. The combination of a bandpass filter with a
subsampling ADC would be a valuable back-end part of
an IF sampling receiver concept.
With modern ADC devices, an SFDR of 90 to 100 dB
can be expected. This means that the maximum allowed
difference in level between a weak wanted signal and
a strong interferer can be in the order of 90 dB when
both signals are applied simultaneously to the input of
the ADC.
suitable high-end ADC and high performance preselector filters.
Wideband SDR HF Receiver
The main purpose of a wideband receiver is to monitor a wide instantaneous bandwidth up to the complete
HF band. The frequency range may start at 10 kHz or
even lower and will go up to 30 MHz. It is possible to use
a direct sampling SDR concept or transfer the complete
HF band to a different frequency for further processing
by using a frequency converter, as it is done, for example, within a spectrum analyzer. The frequency conversion will always lead to an IF frequency well above 30
MHz, typically 70 MHz or even higher. In fact, it will then
require an ADC with higher performance than one for
direct sampling, because the ADC will operate at higher
frequencies while the expectation for a high dynamic
range within a 30 MHz bandwidth will not change.
The phase noise and jitter quality of either the local
oscillator or the sampling clock determines the achievable quality for desensitization and selectivity of the
total receiver. The requirements with respect to the
spectral purity of the local oscillator used for mixing will
be higher than those for the sampling clock of a direct
sampling concept just based on the different frequencies. Additionally, the wideband mixing concept will
struggle to achieve good spurious suppression because
there are a variety of effects linked to a wideband mixing
concept which may lead to unwanted spurious signals in
front of the ADC.
These basic facts and their dependencies already
lead to a direct sampling receiver concept as the best
basis for a wideband HF receiver with the capability to
monitor up to 30 MHz of instantaneous bandwidth.
Gain and Selectivity Between the Antenna and
ADC
The stages between the antenna and the ADC are
responsible for bringing the spectrum at the antenna
into the operating window of the ADC. If the difference
in levels appearing at the antenna are higher than allowed at the ADC input, a preselector filter must suppress the strongest signals. If this suppression is not
sufficient, the gain must be set to ensure that the ADC
is not overdriven. In total, the receiver may lose some
sensitivity compared to a use case with no interferers
present. If the interferer’s phase noise masks the receiver’s own noise floor (see Figure 2) or the natural
noise floor from the environment (see Figure 3) even
perfect selectivity within the receiver would not help to
improve this situation. Reduced gain, in this case, will
improve the receivers robustness by reducing nonlinear effects such as cross modulation and/or intermodulation; but, the maximum possible sensitivity will be
limited by the external noise.
These fundamental facts provide clear advice for
choosing the best concept for an SDR HF receiver:
1)
If the selectivity of the preselector filters is good
enough to bring any spectrum situation into a setting
where the ADC is not overdriven and the wanted sensitivity is still available, then a direct sampling concept is
usable and is recommended.
2)
If the selectivity of the preselector filters is not
sufficient, then an IF sampling concept is necessary because the missing selectivity can only be added within
the IF domain.
The flexibility of a direct sampling concept is greater than for an IF sampling concept because the digital
signal processing has a wider access to the spectrum.
Therefore, it is recommended to start first with a direct
sampling approach and then try to extend its performance to the technological maximum or to the technological need based on the use cases by selecting a
Narrowband SDR HF Receiver
It is assumed that interferers can come as close as 100
kHz to the wanted signal in use cases where CW is received at the lower end of an amateur radio band while
SSB is received at the upper end of the same band. If
interferers are in the next adjacent amateur radio band,
then frequency offsets of 10 percent or more apply.
A sufficiently high selectivity at an offset of 100 kHz
cannot be achieved directly with a preselector filter,
therefore the spectrum is transferred into an IF domain
where additional narrowband filters can provide much
higher selectivity than any preselector. If, because of
this, an IF sampling concept applies, then an optimization process can be employed.
The choice of the right IF frequency is essential and
the best results are achieved at around 70 MHz to keep
away from any potential intermodulation products. It is
also recommended to use IF filters with different bandwidths, for example, 500 Hz for CW up to 250 kHz for
the new upcoming wideband HF data modes according to the latest versions of MIL-STD 188-110. Narrower bandwidths within the bandwidth of the IF filters are
realized by digital signal processing mechanisms.
After optimizing the IF filter, a final selection of the
ADC can be done because within an IF sampling concept even a low-end ADC may be sufficient to achieve
overall excellent performance for the entire receiver.
18
TABLE 1
DATA SHEET FOR A HIGH-END SDR HF RECEIVER
Tuning range:
10 kHz up to 30 MHz
Path 1 Wideband:
10 dB
Max. Noise figure of RX without Interferer with
Pre – Amp on:
Path 2 Narrowband:
15 dB
Path 1 Wideband:
A1A (200 Hz): 95 dB
J3E (3000 Hz): 95 dB
Max. allowed Difference between Interferer and
wanted Signal:
Path 2 Narrowband:
A1A (200 Hz): 150 dB
J3E (3000 Hz): 140 dB
Path 1 Wideband:
A1A (200 Hz): -135 dBm or 0,04 µV
J3E (3000 Hz): -123 dBm or 0,16 µV
Sensitivity of RX without Interferer (pre Amp on)
Path 2 Narrowband:
A1A (200 Hz): -130 dBm or 0,07 µV
J3E (3000 Hz): -118 dBm or 0,28 µV
Use case 1 military:
1000 W with -180 dBc/Hz at 10% and an antenna decoupling of 15 dB
Sensitivity of RX with Interferer present:
Use case 2 amateur:
150 W with -180 dBc/Hz at 10% and an antenna decoupling of 25 dB
Use case 3 amateur
150 W with -150 dBc/Hz at 100 kHz and an antenna decoupling of 25 dB
Use case 1 (with preselector > 55 dB at 10%):
A1A (200 Hz): -106 dBm or 1,12 µV
J3E (3000 Hz): -94 dBm or 4,46 µV
Use case 1 (without preselector):
Any mode: - 50 dBm or 710 µV
Path 1 Wideband:
Use case 2 (with preselector > 55 dB at 10%):
A1A (200 Hz): -124 dBm or 0,14 µV
J3E (3000 Hz): -112 dBm or 0,56 µV
Use case 2 and 3 (without preselector):
Any mode: - 68 dBm or 89 µV
Use case 1:
A1A (200 Hz): -106 dBm or 1,12 µV
J3E (3000 Hz): -94 dBm or 4,46 µV
Use case 2:
A1A (200 Hz): -123 dBm or 0,16 µV
J3E (3000 Hz): -111 dBm or 0,63 µV
Path 2 Narrowband:
Use case 3:
A1A (200 Hz): -94 dBm or 4,46 µV
J3E (3000 Hz): -82 dBm or 18 µV
A1A - Signaling by keying the carrier directly, i.e., continuous wave (CW) or
on-off keying (OOK).
J3E - SSB speech communication.
CONCLUSION
Both direct sampling and IF sampling are state-ofthe-art concepts for SDR HF receivers. For wideband
receivers direct sampling is the clear choice, while for
narrowband receivers an IF sampling concept is recommended. For a high-end receiver providing, for example, a panoramic view of the entire HF band while
narrowband signals are operated in parallel, it is recommended to use two separate and independent receiver
paths representing the two SDR receiver concepts.
Table 1 shows what is possible today. The two different paths are Path 1 for direct sampling of wideband
signals and Path 2 for IF sampling of narrowband signals.
A full, more detailed, version of this article will be
posted on the Microwave Journal website.
ACKNOWLEDGMENT
We want to thank Hans Zahnd (HB9CBU), Robert
Traeger (Rohde & Schwarz) and Harald Wickenhäuser
(DK1OP, Rohde & Schwarz) for their support during the
creation of this article.n
19
Improving Linearity of a Doherty
Power Amplifier with a DualBias Structure
Zhiwei Zhang, Chen Li and Guohua Liu
Hangzhou Dianzi University, Hangzhou, China
Zhiqun Cheng
Hangzhou Dianzi University, Hangzhou, China, Chinese Academy of Sciences, Suzhou, China
A novel dual-bias circuit structure increases a power amplifier’s video bandwidth while reducing
the memory effect, thereby improving its linearity. A Doherty power amplifier (DPA) operating in
the 5G communication band (3.4 to 3.6 GHz) and incorporating this circuit achieves a saturated
output power of 43 to 44 dBm with a saturated drain efficiency greater than 70 percent. Drain
efficiency is 51 to 55 percent at 6 dB power back-off and greater than 43 percent at 8 dB backoff. As output power reaches 42.7 dBm, the adjacent channel leakage ratio (ACLR) is less than
-46 dBc combined with digital predistortion (DPD).
F
or increasing the data transmission rate and the
capacity of wireless communication systems,
modulation signals with high peak-to-average
power ratios (PAPR) are widely applied, and
DPAs have become the mainstream for base station
power amplifiers.1-4 Correspondingly, video bandwidth
(VBW) and memory effect are two important factors in
Doherty RF power amplifier performance.5
VBW plays a significant role in the operating bandwidth of the PA and affects the degree of DPD correction.6 If the instantaneous signal bandwidth is very close
to the VBW, PA linearity is seriously deteriorated and is
difficult to correct with DPD.7,8 It can also cause large
voltage and current offsets in the active device, resulting
in high internal temperatures and component damage.
Several methods to decrease the memory effect and
enlarge VBW have been proposed.9,10 Ladhani et al.9
obtained wider VBW by directly connecting series resonant circuits to the gate and drain electrodes of a transistor die in a package. This method is based on the
design of the transistor current plane and is not suitable
for practical circuit design. In addition, an LC resonant
bias network has been proposed to diminish baseband
impedance for reducing the electrical memory effect;10
however, the harmful effect of this method is that the
fundamental impedance decreases while reducing the
baseband impedance. The smaller fundamental impedance causes RF power to leak into the bias circuit. Furthermore, lumped-parameter components with large
parasitic elements are difficult to use in RF circuits.
This article describes a high efficiency and high
linearity 3.4 to 3.6 GHz DPA with a novel dual-bias
network structure to broaden the VBW and minimize
memory effects in a wideband DPA when transmitting
a 20 MHz A-LTE modulation signal. With the addition
of linearization technology, this DPA exhibits good linearity and high efficiency.11-16
KEY TECHNOLOGIES
Memory Effect
In a field-effect transistor amplifier, the majority of
undesirable memory effects are attributed to the baseband impedance, and the baseband impedance is
mainly determined by the impedance of the bias network in the low frequency band.17,18 When employing
DPD in an RF PA it is particularly important to reduce
the memory effect. The baseband impedance, Z, should
www.mwjournal.com/articles/36731
20
Output Impedance
Magnitude
be short-circuited at low frequencies (see Figure 1); but
unfortunately, it is not. The presence of baseband impedance causes the voltage at the drain of the power
transistor to change with input signal level. To reduce
memory effect, the baseband impedance of the drain
bias must be minimized.
f = 1/ (2πsqrt (L mCshun t ))
s Fig. 1
D
S
s Fig. 2
Vds
Lbias
Package
Lseries
Zb1
Cshunt
Typical transistor bias circuit.
Bias Network
Dual-Bias Network
Optimizing the memory effect requires reducing the
baseband impedance, and increasing the VBW requires
increasing the equivalent LC resonant frequency. A novel dual-bias network that does this is shown in Figure
3. Compared with a typical bias circuit, the dual-bias
network is simply two bias circuits in parallel. From the
principle of parallel circuits:
Vds
D
S
(2)
Lbias
Package
Lseries
Lshunt
G
Zb2
Lbias’
Cshunt
s Fig. 3
The dual bias circuit increases the equivalent LC
resonant frequency.
Where Zb1 and Zb2 are the drain bias impedances in
Figures 2 and 3, respectively. Because the drain node
impedance of the dual-bias network is half that of the
typical bias circuit, baseband impedance is reduced and
the memory effect improved.
Lbias and Lbias‘ in Figure 3 are λ/4 microstrip lines with
equivalent parallel inductance of 1/2 Lbias. The equivalent resonant frequency is:
Normalized Impedance Magnitude
Advanced De0.6
sign System (ADS)
Typical Bias
0.5
is used to simulate
Dual Bias
the two bias cir0.4
cuits. The results
0.3
plotted in Figure
0.2
4, show the resonant frequency of
0.1
the dual-bias net0
work to be about
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
1 GHz, more than
Frequency (GHz)
twice the resonant
frequency of a s Fig. 4 Simulated impedance vs.
typical single bias frequency of the typical and dual bias
network, which in- circuits.
creases the VBW
while reducing the baseband impedance.
(3)
where, Ln is the dual-bias circuit equivalent inductance
and Ln = Lshunt + Lseries + ½ Lbias.
The Cree CGH40010F transistor is used as an example. At a center frequency of 3.5 GHz, the transistor
equivalent model is analyzed and the λ/4 microstrip lines
equivalent inductance is calculated. Lshunt and Lseries are
lower than Lbias by an order of magnitude; therefore, Ln
can be expressed as:
L n = L shunt + L series +
1
1
L bias ~ L bias
2
2
Ideal vs. actual RF impedance.
Lshunt
G
Where, Lm is the typical bias circuit equivalent inductance and Lm = Lshunt + Lseries + Lbias. Cshunt represents
the shunted equivalent transistor package capacitance.
In general, Lbias is higher than Lshunt and Lseries by more
than two orders of magnitude. So, Lm ≈ Lbias. Therefore,
widening of the VBW can be achieved by reducing the
equivalent inductance of the bias circuit.
f = 1/ (2πsqrt (L nCshun t ))
Frequency
Bias Network
(1)
Zb1 = 2Zb2
Baseband
‘0’
DC
VBW
In modern communication systems, wide bandwidth
and multi-carrier modulation have been used for high
speed data transmission. Nevertheless, the modulation
signal bandwidth is limited by RFPA VBW. VBW depends
mainly on the equivalent LC resonance of bias networks
and transistor internal matching. Figure 2 is the equivalent circuit model of a transistor and a typical bias circuit.
The equivalent resonant frequency can be expressed as:
RF
Ideal
Actual
IMPLEMENTATION AND MEASUREMENT
RESULTS
The dual-bias network is verified with a DPA designed for 5G mobile communications in the frequency
band of 3.4 to 3.6 GHz. Figure 5 is a photograph of the
(4)
21
12
70
10
60
8
50
Gain (dB)
80
s Fig. 5
4
Fabricated GaN DPA.
dual-bias DPA. It is fabricated on a 30 mil thick Rogers
RO4350B substrate with a 3.48 dielectric constant. Cree
CGH40010F GaN HEMTs are used for both the carrier
and peaking amplifiers. The carrier amplifier is set to
Class AB with a gate bias of -2.75 V. The peaking amplifier operates in Class C with gate bias of -6 V. Referring
to the transistor datasheet, the drain operating voltages
of both amplifiers are set to 28 V.
The curves of the gain and efficiency of the DPA as a
function of output power are shown in Figure 6. Saturated output power can reach more than 43 dBm. Compared with the simulated efficiency, at low output power,
the measured efficiency is higher and at higher output
power, the measured efficiency is about three percentage points lower. The drain efficiency at saturation is
above 70 percent. When the output power is backed off
6 dB, it is in the range of 51 to 55 percent. The efficiency is higher than 43 percent when the output power is
backed off by 8 dB. Measured gain is slightly lower than
simulated. When approaching saturated output power,
gain appears to compress, but the average measured
gain is greater than 10 dB.
At the 3.5 GHz center frequency a 20 MHz LTE modulation signal with a peak-to-average power ratio of
7.1 dB is used to drive the DPA. The measured ACLR
is shown in Figure 7. Upper and lower sidebands are
-32.1 and -31.9 dBc, respectively, with an output power
of 42.7 dBm. After the addition of DPD they are -46.6
and -47.5 dBc, respectively.
Table 1 provides a performance comparison with
other published DPAs, showing improved drain efficiency and ACLR.
2
32
40
GHz
Gain Simulated 3.4
Gain Measured 3.4
DE Simulated
3.4
DE Measured
3.4
6
34
36
38
40
3.5
3.5
3.5
3.5
42
3.6
3.6
3.6
3.6
44
Drain Efficiency (%)
14
30
20
Output Power (dBm)
s Fig. 6
Measured and simulated gain and drain efficiency vs.
output power, 3.4 to 3.6 GHz.
ACLR (dBc)
CONCLUSION
–10
A new type of
No DPD
–20
dual-bias network
With DPD
structure
wid–30
ens RFPA VBW
–40
and reduces the
–50
memory
effect.
–60
To verify this, a
DPA
operating
3.46
3.48
3.50
3.52
3.54
Frequency (GHz)
from 3.4 to 3.6
GHz is designed
and
fabricated. s Fig. 7 Measured ACLR at 3.5 GHz.
The ACLR measured with DPD is lower than -46 dBc when using a 20
MHz LTE modulation signal with a PAPR of 7.1 dB. This
shows that the dual-bias structure not only widens the
VBW and reduces the memory effect, but is also easily
implemented.n
ACKNOWLEDGMENTS
This work is supported by National Natural Science
Foundation of China (No. 61871169).
References
1. W. H. Doherty, “A New High Efficiency Power Amplifier for Modu-
TABLE 1
PERFORMANCE OF PUBLISHED DPAS
Ref.
Frequency
(GHz)
Gain
(dB)
Pout
(dBm)
Drain
Efficiency
(%)
ACLR
(dBc)
PAPR
(dB)
Modulation
Signal
Bandwidth
(MHz)
Modulation Signal
11
3–3.6
10
43–44
55–66
N/A
N/A
N/A
CW
12
2.6
7–10
51.7
60.4
-35.5
8.3
5
WiMAX
13
2.14
16.6
36.9
57.0
-25
6.5
10
LTE
14
2.2–2.3
11.6–13.6
45
62.9–71
-30
N/A
N/A
N/A
15
2.9
10–15
43.8
64.9
-21
N/A
5
WCDMA
10
0.7–0.86
10–14
49.3
42
-30
7.2
100
LTE
16
3.4–3.6
7–9.5
49.5
60
-29
8.5
100
LTE
This Work
3.4–3.6
8.5–12.2
43.8
> 70
-32
7.1
20
LTE
22
lated Waves,” Proceedings of the Institute of Radio Engineers,
Vol. 24, No. 9, September 1936, pp. 1163–1182.
2.R. Pengelly, C. Fager and M. Ozen, “Doherty’s Legacy: A History
of the Doherty Power Amplifier from 1936 to the Present Day,”
IEEE Microwave Magazine, Vol. 17, No. 2, February 2016, pp.
41–58.
3.R. Darraji, D. Bhaskar, T. Sharma, M. Helaoui, P. Mousavi and F.
M. Ghannouchi, “Generalized Theory and Design Methodology
of Wideband Doherty Amplifiers Applied to the Realization of an
Octave-Bandwidth Prototype,” IEEE Transactions on Microwave
Theory and Techniques, Vol. 65, No. 8, August 2017, pp. 3014–
3023.
4.J. Wong, N. Watanabe and A. Grebennikov, “High-Power HighEfficiency Broadband GaN HEMT Doherty Amplifiers for Base
Station Applications,” IEEE Topical Conference on RF/Microwave
Power Amplifiers for Radio and Wireless Applications, January
2018.
5.M. Franco, A. Guida, A. Katz and P. Herczfeld, “Minimization of
Bias-Induced Memory Effects in UHF Radio Frequency High Power Amplifiers with Broadband Signals,” Proceedings of the IEEE
Radio Wireless Symposium, January 2007, pp. 369–372.
6.I. Takenaka, K. Ishikura, H. Takahashi, K. Hasegawa, K. Asano and
N. Iwata, “Improvement of Intermodulation Distortion Asymmetry
Characteristics with Wideband Microwave Signals in High Power
Amplifiers,” IEEE Transactions on Microwave Theory and Techniques, Vol. 56, No. 6, June 2008, pp. 1355–1363.
7.K. Moon, Y. Cho, J. Kim, S. Jin, B. Park, D. Kim and B. Kim, “Investigation of Intermodulation Distortion of Envelope Tracking
Power Amplifier for Linearity Improvement,” IEEE Transactions on
Microwave Theory and Techniques, Vol. 63, No. 4, April 2015, pp.
1324–1333.
8. Y. Cho, D. Kang, K. Moon, D. Jeong and B. Kim, “A Handy Dandy
Doherty PA: A Linear Doherty Power Amplifier for Mobile Handset
Application,” IEEE Microwave Magazine, Vol. 18, No. 6, September-October 2017, pp. 110–124.
9. H. H. Ladhani, J. K. Jones and G. Bouisse, “Improvements in the
Instantaneous-Bandwidth Capability of RF Power Transistors Using in-Package High-k Capacitors,” IEEE MTT-S International Microwave Symposium, June 2011.
10.C. Ma, W. Pan, S. Shao, C. Qing and Y. Tang, “A Wideband
Doherty Power Amplifier with 100 MHz Instantaneous Bandwidth
for LTE-Advanced Applications,” IEEE Microwave and Wireless
Components Letters, Vol. 23, No. 11, November 2013, pp. 614–
616
11. J. M. Rubio, J. Fang, V. Camarchia, R. Quaglia, M. Pirola and G.
Ghione, “3-3.6 GHz Wideband GaN Doherty Power Amplifier
Exploiting Output Compensation Stages,” IEEE Transactions on
Microwave Theory and Techniques, Vol. 60, No. 8, August 2012,
pp. 2543–2548.
12.J. Son, I. Kim, J. Moon, J. Lee and B. Kim, “A Highly Efficient
Asymmetric Doherty Power Amplifier with a New Output Combining Circuit,” Proceedings of the IEEE International Conference
on Microwaves, Communications, Antennas and Electronic Systems, November 2011.
13. H. Oh, H. Kang, H. Lee, H. Koo, M. Kim, W. Lee, W. Lim, C. S. Park,
K. C. Hwang, K. Y. Lee and Y. Yang, “Doherty Power Amplifier
Based on the Fundamental Current Ratio for Asymmetric Cells,”
IEEE Transactions on Microwave Theory and Techniques, Vol. 65,
No. 11, November 2017, pp. 4190–4197.
14.W. Shi, S. He and N. Gideon, “Extending High-Efficiency Power
Range of Symmetrical Doherty Power Amplifiers by Taking Advantage of Peaking Stage,” IET Microwaves, Antennas & Propagation, Vol. 11, No. 9, July 2017, pp. 1296–1302.
15.Y. Peng, L. Zhang, J. Fu, Y. Wang and Y. Len, “Modified Output
Impedance Matching Solution for Load Modulation Power Amplifier Performance Enhancing,” IET Microwaves, Antennas & Propagation, Vol. 9, No. 13, October 2015, pp. 1376–1385.
16.J. Xia, X. Zhu, L. Zhang, J. Zhai and Y. Sun, “High-Efficiency GaN
Doherty Power Amplifier for 100-MHz LTE-Advanced Application
Based on Modified Load Modulation Network,” IEEE Transactions
on Microwave Theory and Techniques, Vol. 61, No. 8, August
2013, pp. 2911–2921.
17.J. Brinkhoff, A.E. Parker and M. Leung, “Baseband Impedance
and Linearization of FET Circuits,” IEEE Transactions on Microwave Theory and Techniques, Vol. 51, No. 12, December 2003,
pp. 2523–2530.
18.Y. Cho, D. Kang, J. Kim, K. Moon, B. Park and B. Kim, “Linear
Doherty Power Amplifier with an Enhanced Back-Off Efficiency
Mode for Handset Applications,” IEEE Transactions on Microwave
Theory and Techniques, Vol. 62, No. 3, March 2014, pp. 567–578.
8-channel Beamforming
Front End
PE188200
It is organized as two independently controllable RF
chains of four channels supporting four dual-polarity
antennas or eight single-polarity antennas. Time
division duplex (TDD) mode operation switches power
amplifier/low noise amplifier (PA/LNA) branches
connected to each antenna port. Integrated splitter/
combiners and a phase and amplitude beamformer
for each channel complete each chain. Learn More
23
A Dive Into Integrated PA
Topologies for 5G mMIMO
Wolfspeed
The race towards hitting 5G speed, capacity, and availability requirements has come with it a
number of nascent foundational technologies. At the forefront of these innovations is massive
Multiple-Input Multiple-Output (mMIMO), or the outfitting of a base station with hundreds to
thousands of antenna elements, each with its own respective transmit/receive signal chain, to
maximize spectral efficiency.
The realization of mMIMO requires a high degree of integration with all components in the
transceiver, including the power amplifier (PA). This article discusses the various 5G trends and
challenges of mMIMO with a dive into the varying integration topologies for the commonly
used Doherty Power Amplifier (DPA). Finally, an introduction to Wolfspeed fully integrated PAs
is made by showing good RF performance over wide bandwidths.
5G INFRASTRUCTURE TRENDS
PA Design Challenges with Advanced Radio
Techniques
Power Amplifier (PA) design has been increasingly
difficult with modern cellular systems —
­ the OFDM
modulation scheme has a high peak-to-average power
ratio (PAPR) of around 8-10 dB. This, in turn, requires
the amplifier to stay at backoff, well within the linear region to meet adjacent channel power ratio (ACPR) or
adjacent channel leakage ratio (ACLR) requirements.
The issue with this is when the PA must function within
its linear region and away from saturation (its non-linear
region), it does not function nearly as efficiently. The use
of CA involves the aggregation of available contiguous or non-contiguous blocks of spectrum to increase
the throughput and latency of wireless communications
in what is typically a populated spectrum (sub-6 GHz).
This requires the amplifier to be at additional backoff
to avoid the interference of two non-contiguous carriers
transmitting simultaneously and to meet strict emissions
requirements. Additionally, the amplifier must operate
within a wide instantaneous bandwidth, creating a much
more complex design challenge to meeting ACLR requirements while maintaining a nominal efficiency.
Changes in xHaul
In the past, older iterations of 4G base stations (eNodeB) would involve antennas connected to remote radio
heads (RRHs) at the top of a cell tower for PHY layer processing that was attached to the baseband unit (BBU)
for more complex signal processing. On the network
level, multiple RRHs could be served by a pool of BBUs
at a far-edge location via the CPRI protocol over a fiber
optic link. This centralized RAN topology (C-RAN) has
shifted towards a disaggregated network architecture
to better fit the varying traffic, throughput, and latency demands of a location. Instead, the 5G architecture
involves a function split between the Centralized Unit
(CU) and a series of Distributed Units (DU), with the additional potential split of a Radio Unit (RU). In this split,
the DU handles low-latency, real-time traffic, while the
CU handles non-real-time protocols. This allows for a
higher throughput and lower latency communications
with a lower layer split (Intra-PHY split). It is known that
this split is required in order to support some advanced
radio techniques such as Carrier Aggregation (CA) and
Coordinated Multipoint (CoMP). For this reason, the
enhanced CPRI (eCPRI) protocol was released to better
support this functional decomposition.
www.mwjournal.com/articles/35439
24
Linearization/efficiency
enhancing techniques
These problems have led to
the increased utilization of linearization and efficiency enhancing
techniques. The Doherty amplifier configuration is amongst the
most popular efficiency enhancing
methodology for relatively high PAE
deep into the output backoff region. Linearization enhancing methods includes digital predistortion
(DPD) where the PA is able to operate near saturation without causing
nonlinearities. This is accomplished
by distorting the input in such way
that the distortions at the output are
minimized to increase linearity without compromising PAE.
s Fig. 1
Discrete (top) versus integrated (bottom) transistor configurations. Maximal
bandwidth can be achieved in the integrated example by minimizing the bandwidth limitations of the quarter-wave transformer, phase compensation, and offset lines.
MMIMO & THE NEED FOR
INTEGRATION
flexibility in terms of the basic design requirements on
power, size, weight, and cost.
Architectural Challenges of MIMO
MIMO has been leveraged for some time now in either a passive antenna topology or an active antenna
system (AAS). The issue with passive antenna structures
is the increase in channels (e.g., 4T4R, 8T8R, 16T16R,
32T32R), which is directly correlated to a larger antenna
count and leads to an increasingly higher port density
at the antenna. This, in turn, leads to an array of installation issues as well as unwanted signal degradation from
the increasing presence of potential Passive Intermodulation distortion (PIM) sources (e.g., coaxial connector
heads). The complexity of this problem only increases
with mMIMO. This is where the AAS architecture provides a more optimal solution with an integrated antenna/radio, the only connections that are required to the
system are a fiber and DC link for power and control.
This differs from older base station architectures where
a multi-port passive MIMO antenna structure would be
connected to an RRH to finally be routed to the BBU.
Benefits of Using GaN
The use of GaN transistors has already permeated
the wireless industry for large, macrocell high powered
amplifiers (HPA) and is well positioned to overtake the
popularized Si-based LDMOS PA that was previously
leveraged. This is due to the intrinsic benefits this substrate has for power applications — the wide bandgap,
combined with its high breakdown electric field, power
density allow for the handling of large powers all while
exhibiting a sufficient electron mobility and saturation
velocity to operate at high frequencies. Ultimately this
increases the device's reliability, as the amplifier is able
to withstand higher junction temperatures for longer
periods of time. GaN transistors are capable of this
all within a smaller package and at higher frequencies
(DC-40 GHz) as manufacturing techniques advance with
large wafer diameters and increasingly smaller gatelengths (e.g., 0.25μm, 0.15μm) fabrication processes.
GaN HEMT technology, in particular, has the capability
of achieving a higher efficiency at high frequencies, over
a wide bandwidth.
mMIMO PA Design Challenges
mMIMO has with it, its own design challenges. Each
transceiver chain must be optimized to minimize the inevitable losses, emissions, and non-linearities that will
occur. The PAs in this system must then meet linearity
requirements while also considering amplifier efficiency, all in a very integrated system package. The typical
use of linearity and efficiency enhancing techniques to
better meet ACLR requirements without compromising
efficiency greatly involves added circuitry which is not
typically integrated into the PA package. This is a significant consideration for mMIMO systems as any additional real estate used at the component-level compounds
at the system-level with massive number of antennas
and respective transmit/receive chains. An integrated
PA design with the most commonly leveraged Doherty
configuration and DPD linearization technique can be
highly beneficial for system engineers in the installation of mMIMO. This can then afford the designer more
Discrete vs Integrated Doherty Power Amplifiers
As mMIMO calls for an increase in integration, smaller form factors are demanded with a high level of linearity and efficiency over a wide bandwidth. Integrating the
popularized Doherty PA configuration to enhance efficiency would minimize the 5G New Radio (NR) size and
weight and ultimately yield large space savings on the
macro-scale in mMIMO installations (See Figure 1). The
benefits of small form factor and ease-off-integration
come with a number of design considerations though
— chief among them, the operating frequency and
operating bandwidth of integrated PAs are fixed. Still,
this design constraint can be relaxed by minimizing the
bandwidth limitation of the quarter-wave transformer,
phase compensation, and the offset lines found in the
Doherty configuration.
The discrete transistor topology (Figure 1a) has the
inherent advantages of increased flexibility as it can
25
s Fig. 2
Compact Doherty combining circuits for integrated PA in mMIMO applications.1-3
be tuned to different operating
frequencies. As such, its performance can be better optimized.
However, additional input/output
matching and combining circuits
are required leading to a relatively large form factor, an increase in
parts, and an additional layer of
complexity towards system integration.
GaN on SiC for Integrated
Doherty PA Configurations
It is beneficial to leverage
GaN-on-SiC for Doherty PA amplifiers due to its high frequency
operation (>3 GHz), broadband
capabilities with a wide instantaneous bandwidth, high power
density, and high efficiency. Since
SiC has a very high thermal conductivity of 3.7 W/cm-K than that
of GaN at 1.3 W/cm-K or Si at
1.6 W/cm-K, these devices can s Fig. 3 Schematic representation of the input circuit (a), output circuit (b), and entire circuit
achieve higher power densities (c) for an integrated DPA with a lumped CLC quarter-wave topology.1
more reliably, leading to a relaconventional DPA includes the offset line after the quartively larger load impedance than GaN-on-Si devices.
ter-wave transformer in order to compensate for the
This yields to more compact matching circuits, wideoutput capacitance of the transistors and to maintain
band circuit design, and a lower CDS, qualities that ulideal output load impedance values of both amplifiers.
timately lend itself towards higher terminal impedance
This, however, degrades the effective bandwidth of the
and broader band, high frequency operation. Moreover,
system as it has a narrower bandwidth than the quartera higher efficiency can be achieved by employing harwavelength transformer.
monic impedance tuning — a method that changes the
In one iteration of the lumped CLC quarter-wave toload impedances at the 2nd and 3rd harmonics to optipology, the output capacitor of the carrier amplifier is
mize the Power Added Efficiency (PAE) of the amplifier.
merged into the CLC quarter-wave structure while the
output capacitor of the peaking amplifier is resonated
UNDERSTANDING THE VARYING INTEGRATED
out with an RF choke inductor. Figure 3 shows the inTRANSISTOR TOPOLOGIES: AN ANALYSIS
put circuit (3a), output combining circuit (3b), as well as
There are several potential compact Doherty combinthe final schematic representation of the lumped CLC
ing circuits that can be leveraged to achieve an intebroadband DPA (3c). The use of the quarter-wavelength
grated PA. This includes the following (Figure 2):
transformer and the differently biased transistors leads
1
• Lumped CLC quarter-wave topology
to a need for a phase compensation circuit at the input
2
• Quasi-lumped quarter-wave topology
of a typical DPA. In this topology, the phase compensa• Lumped LCL quarter-wave topology3
tion network is merged into an input matching circuit.1
Lumped CLC Quarter-Wave Topology
As stated earlier, the bandwidth limiting factors in
Doherty PAs are the quarter-wavelength transformer,
phase compensation network, and the offset line. The
Input Matching Circuit/Phase Compensation
Network
The DPA requires a class-C biased peaking amplifier that turns off in low power regions with a class-AB
26
biased carrier amplifier for linearity in the high-power region.
However, the gain of the class-C
bias grows as the input power
increases and because of the
turn-on process of the transistor,
the input capacitance increases
as well, leading to a lower load
impedance for the peaking amplifier. Because of this variance in
the input impedance with input
Fig. 4 Different Doherty output networks to delivery 8 ohm at Zopt,c and Zopt,p at a center
power level, there is a variance s
frequency of 1.85 GHz. The network with an unmated Q (left) requires the use of a quarterin the division of power between wave transformer with a high ITR, narrowing the bandwidth. The matched Q network (right)
the peaking and carrier ampli- expands bandwidth with the addition of an offset line.5
fiers, ultimately weakening the
the Q is the same in the output matching circuit for the
DPA’s broadband performance. Typically, an additional
carrier, peaking amplifier and quarter-wave transformer,
phase compensation circuit is placed at the input of the
the bandwidth is widened (Figure 4). In this topology,
DPA to eliminate the phase difference caused by the difthe output capacitance of both the carrier and peakferently-biased transistors and the addition of the quaring amplifiers are merged into their output matching
ter-wavelength transformer. Broadband input matching
circuits. However, this slightly altered topology requires
circuits are employed to enable a consistent division of
the need for an additional offset line in the output path
power and input matching across the bandwidth. Howof the peaking amplifier.
ever, both these additions take up real-estate while the
Another output matching circuit lumped CLC quaraddition of the phase compensation network generally
ter-wave
topology aims to remove the conventionally
limits the bandwidth of the DPA.
leveraged
offset line in the peaking amplifier in order to
It is desirable for more power to be driven to the carmeet
the
size
constraints for mMIMO applications. Typirier amplifier at low powers to prevent the peaking amcally,
DPAs
will
include a quarter-wavelength offset line
plifier from turning on early — an event that damages
in
the
carrier
amplifier
and half-wavelength offset line
efficiency as the peaking amplifier is drawing more DC
in
the
peaking
amplifier
after the output matching netcurrent. At high powers, it is also preferable to provide
works
for
proper
load
modulation
and wideband permore power to the peaking amplifier in order to ensure
formance.
This
replacement
is
accomplished
by instead
proper load modulation and optimal linearity from IMD
using
a
series
inductor
(L
),
a
shunt
inductor
(L
p1
p2), and a
cancellation. A Wilkinson power divider can accomplish
series
capacitor
(C
)
after
the
peaking
amplifier
(Figure
p1
this load modulation by ensuring the input impedance
5).
This
way,
both
the
frequency
dependent
compensaamplifier is mismatched while the input impedance of
tion functions that the offset lines provide and the outthe peaking amplifier is matched to port impedance at
put matching functions can be combined into a more
the maximum output power. This way, maximal power
simplified, space-constrained circuit. In this circuit, the
is driven to the peaking path at high powers and the
impedance at power backoff (Γp.b.o ) has a similar freeffective bandwidth of the DPA is expanded. This toquency characteristic to that of a half-wavelength line
pology includes a two-section high-pass filter (HPF) to
that acts as an open stub at the center frequency, is
both compensate for phase and match the input impedinductive at lower frequencies, and capacitive at high
ance with the addition of the Wilkinson divider to drive
frequencies. Moreover, the impedance of the peaking
a more dynamic load modulation to maximize efficiency
amplifier at saturation (Γp.sat ) can be transformed into
1,5
and linearity of the system.
any real impedance lower than the optimal impedance
Output Matching Circuits
of the peaking amplifier (Ropt.p).
In implementing this topology, the bonding wires
For the output matching circuit, the ZLoad impedance
connecting the peaking FET and the circuit are includis increased to reduce the impedance transformation raed in the value of Lp1 while series bonding wires from
tio (ITR). A low ITR has a low Q characteristic, a paramthe carrier FET is included in the output matching neteter that is inversely proportional to the BW. By ensuring
s Fig. 5
Simulated results (5a) of the impedance looking into the peaking amplifier from the power combinating node at saturation
(Γp,sat) and backoff (Γp,B.O.) at different impedance transformation ratios (γ2) Full schematic diagram (5b) of alternative DPA.4
27
s Fig. 6
A π-type low-pass and high-pass circuit (left) is used to replace the quarter-wave transmission line in conventional DPAs,
saving on space. This can be further optimized by merging in shunt inductive components (Lp and LT) into a singular inductor (L’T)
(right).3
work with Lc1, Lc2 while the
offset line is formed by the
transmission line TLc1 (Figure
5b). This leads to a 10mm by
6mm package (after molding) that is implemented on
a multilayer epoxy substrate.
Final drain efficiencies stand
at 53.7% and PAE at 44.8%,
both at 8 dB backoff, while
the peak output power is 45.3
dBm, and gain is 28 dB (at 8
dB backoff).
LUMPED LCL QUARTERWAVE TOPOLOGY
Output Network
In a lumped LCL quarterwave topology (Figure 6
(left)), the output capacitance of both amplifiers is
resonated out using a shunt
inductor. The impedance of
the peaking amplifier is inherently high because of this
resonance, eliminating the
need for an additional offset
line. And, instead of using a
quarter-wave
transmission
line, a high-pass LCL circuit
is used to perform the same
function. This, however, can
be simplified by merging the
shunt inductors with its adja- s Fig. 7 2nd harmonic control circuit used at the input of a lumped LCL quarter-wave DPA
cent shunt components (Fig- topology. Large drain efficiencies and gain of over 42% and 13.5 dB are achieved respectively at
ure 6 (right)). And, because of 7.2 dB backoff.6
the large load impedance of
the need for the DPD circuit and maximize linearity by
the GaN HEMT, the output load impedance can more
instead cancelling the IM3s of the carrier and peaking
readily achieve 50 Ω.
amplifiers at the output combining point.6 A high efficiency (up to 70%) can be accomplished by matching
Input Network: 2nd Harmonic Control Circuit
the harmonics to the optimum impedances. In some
Several iterations utilizing a lumped LCL quarterversions, second harmonic input control circuits are rewave topology for the output circuit attempt to mitigate
28
alized through a parallel LC network that experiences resonance
(open circuit) at the fundamental
frequency. This LC network and
the bond-wire exhibits capacitive impedance at the second
harmonic frequency generates a
series resonance for a short-circuit at the second harmonic frequency.3 Achieving this second
harmonic impedance around the
short point can improve drain efficiency considerably (Figure 7).
A tunable capacitor can also be
used at the input of the carrier
amplifier for multi-band operation. This way, the capacitor can
be tuned IM3 performance can
be optimized for dual-band ca- s Fig. 8 Final stage integrated PA and fully integrated PA with operation in the S-band and
ability to cover 200 MHz and 300MHz IBW 4G LTE and 5 NR signals respectively.
pability.7
In some lumped LCL topolo• The need for a relatively large load impedance
gies, both the input and output include harmonic con• The need to achieve an adequate load modulation of
trol circuitry to match the harmonics of the output imthe carrier amplifier through a 90o phase circuit
pedance for the carrier and peaking amplifiers with the
optimum impedances for drain efficiency.7
• The need to achieve a high output impedance in the
peaking amplifier to minimize the power leakage to
QUASI-LUMPED QUARTER-WAVE TOPOLOGY
the FET while ensuring a phase relationship with the
The quasi-lumped, quarter-wave architecture comcarrier amplifier
pensates for the output capacitance of the carrier and
With all of these considerations there is a general
peaking amplifiers incorporating it in a transmission line,
challenge of integrating the phase compensation netultimately forming an impedance inverter. This way, by
work, input matching and output harmonic control circhoosing the right length and characteristic impedance
cuit together on the input side of the DPA. On the outof the artificial transmission line the output capacitances
put side, combining the output matching network for
and the bond-ware capacitance can be absorbed. And,
proper load modulation as well as replacing the offset
rather than be limited by the bandwidth of the conlines and quarter-wave transformer with discrete inducventional half-wavelength transmission line impedance
tors and capacitors for comparable wideband perforinverter and the bandwidth of the parallel resonator
mance is the design challenge.
(inductor) that is typically used to eliminate the output
Wolfspeed integrated DPAs offer two topologies
capacitances.2 However, this asymmetrical DPA design
(Figure 8):8
can lead to sensitivity issues due to the difference in
• A final stage integrated PA (includes only final stage)
output capacitances between the carrier and peaking
• Fully integrated PA (includes both driver and final
amplifiers.
stages)
WOLFSPEED GAN ON SIC INTEGRATED POWER
AMPLIFIERS FOR MMIMO
There are some general conclusions that can be
gleaned from the previous topologies aiming for an integrated DPA approach. They are as follows:
Final Stage Integrated PA performance with DPD
Linearization
With DPD linearization, a five carrier (5C), 20 MHz LTE
signal —100 MHz instantaneous bandwidth (IBW) —
s Fig. 9
ACLR plot for Wolfspeed final stage integrated PA with DPD linearization of 5C, 20 MHz LTE signal with 100 MHz IBW (left)
and 10C, 20 MHz LTE signal with 200 MHz IBW (right).
29
with 8 dB PAPR at a center frequency (fo) of
3.55 GHz, an ACLR of -55.1 dBc to -56.5 dBc
is achieved. This is accomplished as well as
an average output power of 39.5 dBm and
a high efficiency performance. A ten carrier
(10C), 20 MHz LTE signal (200 MHz IBW) at 8
dB PAPR and at a fo of 3.5 GHz, an ACLR of
-50.3 dBc to -51.7 dBc is gained (Figure 9).
Fully Integrated PA Performance with
DPD Linearization
The fully integrated PA tested with a 10C,
20 MHz LTE signal (200 MHz IBW) and a
PAPR of 8 dB at a 3.5 GHz center frequency
yields an ACLR of -49.9 dBc to -50.3 dBc. An
average output power of 37.5 dBm with a
high efficiency as well (Figure 10). In other
words, it is possible to accomplish an integrated DPA with the input and output driver s Fig. 10 ACLR plot for Wolfspeed fully integrated PA with DPD linearization
stages as well as the input and output DPA for 10C x 20 MHz LTE signal (200 MHz IBW).
stages within a small form factor to better
4. S. Sakata, et al., “A Fully-Integrated GaN Doherty Power Amplifier
fit the needs of 5G mMIMO. Moreover, with
Module with a Compact Frequency-Dependent Compensation
the right design and optimization, this can be done unCircuit for 5G massive MIMO Base Stations,” IMS 2020
der a wide bandwidth signal with up to 300 MHz IBW.
5.Daehyun Kang, et al., “Design of Bandwidth-Enhanced Doherty
Power Amplifiers for Handset Applications,” TMTT 2011
6.Seunghoon Jee, et al., “A Highly Linear Dual-band Doherty Power Amplifier for Femto-cell Base Stations,” IMS 2015
7.Yunsik Park, et al., “GaN HEMT MMIC Doherty Power Amplifier
With High Gain and High PAE,” MWCL 2015
8.Jangheon Kim, et al., “GaN-on-SiC Integrated Power Amplifier
for 5G Multi-User Massive MIMO Application,” EuMW 2020.
CONCLUSION
The various 5G infrastructure trends have led to tighter design tolerances with advanced radio techniques,
higher performance requirements, tighter restrictions,
and more integration. There is a general call for a higher
degree of modularity, PAs for mMIMO are no exception
to this trend, where PAs are expected to achieve both a
high linearity and efficiency all within a small form factor.
This leads to the need for an integrated DPA where a
number of design challenges crop up when both minimizing and combining the input and output circuits of
the carrier and peaking amplifiers while achieving broadband performance. The GaN HEMT using the GaN on
SiC is a promising candidate for the integrated DPA with
several advantages including a wide bandwidth performance and the ability to achieve higher efficiencies
than other technologies. Wolfspeed 5G mMIMO GaN
on SiC integrated PAs show high linearity and efficiency
under wide bandwidth signals — all within a small form
factor.n
UltraCMOS®
SP4T RF Switch
PE42545
The switch die supports a wide frequency range
from 9 kHz to 67 GHz. It delivers low insertion loss, fast
switching time, high isolation performance, making this device ideal for test and measurement, 5G
mmWave, microwave backhaul, radar and satellite
communication applications. No blocking capacitors
are required if DC voltage isn’t present on RF ports.
Learn More
References
1.Seunghoon Jee, et al., “GaN MMIC Broadband Doherty Power
Amplifier,” APMC 2013
2.J. H. Qureshi, et al., “A Wide-Band 20W LMOS Doherty Power
Amplifier,” IMS 2010
3. Hwiseob Lee, et al., “Highly Efficient Fully Integrated GaN-HEMT
Doherty Power Amplifier Based on Compact Load Network,”
TMTT 2017
30
5G NR Challenges & Trends in
RFFE Design
Peter Bacon, Senior Director of Systems and Applications Engineering
Young-Taek Lee, Senior Staff Engineer of RF Cellular Systems
pSemi®
The proposed capability enhancements from 4G long-term evolution (LTE) to 5G new radio
(5G NR) were a massive leap designed to boost mobile telecommunications applications and
enable many more. Aside from significantly boosting all major performance metrics, the 4G
to 5G transition also heralds a more flexible and capable radio architecture with additional
millimeter-wave frequency spectrum on top of legacy 4G LTE-Advanced (LTE-A) and new sub-6
GHz frequency bands. 5G also intrinsically supports new use cases beyond enhanced mobile
broadband (eMBB) including ultra-reliable low latency communications (uRLLC) and massive
machine type communications (mMTC). Plans also exist to further expand the 5G frequency
bands to cover both licensed and unlicensed millimeter-wave spectrum. Moreover, 5G NR
allows for both frequency-division duplex (FDD) and time-division duplex (TDD) operation with
wider channel bandwidths, increased max-power user equipment, higher-order modulation
schemes, and mandatory multi-antenna architectures. 5G NR RF front end (RFFE) design
engineers benefit from understanding these trends and aspects of the new RF hardware and
technologies needed to address these new challenges.
5G NR TRENDS
The 5G NR ramp-up is in full swing with many organizations striving to achieve 5G NR performance goals,
especially with the new spectrum allocations (see Figures 1 and 2). The millimeter wave (mmWave) FR2-1
and FR2-2 frequency ranges are of great interest due
to the extreme amount of bandwidth available at these
frequencies, lack of other interfering deployments, increased atmospheric attenuation (which can aid in mitigating interference), and the proportional size reduction
in antenna and other RF hardware elements that comes
with higher-frequency operation.
FR2 mmWave technology allows for advanced/active antenna systems (AAS) that are extremely compact
and sophisticated multi-input multi-output (MIMO) and
beamforming systems with incredible throughput compared to 4G LTE-A technologies. The 5G NR enhancement over 4G LTE-A and new frequency bands enable
greater capacity, connection density, peak data rates,
and user experience data rates. 5G NR also comes with
increased modulation schemes, new encoding, and additional layers that support new use cases. These combined features in the 5G NR standards empower 5G to
boost mobility, reduce latency and enable higher net-
s Fig. 1
Key capabilities of 5G NR compared to 4G LTE-A.
Source: IMT Vision – Framework and overall objectives of the
future development of IMT for 2020 and beyond, ITU-R Recommendation M.2083-0, Sep. 2015.
31
s Fig. 2
3GPP 5G NR band definitions.
s Fig. 3
Plot of 5G NR FR1 and FR2-1 frequency bands; frequency of the sub-carrier spacing versus time slot showing the slots for
uplink, downlink, and flexible slots.
BWPs enables a far more flexible use of spectrum based
upon individual user equipment (UE) use cases.
Compared to a maximum channel bandwidth of 20
MHz per CC for 4G LTE-A, 5G NR FR1 can use a maximum channel bandwidth per CC of 50 MHz with 15 kHz
subcarrier spacing (SCS) and 100 MHz with 30 kHz or
60 kHz SCS. FR2-1 allows for 200 MHz when using 60
kHz SCS and up to 400 MHz when using 120 kHz SCS
(see Figure 3). Higher SCS and maximum transmission
work energy efficiency with better spectral efficiency
than 4G LTE-A.
5G NR introduced the concept of bandwidth part
(BWP). A BWP is a set of contiguous resource blocks
(RBs) that can be set to different transmission bandwidths. Each BWP can have its own numerology, and
while multiple BWPs can be defined for a given carrier
component (CC), only one BWP can be active at a time
in downlink (DL) and uplink (UL). The introduction of
32
bandwidth allotments are being considered for the FR2nications among multitudes of machine-type sensors,
2 52-71 GHz frequency range (see Figure 4).
actuators, beacons, etc. (see Figure 5).
4G LTE-A was essentially designed purely for mobile
5G NR RFFE DESIGN CHALLENGES
broadband (MBB), though it was possible to configure
4G LTE-A to support other functions within that frameThe performance and capability enhancements of 5G
work. 5G NR has additional use case features built into
NR over 4G LTE-A bring additional challenges that RFFE
the standard that aid in supporting new applications for
designers must consider and address. One of these chalcellular wireless technology. The three initial and key use
lenges is TDD asynchronous inter-band operation—specases for 5G NR are eMBB, uRLLC, and mMTC. Each
cifically, when the transmission (TX) noise of a first band
use case has details of the specification and features defalls into the receive (RX) band of a second band when
signed to support the use case in ways that would not
they share an overlapping time slot. There are over 50
be feasible with a one-size-fits-all solution.
UL versus DL slot allocation formats for use in any one
For instance, uRLLC requires much lower latency and
band, and there are multiple band combinations where
higher mobility, such as with vehicle-toinfrastructure (V2I) or vehicle-to-vehicle
(V2V) applications for autonomous vehicles or driver safety features. However,
uRLLC applications do not prioritize capacity, peak data rate, UE data rate, or
spectral/network efficiency as much as
eMBB applications do. Similarly, mMTC
use cases prioritize connection density s Fig. 4 Table 5.3.2-1: Maximum transmission bandwidth configuration NRB.
and network efficiency over other perfor- Source: 3GPP TS 38.101-2 V17.7.0 NR; User Equipment (UE) radio transmission and
mance metrics to better serve commu- reception; Part 2: Range 2 Standalone
s Fig. 5
The three major initial use cases for 5G NR. Source: IMT Vision – Framework and overall objectives of the future development of IMT for 2020 and beyond, ITU-R Recommendation M.2083-0, Sep. 2015.
s Fig. 6
Asynchronous TDD operation where Band X TX could interfere with Band Y RX.
33
this overlap could occur. The significance of this potential interference and network operation is a function of
the noise levels, intermodulation (IMD) products, and
filter rejection levels of the hardware (see Figure 6).
SELF-DESENSE
This increased complexity of additional bands and
uplink band combinations of 5G NR compared to previous generations leads to increased risk for self-desense,
or self-interference, especially in the sub-6 GHz frequency band (FR1). Other factors to consider are the higher
maximum power levels and average power levels of 5G
NR TDD (see Figure 7). To put this into perspective, 5G
NR presents more than 60 FR1 band definitions with
over 3500 carrier aggregation (CA) and dual connectivity (DC) band combinations, along with the potential for
asynchronous operation. This includes the multi-mode
operation with UE and base stations operating LTE-A
and 5G NR transceivers simultaneously (EN-DC). If any
of these combinations result in substantial IMD distortion products, leakage, noise, or other interference injected into the receiver, the receiver’s sensitivity is reduced.
Maximum sensitivity degradation (MSD) is the metric in the 5G NR standard that defines the permissible
degradation of the receiver’s sensitivity for a particular
band combination. MSD is the amount the RX sensitivity
(REFSENS) is degraded for a particular band combination, and its value is dependent upon the maximum TX
power, isolation levels, linearity, bandwidth, and carrier
frequency, to name a few parameters. These factors also
include self-interference caused by coupling and crosstalk effects between the various functional blocks of the
radio frequency integrated circuit (RFIC), RF modules,
phone board, and the entire RF Front-end.
Figure 8 provides an example of the self-desense effect between two 5G NR FR1 frequency bands. In this
case, the UL transmission of Band n78 (3300 MHz to
3800 MHz) is coupling, possibly from multiple locations
in the UL signal routing, to the UL transmission of Band
n3 (1710 MHz to 1785 MHz uplink) causing intermodulation products at the Band n3 DL receive signal chain of
the RFFE (1805 MHz to 1880 MHz downlink) (see Figure
8). In this example, Band n78 is a TDD band while Band
s Fig. 7
TDD with duty cycle applied maintaining average
power at 23 dBm and FDD PC2 with duty cycle also applied using the bandwidth versus time calculation (BW*PSD = Pcmax).
s Fig. 8
A diagram using a simplified inter-band CA transceiver structure for 5G NR FR1 showing a potential self-desense/
self-interference mechanism due to the transmission of the UL
of Band n78 and UL of Band n3 impacting the DL of Band n3.
n3 is an FDD band, so the UL and DL of Band n3 are at
different frequencies. However, the second order intermodulation distortion products (IMD2) created by the
mixing of interference coupled from the UL of Band n78
and the UL of Band n3 into the DL of Band n3 could result in significantly high IMD products falling within the
Band n3 DL that may have enough energy to desensitize the receiver in the n3 band, worsen the bit-error
rate (BER) due to signal-to-noise ratio (SNR) degradation (see Figure 9), and negatively impact throughput.
s Fig. 9
A combined plot of the power spectral density (PSD) in dBm/Hz versus frequency (MHz) of the mechanism in Figure 8 with 5G
NR Band n3 UL, Band n78 UL, and the IMD2 product created by components in the transceiver structure falling in the DL of Band n3.
34
INCREASED CHANNEL BANDWIDTH RFIC
IMPAIRMENTS CAUSING DESENSE
A similar challenge is created from the increased
channel bandwidths of 5G NR frequency bands in the
sub-6 GHz FR1 compared to 4G LTE-A. With respect to
the FDD LTE-A bands that have been carried over into
5G NR FR1, many have had their channel bandwidths
increased without an increase in the duplex spacing.
This channel bandwidth increase allows additional opportunities for RFIC impairments to impact the transmission output signal quality, which could then impact
the receiver sensitivity if there is any coupling between
the transmission and receive signal chains. Examples of
these impairments could be an image signal (generated
during frequency conversion) from IQ mismatch or local
oscillator (LO) leakage. Moreover, the power amplifiers
(PAs) in the transmitter could exacerbate the level and
bandwidth of these RFIC impairments falling into the receive band compared to previous 4G LTE-A levels.
For example, let's consider 5G NR FR1 Band n28 with
an uplink frequency range of 703 MHz to 748 MHz and
a downlink frequency range of 758 MHz to 803 MHz.
Band n28 is an FDD band with duplex spacing of 55
MHz and 5, 10, 15, 20, or 30 MHz channel bandwidths.
It is possible that an image signal from IQ mismatch or
LO leakage is passed through a non-linear PA resulting
s Fig. 10
A diagram showing the RFIC and RFFE for 5G NR
FR1 Band n28 coupling interference from the transmitter UL to
the DL receive signal chain.
in distortion products that overlap the DL receiver frequency range leading to desense (see Figure 10 and
Figure 11).
Figure 12 shows that Band n28, with a 20 MHz channel bandwidth, only has the potential to cause limited
DL receiver desense, because only a fraction of the final
nonlinearity products would interfere with the DL frequency range. However, with a 30 MHz channel bandwidth, a larger portion of the 5th order IMD coming from
the RFIC is falling in the Band 20 DL. Both the IMD3 and
s Fig. 11
A diagram showing the odd order IMD products (3rd and 5th order specifically) and image power levels, and how that
can lead to desense of the DL receiver in 5G NR FR1 frequency bands.
s Fig. 12
Plots of simulated RFIC output (left) including its impairments and non-linearities, and PA transmitter output (right). This
figure shows plots for the RFIC and PA outputs considering a 20 MHz channel bandwidth (top) and a 30 MHz channel bandwidth
(bottom). It also contains rectangle-highlighted areas showing the UL (red) and DL (blue) frequency ranges for 5G NR FR1 Band n28.
35
IMD5 products, originating in the RFIC and amplified
by the PA, are worse for the increased bandwidth case,
which is enabled by 5G NR (see Figure 11).
cognitive radio techniques have also been proposed.
Using machine learning/artificial intelligence with cellular resource allocation could allow for better spectrum
optimization, not just with regard to cellular activity but
also potential interference from other wireless networking technologies and noise/interference generators.
This requires substantial development in cognitive radio
technology and protocols for facilitating cognitive networking and cognitive radio interactions.
For specific combinations that may suffer desense or
interference from IMD, one potential solution is to shift
the UL carrier frequency slightly to minimize self-desense
for cell-edge handsets. Referencing the example presented earlier (Figure 15) with 5G NR FR1 Band n28, a
slight shift of the UL
carrier
frequency
would subsequently cause a shift in
the IMD3 product
that would normally
overlap with Band
n28, and this would
also allow for increased DL channel
bandwidth (see Fig- s Fig. 13 Overlapping LNA gain and
ure 16).
NF visualization.
INCREASED RF BANDWIDTH AND CHANNEL
BANDWIDTH AMPLIFIER CONSIDERATIONS
Besides the potential for self-desense and self-interference, other challenges emerge because of increased
RF and channel bandwidths. In terms of hardware, one
of these considerations is selecting appropriate lownoise amplifiers (LNAs) for the extremely wide 5G NR
FR1 Bands n77 (3300 MHz to 4200 MHz), n78 (3300 MHz
to 3800 MHz), and n79 (4400 MHz to 5000 MHz). Each
of these bands also have channel bandwidths as high as
100 MHz per component carrier. There are several options for LNAs in these frequency ranges, each with their
advantages and trade-offs. Common-source LNAs with
inductive degeneration do exhibit low noise figures (NF)
but also have relatively narrow fractional bandwidths.
Common gate LNAs, with inductive degeneration, are
slightly inferior to common source LNAs in terms of NF
but have wider fractional bandwidths. A programmable
LNA is another option, though a designer would need
to consider that the tuned performance of these LNAs
depends on the carrier frequency. Last, a wideband LNA
with low NF and high gain may also be suitable, though
additional filtering may be necessary, or wideband and
reasonable gains may be achieved by combining multiple LNAs with slightly overlapping bandwidths that
cover the entire frequency range (see Figure 13).
Other hardware considerations are associated with
wide-channel bandwidth PAs that exhibit adequate
gain, efficiency, and other desirable performance metrics. With typically available PAs, current consumption
is a significant concern, because the complexities of
achieving higher efficiency with wider channel bandwidth is much higher than at narrower bands, especially
at the relatively high frequencies of Bands n77, n78, and
n79. To achieve reasonable levels of efficiency, envelope
tracking (ET) circuitry is necessary (see Figure 14). However, this circuitry also becomes more complex to design
and implement over 100 MHz channel bandwidths. Additionally, with many modern PA technologies, it is difficult to avoid asymmetric adjacent channel power leakage ratio issues because of memory effects in the PA.
s Fig. 14
NR PA.
STEPS TO TACKLE 5G NR RFFE DESIGN
CHALLENGES
Some methods exist to address these RFFE design
challenges, and some developments are needed. One
solution to tackle potential DL desense occurrences is to
use network optimization techniques involving spectrum
allocation with resource block (RB) placement. This could
be part of a larger, intelligent throughput-driven spectrum allocation scheme. Using RB placement for 5G NR
FR1 spectrum allocation can result in minimizing potential
degrading UL interactions that could desense DL receivers in the same band or nearby bands (see Figure 15).
RB placement can be done with relatively simple algorithms and lookup tables. However, some methods to
more intelligently handle real-time spectrum allocation
challenges that also help minimize DL desense using
s Fig. 15
High-level schematic of an ET modulator for a 5G
Example RB placement solution for spectrum allocation that minimizes potential DL desense occurrences with 5G
NR FR1.
36
s Fig. 16
Plot of current self-desense issues due to IMD products (left) and a potential solution involving shifting the UL carrier
frequency to minimize self-desense for cell-edge handsets.
ADDITIONAL RFFE TECHNOLOGY
DEVELOPMENTS
To address the changes and growing expectations for
5G NR performance and capability, additional developments are needed, especially in RFFE hardware and systems. In the face of mandatory multi-antenna AAS technology, these developments also need to be extremely
compact, readily integrated into panelized antenna solutions, and more efficient. Moreover, wider bandwidth
LNAs and PAs are needed to tackle the higher-channel
bandwidths and widebands for some of the higher-frequency FR1 frequency bands. With increased UL power,
high-power tolerance and high-efficiency PA designs are
needed. The more complex modulation schemes in the
latest 5G NR specifications also increase the need for
even lower error vector magnitude RF block design to
ensure that those higher-order modulation schemes are
practically obtainable. In general, to reach the speeds
and fidelity needed for 5G NR, linearity thresholds are
rising for switches, PAs, and LNAs, which will also be a
step toward reducing the chance for self-desense. With
5G NR, it is likely impossible to achieve practical performance from all RFFE components to sufficiently mitigate
opportunities for self-desense and self-interference;
adopting intelligent interference mitigation strategies
may necessarily be the long-term solution.
adopting new features and use cases. These advances,
though likely to continue to usher in a new age of connectivity, are also placing new burdens and creating additional challenges that RFFE designers and network optimization engineers must tackle. Ultimately, new strategies and device design/development are needed to
address these challenges, but these solutions must also
be extremely compact, efficient, and cost effective.n
References
1.https://www.3gpp.org/specifications-technologies/releases/re
lease-17
2.https://portal.3gpp.org/desktopmodules/Specifications/SpecificationDetails.aspx?specificationId=3284
UltraCMOS®
SP4T RF Switch
PE42443
Supports a frequency range from 1.8 GHz to 5 GHz. It
delivers extremely low insertion loss, high linearity and
fast switching time with high input power handling
capability making this device ideal for hybrid beamforming and for 5G massive MIMO applications. No
blocking capacitors are required if DC voltage isn’t
present on RF ports. Learn More
CONCLUSION
The 5G NR specifications are consistently pushing
the boundaries of wireless networking performance and
37
SOI RFIC Tunable Filters
Improve Phased Array System
Performance
Leopold E. Pellon
Otava Inc., Moorestown, N.J.
The capabilities and impact of new silicon on insulator (SOI) tunable filter ICs on the design of
the RF chains of phased arrays are discussed. These new devices provide an advancement in
tunability, small size and high linearity, which supports efficient approaches addressing challenges
of interference and wider operating bandwidth. These RFICs can be integrated into wideband
active stages of RF front-ends (RFFEs) for wide bandwidth, software-defined arrays for cost
effective multifunction systems. To illustrate the advantages, a notional wideband dynamically
programmable frequency-division duplex (FDD) system operating from 4 to 8 GHz (C-Band) is
discussed. To assist system architects exploring the uses and programming of this newly available
set of components, software tools have been developed, including accurate behavioral tuning
models, which complement evaluation kits for user prototype system development efforts. This
article is an abbreviated version of an article published online at www.microwavejournal.com.
F
or RF applications such as communications and
radar, active phased array antennas provide an
efficient way to steer and direct the system’s radiated RF energy to achieve the desired effective isotropic radiated power (EIRP) on transmit and the
gain over noise temperature (G/T) on receive, which are
required for communications link closure or the detection and measurement of mobile targets. To maximize
the signal-to-noise and interference ratio (SNIR), analog,
digital or hybrid beamformers shape the array antenna
gain and patterns optimally based on incoming signals,
calibration and sounding data. Arrays employed for
both military and commercial systems range from small
arrays with less than a hundred elements, which achieve
moderate antenna gain, to large arrays with thousands
of elements, which achieve higher gain and finer pencil beams. However, the performance and benefits of
the phased array can be limited by the trade-offs of the
constituent RF chains employed, particularly considering the impact of nearby interference.
Among the trade-offs for phased arrays, increasing
the operating bandwidth is a necessity when considering multifunction utility and flexibility. However, widening the operating bandwidth can increase wideband
emissions and increase exposure to nearby high-power
transmitters, producing “blindness” or reduced sensitivity in the receiver. Therefore, the ability to reconfigure
the properties of the chain to reduce emissions and the
effects of interference on a selected passband within the
wider operating band is desired.1-6
Another important trade-off is the cost effectiveness
of the solution. Array hardware cost is only one consideration; one must account for the service or mission
objectives as well. Other factors which are universal to
consider include the supporting I/O, fronthaul and backhaul, platform (or site) space available, available power
generation and heat removal. These can also drive cost
effectiveness. Hence, increasing the operating bandwidth is desirable to achieve a greater return on investment for commercial systems and to improved mission
effectiveness for military systems—so long as the requirements of each are satisfied simultaneously.1-5
WIDEBAND TUNABLE FILTERS
To fill the need for improved spectral control and agility, newly available miniaturized high linearity and tunable (or switchable) filter products are being introduced,
which can be integrated into phased array front-ends.
This article focuses on architectures that make maximum use of this family of components, illustrating the
www.mwjournal.com/articles/38328
38
TABLE 1
SOI TUNABLE FILTER PERFORMANCE
Parameter
OTFL101
OTFL201
OTFL301
Center Frequency Range
(GHz)
2.5-7.5
14-24
24-40
Bandwidth Range (%)
24-16
17-15
20-16
Loss Range (dB)
5-7
5-7
5-7
Typical Return Loss (dB)
12
12
12
Power Handling (dBm)
30
30
30
IIP3 (dBm)
45
42
42
# of Tunable Resonators
5
5
5
Resonator Control States
32
16
8
Tuning Settling Time (nS)
400
400
400
Control Loading Time (nS)
500
400
300
Die Dimensions (mm)
2.3 x 1.6
1.6 x 1.6
1.6 x 1.6
0
OTFL101
OTFL201
OTFL301
–5
–10
| S21 | (dB)
utility with three RFICs developed by
Otava Inc. that cover 2.5 to 40 GHz
(see Table 1).4 Their performance supports the thesis of this article, i.e., their
linearity, power handling and tuning range provide flexible operation
when the RFICs are used within active
RF chains. An overlay of the measured
transfer functions of the three devices is shown in Figure 1. The results
shown were obtained using “simple”
tuning where all resonators are tuned
to the same control value.
Programming is controlled through
a three-wire serial interface, where
each of the resonators have five-bit
tuning coefficient resolution, sufficient
for center frequency, and bandwidth
optimization. A combined time of
less than 1 µs is required for reconfiguration. Beyond the simple tuning method, the large number of degrees of freedom enables innovative
approaches to optimize filter tuning.
To assist system architects exploring
these capabilities, a companion behavioral model, capable of predicting
filter passband and sideband skirts
accurately—to 40 dB attenuation as
a function of user-defined control variables has been developed and is available.
–15
–20
–25
–30
–35
INTEGRATION IN PHASED
–40
5
10
15
20
25
30
35
40
45
50
0
ARRAYS
Frequency (GHz)
To assess the impact of these wideband tunable filters, consider the fols Fig. 1 Measured responses of the three tunable SOI RFIC filters.
lowing elements of a phased array design: linearity and sensitivity, operating
20 to 30 dB of Front-End Gain
Higher Noise Figure,
bandwidth and tuning agility, control of
Aliasing and/or
passband gain and interference rejecMixing Product
•
Driver
Stage 2
LNA
tion, element-to-element tracking that
• Analog Rx
•
affects the sensitivity of the beamformBeamformer
Rx
• RF Down-Converter
ing patterns to temperature variations
• RF ADC
and array packaging density.
A
Figure 2 shows the potential locaB
C
D
tions for filters within a phased array
front-end. Perhaps the ideal location is
•
• Analog Tx
placing the “filter first” in the common
Beamformer
Tx
leg (position A) and/or in the separate
• RF Up-Converter
• RF DAC
transmit (Tx) and receive (Rx) paths (poPredriver
PA Driver
PA
sition B). Filters at these “filter first” loOut-of-Band Spurious
cations, however, require ultra-low loss
and/or Mixing Product
and high-power handling filters for Tx
and ultra-low loss for Rx. Unfortunately, s Fig. 2 Possible filter placement in a phased array.
current technologies for wideband tungain required, adding filters at location D enables the
able filters do not support the losses, linearity and size
cascade of filters to achieve a higher-order and steeper
required for this “filter first” architecture in a phased array.
out-of-band response for improved performance. In the
An alternative is employing a low gain power ampliRx path, excessive amplification of out-of-band interferfier (PA) output stage and a low gain, low noise amplifier
ence is avoided by distributing the filters. Normally, an
(LNA) input stage, both in combination with moderate
LNA employs multiple stages to achieve the 20 to 30
loss tunable filters placed at location C. With additional
39
dB gain required, given the high noise figure of downstream components, i.e., the beamformers, mixers and
analog-to-digital converters (ADCs). In this “filter last”
topology, the out-of-band interference is amplified in
each active stage prior to filtering, requiring high LNA
power handling—although this achieves the best small
signal noise figure. Under large signal interference conditions, however, noise is further degraded. By comparison, a lower LNA power handling is required for the
“filter first” topology, but at the expense of the total
system noise figure.
Figure 3 illustrates two of the Rx chain trade-offs
for the design of a front-end consisting of an LNA first
stage followed by a lossy or noisy component. Assuming an LNA with 15 percent efficiency, Figure 3(a) shows
the power consumption of the LNA versus the input 1
dB compression point (IP1dB) for LNA gains from 5 to 30
dB.7–9 Assuming the LNA has a 1 dB noise figure, Figure
3(b) plots the combined noise figure of the chain versus
the loss of the following lossy component, again with LNA
gains from 5 to 30 dB. To achieve 0 dBm input P1dB, the
required DC power varies from 25 mW to 6.7 W over the
range of gains. For example, an LNA first stage with 25
dB will consume 2 W typically to maintain dynamic range.
A more optimum choice is a distributed filter chain,
where 10 to 15 dB gain in the first stage LNA is sufficient
to achieve an overall noise figure under 2 dB, assuming
a loss of 6 to 10 dB for each filter. The power required
to achieve 0 dBm input P1dB drops by about 9x for the
“distributed filter” topology compared to the “filter
last” topology, while also producing a much lower noise
figure than the “filter first” topology. After the first active filter stage, the power consumption downstream to
maintain system linearity is greatly reduced.
The SOI RFIC filters of Table 1 are small enough to support phased array half-wavelength lattice spacing, i.e., d =
λ/2. For example, the fifth order bandpass filter OTLF101
die size is 2.3 × 1.6 mm, which supports filtering for arrays
up to 8 GHz while occupying only 1 percent of the available area per element. At higher frequencies, the OTFL201
occupies 6.6 percent of the available area at 24 GHz, and
the OTFL301 occupies 18 percent at 40 GHz. Hence, these
three devices can be integrated into distributed filter array
front-ends from 2.5 to 40 GHz.
104
103
Pdc (mW)
102
Gain (dB)
5
10
15
20
25
30
101
100
10–1
–25
–20
–15
–10
–5
0
5
10
15
10
12
14
16
IP1dB (dBm)
(a)
6
Gain (dB)
5
10
15
20
25
30
Noise Figure (dB)
5
4
3
2
1
0
0
2
4
6
8
Second Stage Loss (dB)
(b)
s Fig. 3
Effect of LNA gain on front-end power consumption
(a) and noise figure (b), assuming an LNA with 1 dB noise figure
and 15 percent efficiency at the P1dB operating point.
Independently Tunable
Tx and Rx Filters
20 dBm at 1200 m
EIRP = 70 dBm
fc(R)
fc(T)
Tx Array
fc(T) = 5 GHz
Pel(T) = 31 dBm
C-BAND T/R PHASED ARRAY
To illustrate the use of filter RFICs, consider a notional
system composed of at least two arrays capable of FDD
operation over an operating band covering C-Band, i.e.,
4 to 8 GHz (see Figure 4). With one of the arrays transmitting and the other simultaneously receiving, each array is programmed for a different center frequency within
C-Band, accomplished with signal chains using the tunable RFIC filters at locations C and D, as shown in Figure
2. We will assume a digital beamforming architecture for
this system. Combining the RFFE with an RF class ADC, a
complete direct digital elemental receiver is enabled. By
adjusting the RFFE transfer function and the ADC Nyquist
Zone, one can cover the entire operational band while
protecting the receiver from strong cosite interference.
The RF chain must provide the gain and anti-aliasing fil-
s Fig. 4
4
64
Elements
8
64
Rx Array
Elements fc(R) = 6 GHz
46 dB ISO
Pel(R) = –64 dBm
Pel(Interference) = 0 dBm
NF(sys) = 3 dB with
Interference
SNIR(Beam Out) = 40 dB
Scenario with dual, colocated FDD capable arrays.
tering for driving the ADC input under multiple in-band
and out-of-band conditions.
The goal is maximizing the received remote signal of
interest relative to the combined noise, interference and
distortion floor at the output of the ADC and the digital
beamformer. The primary challenge for the Rx array is
maintaining sensitivity to the desired signals in the presence of out-of-band interference within the same 4 to 8
GHz operating band. Assume the arrays operate with a
frequency separation of Δf, where Δf = |fc(Tx)-fc(Rx)| and
that both arrays have a 200 MHz wide passband. The allowable Tx power is determined by the spatial separation,
40
near-field isolation and allowed frequency separation between the arrays, in addition to the performance of the Rx
element chain. This wideband FDD software-defined array
with two colocated apertures will be analyzed for a primary
scenario (case 1) with one local transmitter.5 A second scenario (case 2) with two local transmitters is analyzed in the
longer, online article. The performance goals for the dual
array system are summarized in Table 2.
For in-band signals, the smaller signal of interest is
received over a 200 MHz passband within the operating band. For example, a high data rate downlink uses
a 20 dBm EIRP remote transmitter at 1200 m tuned to fc
= 6 GHz, resulting in -64 dBm signal power into the Rx
element active chain. A total system noise figure of 3 dB
produces an effective -88 dBm input noise floor including ADC noise, where the RF chain is allocated a 2 dB
noise figure and drives its noise floor above the self-noise
of the RF ADC for a combined 3 dB system noise figure,
while providing 60 dB of digitized dynamic range above
this floor over the 200 MHz bandwidth. The gain required
for this is nominally 25 dB for most RF ADCs. The signalto-noise ratio (SNR) obtained at the output of the beamformer is nominally 40 dB for the smaller signal of interest
in this case, which is sufficient for high spectral efficiency
5G multi-gigabit data rates.
For this scenario, out-of-band interference is defined
for the Rx array operating adjacent to the 64-element Tx
array transmitting 31 dBm rms per antenna element. This
yields a 70 dBm EIRP main beam and aperture power of
46 dBm. From the requirements shown in Table 2, the
Rx system must maintain linear and sensitive operation
up to an input P1dB of 0 dBm while suppressing interference below the ADC noise floor at the output of the entire chain. The input spectrum from the antenna element
is shown in Figure 5(a), and the spectrum at the ADC is
shown in Figure 5(b), scaled as equivalent receiver chain
input levels. Keeping the passband clear of overlapping
interference terms and third- and fifth-order intermodulation distortion is enabled given the T/R band separation:
Δf > 600 MHz. This provides good flexibility since 70 percent of the operating band is available for all frequency
combinations. While the details of antenna isolation are
beyond the scope of this article, a realistic assumption is
an average effective isolation between the Tx and Rx of
46 dB, which is required to achieve a 0 dBm interference
level.
TABLE 2
WIDEBAND FDD DUAL ARRAY SYSTEM GOALS
Parameter
Value
Operating Band (GHz)
4-8
Instantaneous Bandwidth (MHz)
200
Minimum ∆f =|fc(T)-fc(R)| (MHz)
600
# Elements per Array
64
Array Antenna Gain, No Loss (dB)
24
Antenna and T/R Switch Losses (dB)
3
Tx Pelement (dBm)
31
EIRP (dBm)
70
Mean Power Aperture (dBm)
46
Pcosite at Rx Antenna Element, Case 1 (dBm)
0
Psignal at Rx Antenna Element (dBm)
–64
Out of Band Input IP3 (dBm)
20
System Noise Figure, RF to ADC Chain (dB)
3
Rx G/T (dB/K)
–7
SNIR at Beamformer Output (dB)
40
Power (dBm)
∆f
ADC Nyquist Zone
Input P1dB
FS(ADC Sat) = –4 dBm
FS(RF Signal) = –15 dBm
Psignal = –64 dBm
Pn = –88 dBm
Frequency
(a)
Frequency
(b)
s Fig. 5
RF input spectrum (a) and effective input spectrum at
the ADC (b).
TABLE 3
RF FRONT-END PERFORMANCE SUMMARY
FRONT-END MODELING
The most critical component of the C-Band dual
T/R array is its high dynamic range RFFE (see Figure
6), which drives and protects a variable gain amplifier
(VGA) driver and Nyquist ADC, followed by a digital
front-end (DFE). The ADC can sample signals up to
8 GHz directly with a noise density of -151 dBFS/Hz
(<-20 dBFS) in the higher-order Nyquist zones. By switching between 6 and 8 GHz sampling clocks, the Nyquist
zones can be placed relative to the tuned passbands to
cover the 4 to 8 GHz operating band.
To achieve a power efficient RFFE design with the required high linearity and low system noise figure, a GaN
HEMT process is selected for the two amplifier stages.
The first gain stage has a noise figure of 1.3 dB with 11.6
Parameter
Simple
Tuning
Optimized Tuning
(OPT2 V2)
fc (GHz)
6
6
3 dB Bandwidth (MHz)
1200
800
Passband Gain (dB)
12.2
17.1
Rstop1: fc-1 GHz (dB)
-17
-46
Rstop2: fc-2 GHz (dB)
-84
-103
Noise Figure (dB)
2.7
2.2
Input P1dB (dBm)
-2
1
Input IP3 at -15 dBm (dBm)
17.0
19.7
Pdc (mW)
260
260
dB gain, compared to 14 dB gain and 2.1 dB noise figure
for the second stage. Overall power consumption of the
two GaN stages is 261 mW at the nominal 5 V VDD bias.
This RFFE can be packaged as a surface-mount hybrid
module integrating a single GaN MMIC, approximately
2.2 mm × 2.2 mm in size, with the two OTFL101 tunable
filter ICs, each filter 2.6 × 1.6 mm.
The RFFE module, using both SOI and GaN devices,
was simulated as a chain in ADS. As this filter chain employs 10 resonators with independent controls, setting all
41
tuning variables is a key factor in the design, in addition to the input and output impedances of each block.
The filters can operate with all variables set to the same
nominal value, which is a “simple” approach to center
frequency tuning. However, the variables can also be
optimized with knowledge of the resulting transfer function. Table 3 summarizes the simulated results for the
RFFE design for both simple and optimized cases, the
latter labeled OPT2 V2. The optimized case improves
all the performance parameters for a low side interferer:
The passband gain increases by ~5 dB, Rstop1 reduces
by 29 dB, the noise figure improves by 0.5 dB and both
the out-of-band input P1dB and input IP3 improve by ~3
dB. This is evidence of improved interstage matching
and increased power transfer between the components
in the RFFE.
The simulated center frequency tuning of the RFFE
is plotted in Figure 7, which shows a set of bandpass
responses covering 3.5 to 8 GHz in 500 MHz steps. Tuning is virtually continuous, given the five-bit resolution of
each of the 10 resonators. At each center frequency, the
bandpass characteristics can be adjusted. The best approach is through optimization, where the goals of the
desired transfer functions enable adjustment of bandwidth, gain, passband shape and out-of-band attenuation. Figure 8 shows simulations for the design tuned
to 5.5 GHz with several bandwidth and passband states,
which are described in the table within the figure.
The model-based optimization of the design used
the S21, S11 and S22 responses with goals or cost functions, in a combined manual and random-gradient iterative search to derive the control states. Given its accuracy, the model can provide an effective nominal set of
optimized stored states, even without measurement. To
compensate for manufacturing variation among units, a
vector network analyzer calibration may be substituted
for the model to obtain the highest accuracy.
RF- Front-End
QTFL101(1)
QTFL101(2)
•
•
•
VGA
ADC NF = 23 dB
RF ADC
•
GaN Stage 1
GaN Stage 2
4
Control
DFE
fs
6 GHz 8 GHz
s Fig. 6
Response (dB)
Rx signal chain: RF front-end with GaN MMIC and SOI
tunable filters, VGA, ADC and DFE.
20
10
0
–10
–20
–30
–40
–50
–60
–70
0
1
2
3
4
5
6
7
8
Frequency (GHz)
9
10
11
12
s Fig. 7
Simulated center frequency tuning of the RF frontend from 3.5 to 8 GHz in 500 MHz steps.
In general, these RFICs can play a role addressing difficult interference problems with commercial and military front-ends, which was illustrated with a dynamically
programmable FDD system operating over 4 to 8 GHz.
The example shows a combination of front-end capabilities and system benefits, addressing such issues as
spectral congestion, performance and cost effective
deployment.n
References
1. R. H. Olsson, K. Bunch, C. Gordon and N. Zhou, “Creating a Universal Radio Frequency Front-end for Elemental Digital Beam Formed Phased Arrays,” IEEE International Symposium on Phased Array Systems and Technology, 2016, pp. 1–4.
2.L. Cifola et al., “Integrated Filtering in Reconfigurable Planar Phased-array Antennas with Spurious Harmonic Suppression,” IEEE International Symposium on
Phased Array Systems and Technology, 2013, pp. 598–603.
3.Knowles, “Reduce SWaP, Increase Performance of Phased Arrays with an Innovative
Filtering Approach,” Microwave Journal, Vol. 64, No. 6, June 2021, Web: www.microwavejournal.com/ext/resources/whitepapers/2021/Jun-21/Knowles_WP_ReduceSWaP-Increase-Performance-of-Phased-Arrays.pdf.
4. Otava Inc, “Otava Inc’s New IC Portfolio Announcement,” Microwave Journal, Vol.
64, No. 9, September 2021, Web: www.microwavejournal.com/articles/36736otava-incs-new-ic-portfolio-announcement.
5. Q. Gu, “RF Tunable Devices and Subsystems: Methods of Modeling, Analysis, and
Applications,” Switzerland, 2015.
6. K. Lee and G. M. Rebeiz, “A Miniature 8–16 GHz Packaged Tunable Frequency and
Bandwidth RF MEMS Filter,” IEEE International Symposium on Radio-Frequency
Integration Technology, 2009, pp. 249–252.
7.T. Das, “LNA Design Trade-Offs in the Working World,” NXP, December 2010,
Web: www.nxp.com/files-static/training_pdf/WBNR_LNA.pdf.
8.G. Nikandish, A. Yousefi and M. Kalantari, “A Broadband Multistage LNA With
Bandwidth and Linearity Enhancement,” IEEE Microwave and Wireless Components Letters, Vol. 26, No. 10, Oct. 2016, pp. 834–836.
9. V. Vanukuru et al., “A 6 GHz 0.92 dB NF Cascode LNA in 180 nm SOI CMOS Technology,” IEEE MTT-S International Microwave and RF Conference, 2019, pp. 1–4.
CONCLUSION
The capabilities and impact of a new class of tunable
filters based on SOI RFICs were described, with the aim
to increase the operating bandwidth of the phased array. The combination of linearity, tuning time, small size,
tuning degrees of freedom and reliability of the RFICs
surpasses solutions using switched filter banks, PIN diodes2 or MEMS6 switches. RF building blocks such as
front-ends, converters and synthesizers can employ this
cascaded approach to realize multiple improvements.
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