Fall 2023
ECE 4220 Analog IC Design
Homework #4
Due date: September 26 (Tuesday)
Weight: 15 points
1. Consider the CS amp with a current source load.
(W/L)1 = (W/L)2 = 100 for M1 and M2. Use Table 2.1 in
the textbook for all other transistor parameters.
(a) Show why both M1 and M2 cannot be in saturation
region.
(b) Find Vout.
3 V
VDD
Vb
M2
1.5 V
Vout
Vin
M1
1 V
2. VDD = 3 V, Vin=1 V, RD = 1 K, and RF = 500 .
(W/L)1 = 100 for M1. Use Table 2.1 in the
textbook for all other transistor parameters
including  = 0.1.
(a) Find the bias current ID. Hint: use the
large sigal analysis.
(b) Find the voltage gain AV. Hint: a small signal
analysis would be simpler.
ID
3. The channel length modulation coefficient  is fixed in Table 2.1. The coefficient
(defined as 𝛥𝐿/𝐿 = 𝜆𝑉𝐷𝑆 ) would vary, as VDS changes. State the trend of  as VDS
increases. You should provide the references (such as books, papers, and web
pages) for your statement.