# Noise

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Noise
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Introduction
An input signal that is processed by an analog circuit appears at the output
accompanied by the noise coming from many noise sources inside the circuit. It
is possible to calculate the signal to noise ratio (SNR) at the output to estimate
the quality of the signal. This is, however, not practical if we, for instance,
want to compare different circuits since the output signals can have different
amplitudes. It is more useful to calculate the SNR at the input of the circuit
by assuming that all the noise sources can be represented by a voltage and a
current noise source at the input. This tutorial will explain how to obtain the
input referred noise voltage and current sources of a single transistor.
2
Noise in CMOS Transistors
The complete noise performance of a two port network can be obtained by
referring the noise sources to its input. The input referred noise is just a fictitious
quantity at the input of a circuit that defines the SNR that can be achieved.
The input referred noise is by itself a figure of merit although many times it
is compared to the noise of a source resistor in order to obtain what is called
the noise factor (or noise figure when it is expressed in dB). We will leave those
useful definitions to other course and concentrate this tutorial on obtaining the
input referred spectral noise densities.
A biased transistor mainly produces thermal noise and flicker noise. Gate
resistance also introduces noise; although, in principle it can be reduced with
lots of fingers. Gate induced noise is a correlated noise that for simplicity will
not be touched in this tutorial (but you should remember it is there and will pop
up at high frequencies). There are also a good number of internal resistances
introducing noise sources. Tracking all sources is impractical from the designer
perspective, so we will concentrate on the ones that dominate: thermal noise
and flicker noise.
The biased transistor produces noise regardless if its input is a voltage or a
current source. Accordingly, it is compulsory, necessary and obligatory to refer
the output noise as both an input referred noise voltage and current. You should
be warned that many textbooks (and publications as well) omit this important
detail and make the assumption that the input referred noise voltage is enough.
As you will see in a few moments, this over-simplification is only valid at very
low frequencies and for small source resistances and can lead to large errors at
RF frequencies where the noise current contribution dominates.
Without any more preambles, we go directly to our simulation setup. Open
the schematic ’noise’ as shown in Figure-1.
Take a moment to analyse the setup. Circuit-1 will be used to extract the
input referred noise voltage. Circuit-2 will be used to extract the input referred
noise current. Circuit-3 will be used to demonstrate that the introduction of
a large source resistance at high frequencies will introduce noise current at the
input . The noise parameters will be calculated at specific nodes on the circuit.
We will find the noise at ”Vout1”,”Vout2”, and ”Vout3” and then refer them
to the corresponding inputs.
However, before proceeding further, select any of the transistor and press
’q’ to check the transistor dimensions and biasing points. They are shown in
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Figure 1: Noise analysis setups
Figure-2 for quick reference. Notice that the transistor dimensions are the same
as the ones we used in the previous tutorials. The only difference is an arbitrarily
chosen ID of 724.4 uA around the gm/IDS corner of this transistor.
Figure 2: Parameters of self biased transistor for noise analysis simulations
You will start by plotting the input referred noise voltage of Circuit-1.
Launch ADE L and load the state ’noise voltage’ as shown in Figure-3. Double click the ’noise’ in the Analyses section and take a moment to study how
noise voltage analysis of Circuit-1 is performed. Ask the assistant if you have
any queries. You also have to plot the input referred noise voltage as a function of frequency. Double click the ’input referred noise voltage’ variable in the
’Outputs’ section to see how this is done.
Run the simulation and observe the input referred noise voltage represented
in dB’s as shown in Figure-4. As you should expect, flicker noise dominates at
low frequencies. At high frequencies thermal noise dominates.
Now let’s plot the input referred noise current of Circuit-2. It is different
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Noise voltage (V / sqrt(Hz))
Figure 3:
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Figure 4: Input referred noise voltage of Circuit-1
from the previous setup as we have a current source at the input in contrast to
a voltage source for Circuit-1. Load the ADE L state ’noise current’ and take a
moment to study how noise current analysis of Circuit-2 is simulated. Run the
simulation and you will observe the input referred noise current represented in
dB’s as shown in Figure-5.
At low frequencies the flicker and thermal noise is rejected and only at high
frequencies it starts to grow. The explanation of this behaviour is that the
transistor offers a very high capacitive impedance at low frequencies and hence
there is a lot of gain. The SNR at the output is hence very large. On the other
hand, the input impedances decrease at high frequencies and the gain drops.
Accordingly, the SNR at the output decreases as well.
Analytically, the input referred noise voltage (vn) in terms of the output
noise voltage (V outnoise ) is given as:
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Noise current (dB)
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Figure 5: Input referred noise current of Circuit-2
V outnoise
=
vn.gm.RL
(1)
vn =
V outnoise
gm.RL
(2)
and
Likewise, the input referred noise voltage (in) in terms of the output noise
voltage (V outnoise ) is given as:
V outnoise
= in.(
1
).gm.RL
jwC
(3)
V outnoise
gm.RL
(4)
so that
in
=
(jwC)
=
(jwC).vn
Using (2)
in
(5)
Equation (5) gives the relationship between vn and in. Both vn and in
are completely correlated and are in quadrature phase (90 degrees phase shift).
This has important implications when the source impedance has a reactive part.
In real circuits there is never an ideal voltage or current source. There is
always some source impedance ZS accompanying the source. What is the effect
of the source impedance? In the case that ZS contains a resistive part, it will
add some noise. It will also influence the effect of the noise coming from the
transistor. To understand this, let’s find the total noise voltage at the input
that comprises all the noise sources as shown in Figure-6.
A Norton-Thevenin transformation is used to convert the noise current into
voltage so that:
Vnosie
= vn real(ZS) + vn + in.ZS
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(6)
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Figure 6: Thevenin equivalent of noise sources at the input of transistor
where vn real(ZS) is the noise coming from the real part of ZS. As explained
above, vn and in are correlated. Moreover, in is proportional to vn with a
complex proportionality constant (jwC). If ZS contains a resistive and reactive
part (R + jX), the complex product will have a real factor so that:
Vnoise
=
vn real(ZS) + vn + vn.(jwC).(R + jX)
(7)
=
vn real(ZS) + vn(1 + jwC.R − wCX)
(8)
=
vn real(ZS) + vn(1 − wCX) + vn(jwC.R)
(9)
if X is positive (inductive reactance), then the noise contribution from the
second term may be eventually cancelled. In simple terms this means that noise
performance is improved if the input capacitance is tuned by an inductor. If X
is negative (capacitive reactance) then the sign inside the second term changes
to positive and the noise contribution is magnified.
If ZS is only resistive, the total input noise would look like:
Vnoise
= vn real(ZS) + vn(1 + jwC.R)
(10)
= vn real(ZS) + vn + vn.jwC.R
(11)
The value of vn.jwC.R comes from the current noise. Its effect can be
estimated by an example. Circuit-3 has a source resistor of 500 Ω. Its thermal
noise has been deactivated so that only the noise contribution of the transistor
is accounted or in other terms vn real(ZS) = 0. You can do that as follows:
left-click the source resistor in Circuit-3, press ’q’ and change the ’Generate
Noise?’ from yes to no.
In ADE L, load the state ’noise voltage resistor’ and run the simulation to
find the input referred noise voltage at the gate of the transistor (Vnoise ).
The noise at low frequencies is as expected dominated by flicker noise. After
flicker noise, thermal noise dominates up to around a 1 GHz. After that, the
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Figure 7: Input referred noise voltage of Circuit-3
noise grows quite fast at GHz frequencies. The offender is the noise current
term that grows with frequency.
A hint to improve the noise performance at high frequencies can be found
by noticing that:
|vn(jwC.R)|2
= vn2 (wCR)2
(12)
but
vn2
=
4κγ
gm
=
4κγ
(13)
(12) becomes
|vn(jwC.R)|2
=
C
(wR)2 C
gm
1
4κγ (wR)2 C
fT
(14)
(15)
Accordingly, increasing the fT of the transistor reduces the noise at high
frequency. Also reducing the size of the transistor decreases the input capacitance C. As seen before, achieving a better fT can be obtained by increasing
the current consumption or reducing the length size.
Increase the current of Circuit-3 from 724.4 uA to 2 mA and rerun the
simulation. The comparison between the two plots is shown in Figure-8. You
can now notice how the noise performance, both at high and low frequencies,
has improved.
2.1
Calculation of integrated input referred noise in a frequency band
The following steps can be employed to calculate the integrated input referred
noise in a frequency band of interest:
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Figure 8: Improvement in noise performance of Circuit-3 due to increased IDS
1- Right click in the Design Variables Section of the ADE widow − &gt; Edit and
fill in as shown in Figure-9.
Figure 9:
3- Repeat for Fstart (already listed in the figure).
4- Fstart and Fstop are the starting and ending frequency for which you are
going to calculate the integrated noise. They should be filled in according to
your bandwidth specs. In this example, Fstart=100K, Fstop=100M
5- Go to the Outputs section. Right Click − &gt; Edit.
6- In the calculator field select Open as shown in Figure-10.
Figure 10:
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7- In the calculator window fill in the expression as shown in Figure-11.
8- Go back to the Outputs window. In the calculator field click get expression.
9- Name the expression as you wish e.g. as shown in Figure-12.
10- Click Add and then OK.
11- Run the simulation.
12- The result will be printed in the outputs section under the name you specified.
Figure 11:
Figure 12:
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