International Journal of Electrical Engineering and Technology (IJEET)
Volume 12, Issue 1, January 2021, pp. 145-153, Article ID: IJEET_12_01_015
Available online at http://www.iaeme.com/IJEET/issues.asp?JType=IJEET&VType=12&IType=1
ISSN Print: 0976-6545 and ISSN Online: 0976-6553
DOI: 10.34218/IJEET.12.1.2021.015
© IAEME Publication
Scopus Indexed
IMPLEMENTATION OF 3- LEVEL LC
SWITCHING BASED NPC-MLI
Palanisamy R, Suriya Balaji R, Sathiyabalan R, Kalidass K,
Rajasekar V, Arun Noyal Doss M
Department of Electrical and Electronics Engineering, SRM Institute of Science and
Technology, Chennai, Tamilnadu, India
ABSTRACT
The three phase LC Switching based voltage boost NPC inverter, to boost the DC
input source and also inverting AC voltage in three phase level. The Three level three
phase NPC inverter mainly used 12 IGBT switches based on PWM controller systems.
The switching pulse gives the sawtooth and pulse generation based pulse to inverter
switches. The NPC Quasi Z-Source inverter is the input current is continuous in nature
but, it uses equal values of four inductors, four capacitors and two diodes in the
intermediate nonlinear converter. The DC input source to inverter using NPC Quasi ZSource with RL series branch and nonlinear converter to DC link capacitor level with
connect the load.
Key words: LC boosting, Neutral Point Clamped Multilevel Inverter (NPC-MLI),
Hysteresis Space Vector Modulation, Total Harmonic Distortion (THD).
Cite this Article: Palanisamy R, Suriya Balaji R, Sathiyabalan R, Kalidass K,
Rajasekar V and Arun Noyal Doss M, Implementation of 3- Level LC Switching based
NPC-MLI, International Journal of Electrical Engineering and Technology, 12(1),
2021, pp. 145-153.
http://www.iaeme.com/IJEET/issues.asp?JType=IJEET&VType=12&IType=1
1. INTRODUCTION
A photovoltaic system, also known as PV system or solar power system, is primarily a power
system that is capable of extracting the solar energy and supplying power with the help of
photovoltaic [1]-[4]. The system consists of various components, namely solar panels which
absorb the sunlight and convert it into electricity, a solar inverter which converts the DC current
into AC current, also mounting, cabling, and some other electrical accessories that are necessary
to set up a system and make it work. Solar photovoltaic (PV) system is bringing in huge
popularity all over the world because the clean mechanism of energy generation. A Photovoltaic
cell is basically a p-n junction made of semiconducting material that generates DC current when
light falls on the surface of the material. The current generated is linearly proportional to the
solar irradiance. A current source connected in parallel with a diode basically represents a PV
cell [5].
http://www.iaeme.com/IJEET/index.asp
145
editor@iaeme.com
Implementation of 3- Level LC Switching based NPC-MLI
Multilevel inverters have also been quite attractive in the recent past because it has high
harmonic rejection capacity and is capable of handling high voltages. The NPC topology has
been found to be more efficient in terms of harmonic rejection capability but is more complex
when compared to the conventional PWM inverters [6]. In NPC topology there are two
capacitors across which the DC input is divided. Since only half of the voltage is present across
the switching circuits, the switching losses also fall down to half the value. The neutral point
voltage is clamped to the centre of the two inverters, which produces an additional step in the
output voltage. Multilevel inverters are capable of synthesizing the output voltages using more
number of levels, they usually perform better than the conventional two-level converters in
terms of harmonic distortion [7]. The multilevel inverters divide the input voltage among
various power devices, hence allowing for the use of more efficient devices. Multilevel
converters were initially used in applications involving high voltages and powertrains [8]-[10].
A lot of studies have recently been done on Pulse width modulation (PWM) in the past few
decades. Many different PWM techniques have been developed to meet the following
requirements: wide linear modulation range; lesser switching losses; lesser total harmonic
distortion (THD) in switching waveform; easy implementation and less computation time [11].
Carrier-based PWM techniques were the most commonly used technique in major applications
in the past. The modulation signals used for carrier-based PWM in the past are sinusoidal. But
space vector modulation has gained importance in PWM methods with the development of
microprocessors, for three-phase converters [12]. It uses the space-vector concept to calculate
the duty cycle of the switches. In other words it is a digital implementation of PWM modulators.
Additionally, HSVM technique has all the advantages that hysteresis control and SVM
technique have. This method is capable of reducing the switching losses by using SVM
techniques. Also it can produce better voltage by using a significant tolerance bandwidth of the
hysteresis control [13]. This switching technique has been implemented in numerous three
phase multilevel inverter drives applications. As a result, this HSVM technique overcomes the
coordination problems of the hysteresis voltage control by calculating the switching vectors
[14]-[17].
This paper deals with the study and implementation of a three-phase Neutral Point Clamped
three-level inverter and the modulation technique used for the same is Hysteresis Space Vector
Pulse Width Modulation (HSVPWM). Space Vector Modulation performances at low
modulation ratio as compared to the standard Pulse Width Modulation (PWM) techniques, and
hence has gained a lot of popularity lately.
2. LC BOOSTING NPC-MLI
The fig.1shows the circuit diagram of LC boosting NPC-MLI. During its operation, NPC
Inverter produces stepped output voltage. An n-level NPC Inverter has (n-1) number of
capacitors, 2(n-2) number of clamping diodes per phase and 2(n-1) number of switches on each
leg. The DC voltage is divided into three voltage levels due to the two capacitors. Each capacitor
faces Vs/2and each voltage stress is limited to one capacitor level with the help of clamping
diodes. The output voltage has three steps. The number of levels depends on the number of
switches and hence can be increased by increasing the number of switches, in turn increasing
the number of voltage steps thus lowering the Total Harmonic Distortion.
http://www.iaeme.com/IJEET/index.asp
146
editor@iaeme.com
Palanisamy R, Suriya Balaji R, Sathiyabalan R, Kalidass K, Rajasekar V and Arun Noyal Doss M
Figure 1 Circuit diagram of LC boosting NPC-MLI
The intermediate network between dc source and inverter leg is comprised of two inductors
(L1, L2), two capacitors (C1, C2), two active switches (S1, S2), and four diodes (D1, D2, D3,
and D4) diodes are connected in series with the input dc source to boost the voltage and the
input current is discontinuous in nature. In the two level inverter where the input current is
continuous in nature, but it uses equal values of four inductors, four capacitors, and two diodes
in the intermediate network. But in this three level inverter half of the number of passive
components (two inductors and two capacitors) in the intermediate network by utilizing extra
two switches (S1 and S2) and two diodes at the same time maintains all the advantages.
As a result, the proposed inverter can be useful in the applications where size and weight
are main constraints. Traditional NPC two-level Inverter is basically operated in two states, i.e.,
active state (or nonshoot-through state)and zero state to give three distinct voltage levels (i.e.,
+Vdc, 0, −Vdc). Whereas the proposed inverter uses additional one more state, i.e., shootthrough state to boost the input dc voltage and give three distinct voltage levels (+Vdc, 0,−Vdc)
in a single stage.
During Nonshoot-Through State (or Active State): It is similar to the active state of
conventional NPC VSI where power is transferred from dc source to ac load. In this interval of
operation, the ac load attains either “+Vdc” or “−Vdc ” voltage level across ac load with respect
to neutral point “n.” The switches Swx1 and Swx2 (where x =1 , 2, 3) are switched “ON” and
switch “S1” is switched “OFF” to achieve “+Vdc” across ac load with respect to neutral point
“n,” which in turn forward biases the diodes “D1” and “D2.” As a result, both source “Vg” and
inductor “L1” energize the capacitor “C1” as well as supply power to the load, as shown in Fig.
2. Similarly, the switches Swx3 and Swx4 are switched “ON” and switch “S2” is switched
“OFF” to achieve “−Vdc” across a c load with respect to neutral point “n,” which in turn
forward biases the diodes “D3” and “D4.” As a result, both source “Vg” and inductor
“L2”energize the capacitor “C2” as well as supply power to the load, as shown in Fig.2a. Here,
for easy understanding, the load has been represented by current source as for small duration
the load current is assumed to be constant.
http://www.iaeme.com/IJEET/index.asp
147
editor@iaeme.com
Implementation of 3- Level LC Switching based NPC-MLI
(a)
(b)
(c)
Figure 2. Modes of operation (a) During Non shoot (b) During Zero State (c) During Shoot through
During Zero State: In this state, no power is transferred to ac load from dc source similar to
the zero state of conventional NPC VSI. The switches Swx2 and Swx3 are switched “ON” and
switches “S1,” “S2,” “Swx1,” and “Swx4” are switched “OFF” to achieve “0” voltage across
load, which in turn forward biases the diodes“D1,”“D2,” “D3,” and “D4.” As a result, upper
source “Vg” and inductor “L1” energize the capacitor ”C1” as well as lower source “Vg” and
inductor “L2” energize the capacitor “C2,” as shown in Fig.2b.
During Shoot-Through State: During this mode of operation, the switches “S1” and “S2”
and all the switches of one or more inverter legs are turned “ON,” which in turn reverse biases
the diodes “D1,” “D2,” “D3,” and “D4.” As a result, upper dc voltage source “Vg” and capacitor
“C1” energize the inductor “L1.” At the same time, lower dc voltage source “Vg” and capacitor
"C2” energize the inductor “L2,” as shown in Fig.2c. Shoot-though state is placed inside the
conventional zero state, without interfering the nonshoot through state (i.e., active state).
3. HYSTERESIS SPACE VECTOR MODULATION
Hysteresis Space Vector Modulation is similar to SVPWM, but the vector represented in the
stationary coordinate frame is the error vector [18]. In the proposed system, the error vector is
calculated as a difference of the output voltage from the MLI with respect to a predefined
reference voltage giving better control over the DC Voltage balancing problem, and
dynamically modifies triggering pulses. The three error voltages derived from the output are
represented using a single space vector. The DC bus voltage is balanced and a Space Vector
http://www.iaeme.com/IJEET/index.asp
148
editor@iaeme.com
Palanisamy R, Suriya Balaji R, Sathiyabalan R, Kalidass K, Rajasekar V and Arun Noyal Doss M
Voltage Control (SVVC) is examined in order to use hexagonal hysteresis areas. The error
vector tip moves continuously over the hexagonal contour and by identifying its position, an
appropriate voltage vector out of the 27 possible switching state combinations.
Figure 3 Representation of the switching states in the d-q vector space
The vector space is divided into three distinct areas rep- resented by the three different colors
in it. The distinction in areas is such that the innermost hexagon consists of the 3 zero vectors,
the middle part consists of 12 small vectors and the outer portion contains 6 medium and 6 large
vectors, making 27 vectors in all, each representing a switching state. Hysteresis Space Vector
Modulation is similar to SVPWM, but the vector represented in the stationary coordinate frame
is the error vector. The multilevel control region is a cube, which is divided into several subcubes and the first step of the modulation algorithm is to find the sub-cube where the reference
vector is pointing to. The cubes in three dimensional space are formed by a certain number of
sub cubes depending on the number of the levels of the inverter.
This paper presents a significantly different approach from all aforementioned references
and provides a general solution. It is based on a conventional Cartesian coordinate system, and
hence can be easily implemented with existing outer control loops for speed or torque. To
understand better the selection process, we consider the case where the error-vector tip is
located in sector S1. In this case, the appropriate voltage vector to apply is either v4(011) or
v24(−100). The next applied voltage vector is as follows:
1) v18(−111) if the error-vector tip moves toward S2
2) v11(−101) if the error-vector tip moves toward S3
3) v10(−110) if the error-vector tip moves toward S18
4) v5(001) or v25(−1 − 10) if the error-vector tip moves toward S4
5) v3(−110) or v23(−10 − 1) if the error-vector tip moves toward S16
6) v0(000) or v7(111) or v14(−1 − 1 − 1)if the error-vector tip moves toward S0
In all these cases, it is clear that the selected voltage vector ensures a correct multilevel
waveform (the switching voltagesu10, u20, and u30 do not jump levels). The unbalance of the
NP voltage problem can be solved by using two external dc regulated voltage sources. It can be
solved also by using voltage regulators for each capacitor voltage with the help of a controlled
multilevel rectifier or by modifying pulse width-modulation patterns and voltage vector
http://www.iaeme.com/IJEET/index.asp
149
editor@iaeme.com
Implementation of 3- Level LC Switching based NPC-MLI
selections. With the proposed control strategy, the NP voltage can be easily controlled by
applying appropriate voltage vectors.
4. RESULTS AND DISCUSSIONS
A prototype Neutral Point Clamped Three level Inverter was designed and built in order to test
the performance of the proposed idea. PIC microcontroller was used in this project to obtain
the gate signal of the inverter switches using SPWM. PIC 16F877A was used to generate the
Modified Sine Wave gate signals and PIC 16F887 was used to generate Sine Wave gate signals.
Both have 40 pins with different functions. Two PICs were programmed in order to drive
switches for Modified Sine Wave and Sine Wave inverter. Program MPLAB was used to write
the PICs codes. The hardware setup is shown in fig.4.
Figure 4. Hardware setup of proposed system
When AC is applied to the primary winding of the power transformer it can either be stepped
down or stepped up depending on the value of DC, which is needed. In our circuit the circuit of
230V/12-0-12V is used to perform the step down operation where a 230V AC appears 12V AC
across the secondary winding. One alteration of input causes the top of the transformer to be
positive and the bottom negative. The next alteration will temporarily cause the reverse. The
current rating of transformer used in our project is 1A. Apart from stepping down AC voltages,
it gives isolation between power source and power supply circuitries. A bridge rectifier of four
diodes (4*IN4007) are used to achieve full wave rectification. The fig.5 shows the stepped
output voltage 3-level LC boosting NPC-MLI.
Figure 5 Stepped output voltage 3-level LC boosting NPC-MLI
http://www.iaeme.com/IJEET/index.asp
150
editor@iaeme.com
Palanisamy R, Suriya Balaji R, Sathiyabalan R, Kalidass K, Rajasekar V and Arun Noyal Doss M
Figure 6. Switching pulse generation using HSVM scheme
Figure 7. THD analysis of stepped output voltage
Figure 8. Hardware output voltage 3-level LC boosting NPC-MLI
Switching pulse generation using Hysteresis SVM scheme is shown in fig.6. THD analysis
of stepped output voltage is shown in fig.7, which is 7.98%. The experimental stepped output
voltage of 3-level LC boosting NPC-MLI is shown in fig.8.
http://www.iaeme.com/IJEET/index.asp
151
editor@iaeme.com
Implementation of 3- Level LC Switching based NPC-MLI
5. CONCLUSION
This paper presents Hysteresis SVPWM based maximum boosted NPC three- level inverter
with Photovoltaic system. Here the SVVC technique uses the circular hysteresis areas to reduce
the THD. In the capacitor of the neutral point clamp the DC voltage is balanced. The other
added benefits of this inverter configuration are reduced common mode voltage, and switching
losses. The three phase AC voltage supply is obtained from the renewable solar energy through
the conversion. The working of the HSVM technique and vector locations have been presented
in this paper. The output voltage and current obtained from the 3-level NPC LC boosted inverter
is achieved at accurate frequency. In comparison to the basic two level inverter there is decrease
in the THD level which has represented in the MATLAB simulation output. The THD is being
reduced to 17.98% in voltage and 2.80% in current.
REFERENCES
[1]
G. Buticchi, L. Consolini, and E. Lorenzani, “Active filter for the removal of the dc current
component for single-phase power lines,” IEEE Trans. Ind. Electron., vol. 60, no. 10, pp. 4403–
4414, Oct. 2013.
[2]
H. Xiao and S. Xie, “Leakage current analytical model and application in single-phase
transformerless photovoltaic grid-connected inverter,” IEEE Trans. Electromagn. Compat., vol.
52, no. 4, pp. 902–913, Nov.2010.
[3]
O. Lopez, F. Freijedo, A. Yepes, P. Fernandez-Comesaa, J. Malvar, R. Teodorescu, and J.
Doval-Gandoy, “Eliminating ground current in a transformerless photovoltaic application,”
IEEE Trans. Energy Convers., vol. 25, no. 1, pp. 140–147, Mar. 2010.
[4]
S. Araujo, P. Zacharias, and R. Mallwitz, “Highly efficient single-phase transformerless
inverters for grid-connected photovoltaic systems,” IEEE Trans. Ind. Electron., vol. 57, no. 9,
pp. 3118–3128, Sep. 2010.
[5]
D. Barater, G. Buticchi, A. Crinto, G. Franceschini, and E. Lorenzani, “Unipolar PWM strategy
for transformerless PV grid-connected converters,” IEEE Trans. Energy Convers., vol. 27, no.
4, pp. 835–843, Dec. 2012.
[6]
T. Kerekes, R. Teodorescu, P. Rodridguez, G. Vazquez, and E. Aldabas, “A new high-efficiency
single-phase transformerless PV inverter topology,” IEEE Trans. Ind. Electron., vol. 58, no. 1,
pp. 184–191, Jan. 2011.
[7]
Lath R, Bharatiraja C, Palanisamy R, Banerji S, Dash S.S, “Hysteresis current controller based
transformerless split inductor-NPC - MLI for grid connected PV- System”, Procedia
Engineering, 64, pp. 224-233, 2013.
[8]
S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. Franquelo, B. Wu, J. Rodriguez, M. P.
Andrez, and J. Leon, “Recent advances and industrial applications of multilevel converters,”
IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2553–2580, Aug. 2010.
[9]
Y. Xue, B. Ge, and F. Z. Peng, “Reliability, efficiency, and cost comparisons of mw scale
photovoltaic inverters,” in Proc. IEEE ECCE, Raleigh, NC, USA, Sep. 2012, pp. 1627–1634.
[10]
Palanisamy R, Vijayakumar K, Bagchi A, Gupta V, Sinha S, “Implementation of coupled
inductor based 7-level inverter with reduced switches”, International Journal of Power
Electronics and Drive Systems, 8(3), pp. 1294-1303, 2017.
[11]
C. Townsend, T. Summers, and R. Betz, “Control and modulation scheme pp. 3707–3714.
S. Essakiappan, H. Krishnamoorthy, P. Enjeti, R. Balog, and S. Ahmed, “Independent control
of series connected utility scale multilevel photovoltaic inverters,” in Proc. IEEE ECCE,
Raleigh, NC, USA, Sep. 2012, pp. 1760–1766.
http://www.iaeme.com/IJEET/index.asp
152
editor@iaeme.com
Palanisamy R, Suriya Balaji R, Sathiyabalan R, Kalidass K, Rajasekar V and Arun Noyal Doss M
[12]
Bharatiraja C, Raghu S, Palanisamy R, A new space vector pulse width modulation for
reduction of common mode voltage in three level neutral point diode clamped multilevel
inverter”, IEEE-International Conference on Advances in Engineering, Science and
Management, ICAESM-2012, 6216195, pp. 694-699, 2012.
[13]
T. Kerekes, R. Teodorescu, and U. Borup, “Transformerless Photovoltaic Inverters Connected
to the Grid”, in Proc. 2010 IEEE Applied Power Electronics Conference and Exposition, pp. 16.
[14]
C.L. Kuppuswamy and T.A. Raghavendiran “A Novel Z-Source Neutral Point Clamped
Multilevel Inverter for Non-Linear Loads”, ICMEME'2012 March 17-18, 2012.
[15]
P.C. Loh, F. Blaabjerg2, S.Y. Feng and K.N. Soon, “Pulse-Width Modulated Z-Source NeutralPoint-Clamped Inverter”, IEEE, 2005.
[16]
F. Gao, P.C. Loh F. Blaabjerg, R. Teodorescu, D.M. Vilathgamuwa, “Five-level Z-source diodeclamped inverter”, IET Power Electron., 2010, Vol. 3, Iss. 4, pp. 500–510.
[17]
Francis BoafoEffah, Patrick Wheeler, Jon Clare, and Alan Watson, “Space-Vector-Modulated
Three-Level Inverters with a Single Z-Source Network”, IEEE Transactions on Power
Electronics, Vol. 28, No. 6, June 2013.
[18]
Hemanthakumar, R., Raghavendrarajan, V., AjinSekhar, C.S., Sasikumar, M. “A novel hybrid
negative half cycle biased modulation scheme for cascaded multilevel inverter”, International
Journal of Power Electronics and Drive Systems, vol 4, Issue 2, June 2014, Pages 204-211.
http://www.iaeme.com/IJEET/index.asp
153
editor@iaeme.com