Intel 8088 (8086) Microprocessor Structure
Microprocessor System Design
3-1
Overview
 Textbook:
J. L. Antonakos, "An Introduction to the Intel Family of
Microprocessors," Third Edition, Prentice Hall, 1999
 Objectives:
The course will provide knowledge to build and program
microprocessor-based systems.
 Microprocessor architecture
 Architecture of microprocessor-based systems
 Programming microprocessor-based systems
 Future trends
 Grading:
Two midterms, one final exam, and homeworks
Microprocessor System Design
3-2
What are microprocessor-based systems?
 Microprocessor-based systems are electrical systems consisting
of microprocessors, memories, I/O units, and other peripherals.
 Microprocessors are the brains of the systems
 Microprocessors access memories and other units through buses
 The operations of microprocessors are controlled by instructions
stored in memories
Microprocessor
Bus
Control
unit
Datapath
ALU
Reg.
Memory
Output
units
Microprocessor System Design
Input
units
3-3
What are microprocessors?
 A microprocessor is a processor (or Central Processing Unit, CPU)
fabricated on a single integrated circuit.
Address bus
MAR
PC
IR
Control
unit
Control bus
X
Y
Data bus
ALU ACC
A simple microprocessor architecture
Microprocessor System Design
3-4
Evolution of Computers
 First generation (1939-1954) - vacuum tube
 Second generation (1954-1959) - transistor
 Third generation (1959-1971) - IC
 Fourth generation (1971-present) - microprocessor
Microprocessor System Design
3-5
Evolution of Computers
 First generation (1939-1954) - vacuum tube
IBM 650, 1954
Http://history.acusd.edu/gen/recording/computer1.html
http://www.cs.virginia.edu/brochure/museum.html
http://www.columbia.edu/acis/history/650.html
Microprocessor System Design
3-6
Evolution of Computers
 Second generation (1954-1959) - transistor
Manchester University Experimental Transistor Computer
Http://history.acusd.edu/gen/recording/computer1.html
http://www.computer50.org/kgill/transistor/trans.html
Microprocessor System Design
3-7
Evolution of Computers
 Third generation (1959-1971) - IC
PDP-8, Digital Equipment Corporation
 Thanks to the use of ICs, the DEC PDP-8
is the least expensive general purpose small
computer in 1960s
Http://history.acusd.edu/gen/recording/computer1.html
http://www.piercefuller.com/collect/pdp8.html
Microprocessor System Design
3-8
Evolution of Computers
 Fourth generation (1971-present) - microprocessor
 In 1971, Intel developed 4-bit 4004 chip for calculator
applications.
ROM/RAM buffer
Timing
Reset
Control logic
Program
counter
Instruction
decoder
ALU
Reg.
I/O
Refresh
logic
http://www.intel.com
System bus
Block diagram of Intel 4004
4004 chip layout
A good review article: The History of The Microprocessor, Bell Labs Technical Journal,
Autumn, Microprocessor
1997
System Design
3-9
Evolution of Intel Microprocessors
Minimum transistor sizes (µm)
Number of transistors
100,000,000
1,000,000
80386
8088
100,000
10,000
1,000
P III
Pentium
10,000,000
7
P4
P II
8080
6
5
80486
4
80286
8088
3
8080
80386
2
100
10
Pentium
P II P III P 4
80486
80286
1
0
1
1974 1979
1982 1985
1989
1993 1997
1974
1999 2000
1979
1982
1985
Clock frequencies (MHz)
1989
1993
1997
1999
2000
MIPS
10000
10000
P4
P III
1000
1000
Pentium
P II
Pentium
100
80386
8088
10
8080
P II
100
P III
80386
10
80486
1 8080 8088
80286
1
P4
80486
80286
0.1
1974
1979
1982
1985
1989
1993
1997
1999
2000
1974 1979 1982 1985 1989 1993 1997 1999 2000
Microprocessor System Design
3-10
Other Commercial Microprocessors
 PowerPC (IBM, Motorola)
 Athlon, Dulon, Hammer (AMD)
 Crusoe (Transmeta)
 SPARC, UltraSPARC (Sun Microsystems)
 TI’s TMS DSP chips (Texas Instruments)
 StarCore (Motorola, Agere)
 ARM cores (Advanced RISC Machines)
 MIPS cores (MIPS Technologies)
 
Microprocessor System Design
3-11
Applications of Microprocessor-Based Systems
 Computers
 System performance is normally the most important design concern
...
Keyboard
Monitor
Disk
Other
peripherals
Bus
Microprocessor
Memory
Timing &
control
...
Interrupt
control
Block diagram of a computer
Microprocessor System Design
3-12
1.3 System block diagram
•Crystal oscillator
•Timing circuitry
(counters dividing to
lower frequencies)
Timing
•ROM (Read Only Memory)
(start-up program)
•RAM (Random Access Memory)
•Bus controller
P +
•DRAM (Dynamic RAM) associated •Bus drivers
high capacity, refresh needed
logic
•SRAM (Static RAM) - low
•Coprocessor
circuitry:
power, fast, easy to interface
CPU
Memory
System bus (data, address & control signals)
Parallel I/O
Many wires, fast.
•Printer (high resolution)
•External memory
•Floppy Disk
•Hard Disk
•Compact Disk
•Other high speed devices
Serial I/O
Interrupt circuitry
Simple (only two wires
+ ground) but slow.
At external unexpected events,
P has to interrupt the main
program execution, service the
interrupt request (obviously a
short subroutine) and retake
the main program from the
point where it was interrupt.
•Printer (low resolution)
•Modem
•Operator’s console
•Mainframe
•Personal computer
The Personal Computer
Speaker
Timer logic
(8253)
Processor
(8086
trough
Pentium
Coprocessor
(8087
trough
80387
System
ROM
640KB
DRAM
System bus (data, address & control signals)
Keyboard
logic (8253)
Keyboard
DMA
Controller
(8237)
Expansion
logic
Video card
Disk controller
Serial port
...
Extension slots
Interrupt
logic (8259)
Applications of Microprocessor-Based Systems
 Microcontrollers
 A microcontroller is a simple
computer implemented in a
single VLSI chip.
 In general, microcontrollers
are cheap and have low
performance
 Microcontrollers are widely
used in industrial control,
automobile and home
applications
OSC.
RAM
ROM
CPU
I/O port
Timer
USART
Interrupt
A/D, D/A
Block diagram of a microcontroller
Microprocessor System Design
3-15
Applications of Microprocessor-Based Systems
 ASICs
http://www.ti.com
 Microprocessors are embedded
into ASIC chips to implement
complex functions
 In general, it requires that
the microprocessors have
low power consumption and
take small silicon area
A TI baseband chip for cellular
phone applications
Microprocessor System Design
3-16
Class Objectives
 Hardware architecture of microprocessor-based systems
 Microprocessor architecture
 Memory organization
 I/O units of microprocessor-based systems
 How to put them together
 Programming of microprocessor-based systems
 Intel 80x86 instruction set
 Microprocessor Interrupt services
 Assembly language programming
Microprocessor System Design
3-17
Overview
&
Review
Microprocessor System Design
3-18
Overview
 Intel 8088 facts
 20 bit address bus allow accessing
VDD (5V)
1 M memory locations
 16-bit internal data bus and 8-bit
external data bus. Thus, it need
two read (or write) operations to
read (or write) a 16-bit datum
8088

control
signals
To 8088

 Byte addressable and byte-swapping
20-bit
address
8-bit data
control
signals
from 8088
Word: 5A2F
CLK
18001
5A
High byte of word
18000
2F
Low byte of word
GND
8088 signal classification
Memory locations
Microprocessor System Design
3-19
Organization of 8088
Address bus (20 bits)
Execution Unit
(EU)
AH
AL
BH
BL
CH
CL
DH
DL
General purpose
register
SP

Segment
register
BP
SI
DI
CS
Data bus
(16 bits)
DS
SS
ALU Data bus
(16 bits)
ES
IP
Bus
control
ALU
Instruction Queue
External bus
EU
control
Flag register
Bus Interface Unit (BIU)
Microprocessor System Design
3-20
General Purpose Registers
15
Data Group
Pointer and
Index Group
8 7
0
AX
AH
AL
Accumulator
BX
BH
BL
Base
CX
CH
CL
Counter
DX
DH
DL
Data
SP
Stack Pointer
BP
Base Pointer
SI
Source Index
DI
Destination Index
Microprocessor System Design
3-21
Arithmetic Logic Unit (ALU)
A
B
n bits
n bits
Carry
Y= 0 ?
F
A>B?
0
0
0
0
1
1
F
Y
0
0
1
1
0
0
0 A+B
1
A -B
0
A -1
1
A and B
0
A or B
1 not A
  
  
Y
 Signal F control which function will be conducted by ALU.
 Signal F is generated according to the current instruction.
 Basic arithmetic operations: addition, subtraction, 
 Basic logic operations: and, or, xor, shifting,
Microprocessor System Design
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Flag Register
 Flag register contains information reflecting the current status of a
microprocessor. It also contains information which controls the
operation of the microprocessor.
15

0


OF DF IF TF SF ZF  AF  PF  CF
 Status Flags
 Control Flags
IF:
DF:
TF:
Interrupt enable flag
Direction flag
Trap flag
CF:
PF:
AF:
ZF:
SF:
OF:
Microprocessor System Design
Carry flag
Parity flag
Auxiliary carry flag
Zero flag
Sign flag
Overflow flag
3-23
Instruction Machine Codes
 Instruction machine codes are binary numbers
 For Example:
1000100011000011
MOV
MOV AL, BL
Register
mode
 Machine code structure
Opcode
Mode
Operand1 Operand2
 Some instructions do not have operands, or have only one operand
 Opcode tells what operation is to be performed.
(EU control logic generates ALU control signals according to Opcode)
 Mode indicates the type of a instruction: Register type, or Memory type
 Operands tell what data should be used in the operation. Operands can
be addresses telling where to get data (or where to store results)
Microprocessor System Design
3-24
EU Operation
1. Fetch an instruction from instruction
queue
2. According to the instruction, EU control
logic generates control signals.
(This process is also referred to as instruction
AH
BH
CH
DH
SP
BP
SI
DI
decoding)
3. Depending on the control signal,
EU performs one of the following
operations:
 An arithmetic operation
AL
BL
CL
DL
ALU
 A logic operation
 Storing a datum into a register
Flag register
General purpose
register
ALU Data bus
(16 bits)
EU
control
instruction
1011000101001010
 Moving a datum from a register
 Changing flag register
Microprocessor System Design
3-25
Generating Memory Addresses
 How can a 16-bit microprocessor generate 20-bit memory addresses?
Left shift 4 bits
16-bit register
+
FFFFF
0000
16-bit register
Addr1 + 0FFFF
Offset
Addr1
20-bit memory address
Offset
Segment
(64K)
Segment
address
00000
Intel 80x86 memory address generation
Microprocessor System Design
1M memory space
3-26
Memory Segmentation
 A segment is a 64KB block of memory starting from any 16-byte
boundary
 For example: 00000, 00010, 00020, 20000, 8CE90, and E0840 are all valid
segment addresses
 The requirement of starting from 16-byte boundary is due to the 4-bit
left shifting
 Segment registers in BIU
15
0
CS
Code Segment
DS
Data Segment
SS
Stack Segment
ES
Extra Segment
Microprocessor System Design
3-27
Memory Address Calculation
 Segment addresses must be stored
in segment registers
Segment address
 Offset is derived from the combination
of pointer registers, the Instruction
Pointer (IP), and immediate values
+
0000
Offset
Memory address
 Examples
3
4 8
A 0
IP +
Instruction address 3
4 2
1
1
2 3
4
0
DI +
Data address
1
0 0
2
2
2 3
6
2
CS
DS
4
8 A B 4
5
0 0
0
SP +
Stack address
5
F F
E 0
F F
E 0
SS
Microprocessor System Design
0
3-28
Fetching Instructions
 Where to fetch the next instruction?
8088
CS
IP
Memory
1234
0012
12352
MOV AL, 0
12352
 Update IP
— After an instruction is fetched, Register IP is updated as follows:
IP = IP + Length of the fetched instruction
— For Example: the length of MOV AL, 0 is 2 bytes. After fetching this instruction,
the IP is updated to 0014
Microprocessor System Design
3-29
Accessing Data Memory
 There is a number of methods to generate the memory address when
accessing data memory. These methods are referred to as
Addressing Modes
 Examples:
— Direct addressing: MOV AL, [0300H]
DS
Memory address
1
1
2 3
4
0
0 3
0
0
2 6
4
0
(assume DS=1234H)
— Register indirect addressing: MOV AL, [SI]
DS
Memory address
1
1
2 3
4
0
(assume DS=1234H)
0 3
1
0
(assume SI=0310H)
2 6
5
0
Microprocessor System Design
3-30
Reserved Memory Locations
 Some memory locations are reserved for special purposes.
Programs should not be loaded in these areas
FFFFF
 Locations from FFFF0H to FFFFFH
are used for system reset code
 Locations from 00000H to 003FFH
are used for the interrupt pointer table
 It has 256 table entries
 Each table entry is 4 bytes
Reset
instruction
area
FFFF0
Interrupt
pointer
table
256  4 = 1024 = memory addressing space
From 00000H to 003FFH
Microprocessor System Design
003FF
00000
3-31
Interrupts
 An interrupt is an event that occurs while the processor is executing a program
 The interrupt temporarily suspends execution of the program and switch the
processor to executing a special routine (interrupt service routine)
 When the execution of interrupt service routine is complete, the processor
resumes the execution of the original program
 Interrupt classification
Hardware Interrupts
 Caused by activating the processor’s
interrupt control signals (NMI,
INTR)
Software Interrupts
 Caused by the execution of an INT
instruction
 Caused by an event which is
generated
by the execution of a program, such
as division by zero
 8088 can have 256 interrupts
Microprocessor System Design
3-32
Minimum and Maximum Operation modes
 Intel 8088 (8086) has two operation modes:
Minimum Mode
Maximum Mode
 8088 generates control signals
for memory and I/O operations

It needs 8288 bus controller to generate
control signals for memory and I/O
operations
 Some functions are not available
in minimum mode

It allows the use of 8087 coprocessor;
it also provides other functions
 Compatible with 8085-based
systems
Microprocessor System Design
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