ECEN689: Special Topics in Optical
Interconnects Circuits and Systems
Spring 2022
Lecture 5: Transimpedance Amplifiers (TIAs)
Sam Palermo
Analog & Mixed-Signal Center
Texas A&M University
Announcements
• Homework 2 is posted on website and due today
• Exam 1 Mar 10
•
•
•
•
In class
One double-sided 8.5x11 notes page allowed
Bring your calculator
Covers through Lecture 6
• Reading
• Sackinger Chapter 5
• Razavi Chapter 4
2
Agenda
• Optical Receiver Overview
• Transimpedance Amplifiers
•
•
•
•
Common-Gate TIAs
Feedback TIAs
Common-Gate & Feedback TIA Combinations
Differential TIAs
• Integrating Optical Receivers
• Equalization in Optical Front-Ends
3
Optical Receiver Technology
• Photodetectors convert optical
power into current
• p-i-n photodiodes
• Waveguide Ge photodetectors
• Electrical amplifiers then
convert the photocurrent into a
voltage signal
• Transimpedance amplifiers
• Limiting amplifiers
• Integrating optical receiver
TIA Output
LA Output
4
Transimpedance Amplifier (TIA)
Transimpedance ZT 
vo
ii
 
Also expressed in units of dB by 20 log ZT

• Key design objectives
• High transimpedance gain
• Low input resistance for high bandwidth and efficient gain
• For large input currents, the TIA gain can compress
and pulse-width distortion/jitter can result
5
Maximum Currents
• Input Overload Current
• The maximum peak-to-peak input current for which we can
achieve the desired BER
pp
 2 R P ovl
• Assuming high extinction ratio iovl
• Maximum Input Current for Linear Operation
• Often quantified by the current level for a certain gain
compression (1dB)
pp
pp
ilin  iovl
6
Resistive Front-End
[Razavi]
2
n,out
D
2
in
L
n,R
D
out
L
RT  Rin  RL
BW3dB
1
1
 p 

Rin C D RL C D


0
0
Vn2,out   I n2 Z T2 df  
I
2
n ,in

4kT
RL
Vn2,out
RL2
I n ,in ,rms 
2


R
kT

 df 
CD
 1  j 2fRC 
kT
 2
RL C D
KT C D
RL
• Direct trade-offs between transimpedance,
bandwidth, and noise performance
7
Agenda
• Optical Receiver Overview
• Transimpedance Amplifiers
•
•
•
•
Common-Gate TIAs
Feedback TIAs
Common-Gate & Feedback TIA Combinations
Differential TIAs
• Integrating Optical Receivers
• Equalization in Optical Front-Ends
8
Common-Gate TIA
[Razavi]
out
i
m
i
o
mb
i
D
in
in
RT  RD
Rin 
ro  RD
1

1   g m  g mb ro g m
• Input resistance (input bandwidth) and
transimpedance are decoupled
9
Common-Gate TIA Frequency Response
[Razavi]
D
out
B
in
in
Neglecting transistor ro :
out
B
vout
RD

iin


Cin
1  s
1  sRD Cout 
g m1  g mb1 

• Often the input pole may dominate due to
large photodiode capacitance (100 – 500fF)
10
Common-Gate TIA Noise
[Razavi]
2
n ,out
V

Neglecting transistor ro :

2
1  2
 RD
R  4kT  g m 2 
 I
I
R
3
D 

2
1   A2 
2
 

I n ,in  4kT  g m 2 
R
3
Hz
D 



2
n,M 2
2
n , RD
2
D
 V2 


Hz


• Both the bias current source
and RD contribute to the
input noise current
• RD can be increased to
reduce noise, but voltage
headroom can limit this
• Common-gate TIAs are
generally not for low-noise
applications
• However, they are relatively
simple to design with high
stability
11
Regulated Cascode (RGC) TIA
• Input transistor gm is
boosted by commonsource amplifier gain,
resulting in reduced input
resistance
[Park ESSCIRC 2000]
• Requires additional voltage
headroom
• Increased input-referred
noise from the commonsource stage
12
CMOS 20GHz TIA
• An additional commongate stage in the
feedback provides
further gm-boosting
and even lower input
resistance
• Shunt-peaking
inductors provide
bandwidth extension
at zero power cost, but
very large area cost
[Kromer JSSC 2004]
A2  g m 2 R2
A3   g m 3 R3
13
Agenda
• Optical Receiver Overview
• Transimpedance Amplifiers
•
•
•
•
Common-Gate TIAs
Feedback TIAs
Common-Gate & Feedback TIA Combinations
Differential TIAs
• Integrating Optical Receivers
• Equalization in Optical Front-Ends
14
Feedback TIA w/ Ideal Amplifier
With Infinite Bandwidth Amplifier :


1


ZT s    RT
1  s  
p

Rin 
RT 
p 
RF
A 1
A
RF
A 1
A 1
1

RinCT RF CD  C I 
• Input bandwidth is extended by the factor A+1
• Transimpedance is approximately RF
• Can make RF large without worrying about voltage
headroom considerations
15
Feedback TIA w/ Finite Bandwidth Amplifier
With Finite Bandwidth Amplifier :
A
A

As  
s
1  sTA
1
A


1

Z T s    RT 
2
2 
 1  s oQ   s o 
A
RT 
RF
A 1
A 1
o 
RF CT TA
• Finite bandwidth amplifier
modifies the transimpedance
transfer function to a secondorder low-pass function
Q
 A  1RF CT TA
RF CT  TA
RF
Rin 
A 1
16
Feedback TIA w/ Finite Bandwidth Amplifier
• Non-zero amplifier time constant
can actually increase TIA
bandwidth!!
• However, can result in peaking in
frequency domain and
overshoot/ringing in time domain
• Often either a Butterworth
(Q=1/sqrt(2)) or Bessel response
(Q=1/sqrt(3)) is used
• Butterworth gives maximally flat
frequency response
• Bessel gives maximally flat groupdelay
[Sackinger]
RF
CD
iin
-A(s)
vout
CI
Butterworth
Bessel
17
Feedback TIA Transimpedance Limit
If we assume a Butterworth response for mazimally flat frequency response :
Q
1
2

A 
1
2A

TA RF CT
For a Butterworth response :
3dB  0 
Plugging RT 
 A  1 A
RF CT

 A  12 A 
RF CT
2 times larger than TA  0 case of
A 1
RF CT
A
RF into above expression yields the maximum possible RT for a given bandwidth
A 1
 A  1 A
 A  1

 RT CT
 A 
 3dB
Maximum RT 
A A
2
CT 3dB
[Mohan JSSC 2000]
• Maximum RT proportional to amp gain-bandwidth product
• If amp GBW is limited by technology fT, then in order to
increase bandwidth, RT must decrease quadratically!
18
Feedback TIA
Assuming that the source follower has an ideal gain of 1
A  g m1 RD
D
D
A
RT 
in
g m1 RD
RF
1  g m1 RD
Rin 
out
F
Rout 
RF
1  g m1 RD
1
g m 2 1  g m1 RD 
• As power supply voltages drop, there is not much
headroom left for RD and the amplifier gain degrades
19
CMOS Inverter-Based Feedback TIA
[Li JSSC 2014]
• CMOS inverter-based TIAs allow for reduced voltage
headroom operation
• Cascaded inverter-gm + TIA stage provide additional
voltage gain
• Low-bandwidth feedback loop sets the amplifier output
common-mode level
20
Input-Referred Noise Current
 pA 2 


 Hz 


• TIA noise is modeled with an input-referred noise current
source that reproduces the output TIA output noise when
passed through an ideal noiseless TIA
• This noise source will depend on the source impedance,
which is determined mostly by the photodetector capacitance
21
Input-Referred Noise Current Spectrum
 pA 2 


 Hz 


• Input-referred noise current spectrum typically
consists of uniform, high-frequency f2, & lowfrequency 1/f components
• To compare TIAs, we need to see this noise graph
out to ~2X the TIA bandwidth
• Recall the noise bandwidth tables
22
Input-Referred RMS Noise Current
• The input-referred rms noise current can be calculated by
dividing the rms output noise voltage by the TIA’s midband
transimpedance value
inrms
,TIA 
1
RT
 2 BW
0
ZT  f  I n2,TIA  f df
2
• If we integrate the output noise, the upper bound isn’t too
critical. Often this is infinity for derivations, or 2X the TIA
bandwidth in simulation
• This rms current sets the TIA’s electrical sensitivity
pp
isens
 2Qinrms
,TIA
• To determine the total optical receiver sensitivity, we need to
consider the detector noise and responsivity
23
Averaged Input-Referred Noise Current Density
• TIA noise performance can also be quantified by
the averaged input-referred noise current density
rms
i
n ,TIA

inavg
,TIA
BW3dB
 pA 
This quantity has units of 
.
 Hz 
Note, this is different than averaging the input - referred noise spectrum,
I n2,TIA  f  over the TIA bandwidth.
24
FET Feedback TIA Input-Referred
Noise Current Spectrum
• The feedback resistor and amplifier front-end noise
components determine the input-referred noise
current spectrum
I n2,TIA  f   I n2,res  f   I n2, front  f 
• The feedback resistor component is uniform with
frequency
4kT
2
I n,res  f  
RF
25
FET Feedback TIA Input-Referred
Noise Current Spectrum
• Gate current-induced shot noise
I n2,G  2qI G
This is typically small for CMOS designs
• FET channel noise
I n2, D  4kTg m
 is the channel noise factor, typically 0.7 - 3 depending on the process.
26
Input-Referring the FET Channel Noise
To do this, we could calculate
in,TIA
in, D
 vout 


i 
n, D 

ZT
But it is easier (and equivalent) to ground the output and calculate
1
in, D
 in, D 


i

 n,TIA 
g min,TIA
g m RF
i
 g mvn,TIA 

1 1  sRF CT n,TIA
sCT 
RF
where CT  CD  CI , the summation of the detector and amplifier input capacitance.
1
 in, D 

  1  sRF CT
i

g m RF
 n,TIA 
Using this high - pass transfer function, the input - referred FET channel noise is
I n2, front , D
f 
1  2fRF CT 2
 1
 4kT
2
 g m RF
 g m RF 
2
 4kTg m
 2CT 2  2

f
  4kT

 g

m



Uniform and f2 component!
27
Total Input-Referred FET Feedback TIA Noise
I n2,TIA

 f   4kT  2qIG  4kT 1 2
RF
 g m RF
Feedback Resistor
Gate Shot Noise
 2CT 2  2

f
  4kT

 g

m



FET Channel Noise
• Note that the TIA input-referred noise current
spectrum begins to rise at a frequency lower than
the TIA bandwidth
28
Agenda
• Optical Receiver Overview
• Transimpedance Amplifiers
•
•
•
•
Common-Gate TIAs
Feedback TIAs
Common-Gate & Feedback TIA Combinations
Differential TIAs
• Integrating Optical Receivers
• Equalization in Optical Front-Ends
29
Common-Gate & Feedback TIA
[Mohan JSSC 2000]
Feedback TIA
RF
RF
Common-Gate
• Recall that the feedback TIA stability depends on the ratio of the input
pole (set by CD) and the amplifier pole
• Large variation in CD can degrade amplifier stability
• Common-gate input stage isolates CD from input amplifier capacitance,
allowing for a stable response with a variety of different photodetectors
• Transimpedance is still approximately RFA/(1+A)
30
BJT Common-Base & Feedback TIA
• Transformer-based negative feedback boosts gm with low
power and noise overhead
• Input series peaking inductor isolates the photodetector
capacitance from the TIA input capacitance
• High frequency techniques allow for 26GHz bandwidth with
group delay variation less than 19ps
[Li JSSC 2013]
31
Agenda
• Optical Receiver Overview
• Transimpedance Amplifiers
•
•
•
•
Common-Gate TIAs
Feedback TIAs
Common-Gate & Feedback TIA Combinations
Differential TIAs
• Integrating Optical Receivers
• Equalization in Optical Front-Ends
32
Differential TIAs
• Differential circuits have superior
immunity to power
supply/substrate noise
• A differential TIA output allows
easy use of common differential
main/limiting amplifiers
• This comes at the cost of higher
noise and power
• How to get a differential output
with a single-ended photocurrent
input?
• Two common approaches, based on
the amount of capacitance applied at
the negative input
33
Balanced TIA
• A balanced TIA design attempts
to match the capacitance of the
two differential inputs
C X  CD
• This provides the best power
supply/substrate noise
immunity, as the noise transfer
functions are similar
• Due to double the circuitry, the
input-referred rms noise
current is increased by sqrt(2)
Assuming an high BW amplifier
and CT  CD  CI
ZT s  
vOP  vON
ii
 A 

 RF
A  1

sC R
1 T F
A 1
Same transfer function as the single - ended design
34
Pseudo-Differential TIA
• A pseudo-differential TIA design
uses a very large capacitor at the
negative input, such that it can
be approximated as an AC
ground C  
X
• While not good to reject power
supply/substrate noise, it does
provide significant filtering of
the RF’ noise
• The differential transimpedance
is approximately doubled
relative to the single-ended case
Assuming an high BW amplifier
and CT  CD  CI
ZT  s  
vOP  vON
ii
 2A 

 RF

2
A


sC R
1 T F
A
1
2
35
Offset Control
• Due to the single-ended
photodetector signal, the
differential output signal
swings from 0 to Vppd,
which can limit the
dynamic range
• Adding offset control
circuitry can allow for an
output swing of ±Vppd/2
36
Differential Shunt Feedback TIA
37
Agenda
• Optical Receiver Overview
• Transimpedance Amplifiers
•
•
•
•
Common-Gate TIAs
Feedback TIAs
Common-Gate & Feedback TIA Combinations
Differential TIAs
• Integrating Optical Receivers
• Equalization in Optical Front-Ends
38
Optical RX Scaling Issues

Traditionally, TIA has
high RT and low Rin
 A 
RT  RF 

 1 A
 3dB 

1 A
RF C IN
Headrooom/Gain issues
in 1V CMOS
• A≈2–3

Power/Area Costs
2
TIA I D   RT C IN  f 34dB
LA I D  f
2
3 dB
V A  VGS 1  VGS 2  0.8 *VDD
A  g m 1 RD 
 VDD  V A   0.2 *VDD 
VOD

VOD
39
Integrating Receiver Block Diagram
[Emami VLSI 2002]
40
Demultiplexing Receiver
• Demultiplexing with multiple clock phases allows
higher data rate
̶ Data Rate = #Clock Phases x Clock Frequency
̶ Gives sense-amp time to resolve data
̶ Allows continuous data resolution
41
1V Modified Integrating Receiver
Differential Buffer
Fixes sense-amp common-mode input for improved
speed and offset performance
Reduces kickback charge
Cost of extra power and noise
Input Range = 0.6 – 1.1V
42
Receiver Sensitivity Analysis
Residual SA Offset = 1.15mV
Max Vin(IAVG) = 0.6mV
 buffer  1.03mV  SA  0.45mV
2kT
 samp 
 0.92mV
C samp
Vb C pd  C in
Pavg 
 j 
Tb
Clock Jitter Noise  clk    v b  0.65mV at 16Gb/s
 Tb 
P

Total Input Noise  tot  
Vb for BER =
10-10
2
samp

2
buffer

2
SA

2
clk
 1.59mV
= 6.4tot + Offset = 11.9mV
Gb/s

avg
(dBm)
10
-9.8
16
-7.8
43
Integrating Receiver Sensitivity
• Test Conditions
̶
̶
8B/10B data patterns
(variance of 6 bits)
Long runlength data
(variance of 10 bits)
• BER < 10-10
[Palermo JSSC 2008]
44
Integrating RX with Dynamic Threshold
• Dynamic threshold
adjustment allows
for un-coded data
[Nazari ISSCC 2012]
45
Integrating RX with Dynamic Threshold
[Nazari ISSCC 2012]
46
Agenda
• Optical Receiver Overview
• Transimpedance Amplifiers
•
•
•
•
Common-Gate TIAs
Feedback TIAs
Common-Gate & Feedback TIA Combinations
Differential TIAs
• Integrating Optical Receivers
• Equalization in Optical Front-Ends
47
Low-BW TIA & CTLE Front-End
[Li JSSC 2014]
• Improved sensitivity is possible by increasing the first stage
feedback resistor, resulting in a high-gain low-bandwidth TIA
• The resultant ISI is cancelled by a subsequent CTLE
48
Active CTLE Example
Vo+
Din-
VoDin+
49
Low-BW TIA & CTLE Front-End
[Li JSSC 2014]
• Significant reduction in feedback
resistor noise
• Low-frequency input and post
amplifier noise is also reduced
50
Low-BW TIA & CTLE Front-End
[Li JSSC 2014]
25Gb/s Eye Diagram
51
Low-BW TIA & DFE RX
[Ozkaya JSSC 2017]
• In a similar manner, a high-gain low-bandwidth TIA is
utilized
• The resultant ISI is cancelled by a subsequent 1-tap loopunrolled DFE
52
DFE Example
• If only DFE equalization, DFE tap coefficients
should equal the unequalized channel pulse
response values [a1 a2 … an]
• With other equalization, DFE tap coefficients
should equal the pre-DFE pulse response values
•
•
DFE provides flexibility in the optimization of other
equalizer circuits
i.e., you can optimize a TX equalizer without caring
about the ISI terms that the DFE will take care of
[w1 w2]=[a1 a2]
a1
a2
53
Low-BW TIA & DFE RX
[Ozkaya JSSC 2017]
• As RF is increased, the main cursor increases and the SNR
improves is ISI is cancelled by a DFE
• Large performance benefit with a low-complexity 1-tap DFE
54
Low-BW TIA & DFE RX
[Ozkaya JSSC 2017]
64Gb/s Pulse Response
& Timing Margin
• Self-referenced TIA is used for
differential generation
• Actual 64Gb/s pulse response has
a significant pre-cursor ISI tap,
which requires a 2-tap TX FFE
55
Next Time
• Main/Limiting Amplifiers
56