PCI Express
Transaction Layer and
Data Link Layer introduction
Qinyu
2022/05/09
Outline
• PCIe layer overview
• PCI Express Topology and Link
• Link layer overview
• Transaction Layer
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Transaction layer packet(TLP)、TLP header
Routing
Virtual channel
Transaction ordering
Flow control
• Data Link Layer
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Data Link Control and Management State Machine(DLCMSM)
Flow Control Initialization
Data Link Layer Packet (DLLPs)
Ack/Nak DLLP Processing flow
PCI Express
• PCIe topology
• Root Complex(RC)、Switch、Endpoint
• PCIe Link
• Lane、Channel
PCIe layer overview
Transaction layer
• Layer overview
• Transaction layer
• TLP transmitted and TLP received.
• Flow control、Ordering
Data link layer
• Data link layer
• Data Exchange、Error Detection
• Ack/nak、Flow control
Physical layer
• Physical layer
• Scrambler/descrambler、Encoder/decoder
• Parallel to serial、Serial to parallel
TLPs
DLLPs
Outline
• PCIe layer overview
• PCI Express Topology and Link
• Link layer overview
• Transaction Layer
•
•
•
•
•
Transaction layer packet(TLP)、TLP header
Routing
Virtual channel
Transaction ordering
Flow control
• Data Link Layer
•
•
•
•
Data Link Control and Management State Machine(DLCMSM)
Flow Control Initialization
Data Link Layer Packet (DLLPs)
Ack/Nak DLLP Processing flow
Transaction layer packet(TLP) Format
• TLP Prefixes(optional)
• TLP Header
• Data Payload
• TLP Digest(optional、ECRC)
TLP Header
• Fmt、Type
• TC (Traffic class)
• Attr
• Length
Request and Completion
• Request TLP and Completion TLP
• Posted request: Not require Completion
• Non-Posted request: require Completion
Non-Posted Memory read
Posted Memory write
TLP routing
• Packet to who? Determined by routing .
• Three routing types
• Address routing、ID routing、Implicit routing(used by message TLP)
To who endpoint?
ID routing
• BDF(Bus、Device and Function)
• ARI(Alternative Routing-ID)
Byte Enable(BE) Rule
• Data payload 的大小不是DW的整數倍
• 使用Byte Enable 解決這個問題。
• 1’b0 : data is invalid ; 1’b1 : data is valid
• If length = 1DW => 1st DW BE ≠ 4’b0, last DW BE = 4’b0
• If length > 1DW => 1st DW BE ≠ 4’b0, last DW BE ≠ 4’b0
• If length = 1DW or 2DW => Non-contiguous BE are permitted
Virtual Channel(VC) Mechanism
• Independent fabric resources (queues/buffers and associated control logic).
• Defualt have VC0.
• For packet priority and flow control
• With fully independent Flow Control between different VCs
TC to VC Mapping
• TC (Traffic class) is for distinguishing packet priority
• Every TC is mapped to one of the Virtual channels
Transaction Ordering
• The ordering rules defined in this table apply within a single Traffic
Class (TC).
• Yes: The second transaction (row) must be allowed to pass the first (column) to avoid deadlock.
• Y/N:The second transaction may optionally pass the first transaction or be blocked by it.
• No:The second transaction must not be allowed to pass the first transaction.
• a):沒有打開RO (Relaxed ordering)
• b):有打開RO
Flow control Mechanism
• Prevent overflow of Receiver buffer
• Requester to track the queue/buffer space available in the
agent across the Link
• Flow control packet is DLLP type
Outline
• PCIe layer overview
• PCI Express Topology and Link
• Link layer overview
• Transaction Layer
•
•
•
•
•
Transaction layer packet(TLP)、TLP header
Routing
Virtual channel
Transaction ordering
Flow control
• Data Link Layer
•
•
•
•
Data Link Control and Management State Machine(DLCMSM)
Flow Control Initialization
Data Link Layer Packet (DLLPs)
Ack/Nak DLLP Processing flow
Data Link Layer function support
• Date Exchange
• Convey to the Transmit Physical layer
• Convey to the Receive Transaction layer
• Error Detection and retry
• TLP sequence number and LCRC generation
• Transmitted TLP storage for Data Link Layer Retry
• Data integrity checking
• Flow control and power management
• InitFC1、InitFC2、UpdateFC (flow control DLLPs)
• PM_Enter_L1、PM_Enter_L23、PM_XXXX(power management DLLPs)
• Status output
• DL_Down、DL_UP
Data Link Control and
Management State Machine(DLCMSM)-1
• DL_Inactive
• Physical Layer reporting Link is non-operational (LinkUp = 0b) or nothing is connected to the
Port
• Initial state following PCIE hot or warm reset
• Discard contents in Retry buffer
• Report DL_Down and Discard any outstanding transactions
• Do not generate or accept DLLPs
• DL_Feature (optional)
• Physical Layer reporting Link is operational (LinkUp = 1b)
• Perform the Data Link Feature Exchange(ex:scale)
• Report DL_Down
Data Link Control and
Management State Machine(DLCMSM)-2
• DL_Init
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Physical Layer reporting Link is operational (LinkUp = 1b)
Initialize Flow Control for the default Virtual Channel (VC0)
Report DL_Down in FC_Init1
Report DL_UP in FC_Init2
DL_Active
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Normal operation mode
Accept and transfer TLP
Generate and accept DLLPs
Report DL_UP
Flow Control Initialization (1)
• Enter DL_Init state
• FC_INIT1 -> FC_INIT2 statue
• Transmit three InitFC1/2 DLLPs: InitFC1/2_P (first) -> InitFC1/2_NP(Second) ->
InitFC1/2_Cpl(third)
• Must be transmitted at least once every 34us
• Recode HdrFC and DataFC valus for P, NP and Cpl and then set FI1 flag
• The credit value of FC_INIT1 and FC_INIT2 are the same
DLLPs
• DLLP : DLLP type + 16-bit CRC
DLL Processing Flow
Transmitter
Receiver
NRS+1
DLL layer
ACK/NAK example (1)
ACK
NAK
ACK/NAK example (2)
Lost TLPs
Bad NAK
END