Accounting for the body effect in the compact modeling of an
“extrinsic” MOSFET drain current in the linear and saturation
regimes
V. Turin*a, R. Shkarlata, b, V. Poyarkovb, O. Kshenskyb, G. Zebrevc, B. Iñiguezd, M. Shure
Orel State University named after I.S. Turgenev, 95 Komsomolskaya Street, Orel, Russia 302026;
b
JSC “Bolkhov Plant of Semiconductor Devices”, Bolkhov, Orel region, Russia; cNational Research
Nuclear University “MEPHI”, Moscow, Russia; dRovira i Virgili University, Tarragona, Spain;
e
Rensselaer Polytechnic Institute, Troy, NY, USA
a
ABSTRACT
We use a linear approximation for the threshold voltage dependence on the body bias to derive the equation for the
equivalent output resistance of the “extrinsic” MOSFET in the saturation regime. Previously we derived an equation for
the equivalent output resistance of the “extrinsic” MOSFET in the saturation regime, that is based on the “intrinsic”
transistor finite output resistance in the saturation regime. But we did not account for the body effect, i.e., the threshold
voltage dependence on the body bias applied between the source and the fourth (body) MOSFET terminal. For the earlier
generations of MOSFETs, the theory predicts that threshold voltage is a sublinear function of the body bias. However,
modern transistors with steep retrograde body doping profiles exhibit an approximately linear relationship between a
threshold voltage and a body bias, which allowed us to include the body effect into the compact model of an “extrinsic
MOSFET. In addition, we discuss the application of our results to the theory of a common-gate amplifier and a commonsource amplifier with an NMOS transistor with source degeneration.
Keywords: MOSFET, body effect, contacts parasitic resistances, output resistance, saturation regime, source
degeneration, compact modeling
INTRODUCTION
Our previously proposed smoothing function [1] for an “intrinsic” (without accounting for the contact parasitic resistances)
MOSFET ensures a monotonic increase of the output resistance from the minimum value in the linear regime to the
maximum finite value in the saturation regime, that is due to short-channel effects. In [2] we derived an equation for the
equivalent output resistance of the “extrinsic” (with accounting for the contact parasitic resistances) MOSFET in the
saturation regime, based on the “intrinsic” transistor finite output resistance. In [3] we used the “improved” smoothing
function for compact modeling of an “extrinsic” MOSFET. So far, we have not accounted for the body effect, i.e., the
threshold voltage dependence on the body bias applied between the source and the fourth (body) MOSFET terminal. In
this paper, we will take into account the body effect in a linear approximation [4] in the equation for the output resistance
of an “extrinsic” MOSFET in the linear regime and the saturation regime.
THE BODY EFFECT IN THE LINEAR APPROXIMATION
The fact that the threshold voltage 𝑉𝑡 is a function of the source-to-body bias 𝑉𝑆𝐵 (see Figure 1) is called the body effect.
In earlier generations of MOSFETs, the body doping density was more or less uniform. In that case, the theory predicts
that threshold voltage is a sublinear function of the source-to-body bias [4]-[9]:
𝑉𝑡 = 𝑉𝑡0 + 𝛾(√2𝛷𝐵 + 𝑉𝑆𝐵 − √2𝛷𝐵 )
(1)
with the back-gate transconductance parameter 𝜂 = 𝜕𝑉𝑡 ⁄𝜕𝑉𝑆𝐵 = 𝛾⁄(2√2𝛷𝐵 + 𝑉𝑆𝐵 ) [9]. Equation (1) can be linearized by
Taylor expansion, so that 𝑉𝑡 can be approximated as a linear function of 𝑉𝑆𝐵 in case when one is small enough (𝑉𝑆𝐵 ≪ 𝛷𝐵 ):
𝑉𝑡 ≈ 𝑉𝑡0 + 𝜕𝑉𝑡 ⁄𝜕𝑉𝑆𝐵 |𝑉𝑆𝐵=0 ∙ 𝑉𝑆𝐵 = 𝑉𝑡0 + 𝛾⁄(2√2𝛷𝐵 ) ∙ 𝑉𝑆𝐵 .
*voturin@mail.ru; phone 7 920 825-0040; oreluniver.ru/employee/2481
(2)
Figure 1. Schematic cross-section of an n-channel MOSFET with four terminals (including the fourth (body) terminal).
Modern transistors employ steep retrograde body doping profiles (lightdoping in a thin surface layer and very heavy doping
underneath). The depletion-layer thickness is basically the thickness of the lightly doped region. As 𝑉𝑆𝐵 increases, the
depletion layer does not change significantly. As a result, modern transistors exhibit a more or less linear relationship
between the threshold voltage and the source-to-body bias [4]:
𝑉𝑡 = 𝑉𝑡0 + 𝛼𝐵 𝑉𝑆𝐵 .
(3)
Here 𝛼𝐵 is called the body-effect coefficient, which is constant and can be extracted from the slope of the 𝑉𝑡 (𝑉𝑆𝐵 ) curve
[4]. The polarity of the body bias is normally that which would reverse bias the body-source junction. Hence, for NMOS
transistors, usually, for the source-to-body bias, we have 𝑉𝑆𝐵 > 0 and for the body-to-source: 𝑉𝐵𝑆 = −𝑉𝑆𝐵 < 0 .
THE EQUIVALENT “EXTRINSIC” TRANSISTOR WITHOUT BODY TERMINAL
In the “intrinsic” case, the overdrive voltage 𝑉𝐺𝑇 is
𝑉𝐺𝑇 = 𝑉𝐺𝑆 − 𝑉𝑡 = 𝑉𝐺𝑇0 − 𝛼𝐵 𝑉𝑆𝐵
with
𝑉𝐺𝑇0 = 𝑉𝐺𝑆 − 𝑉𝑡0 .
(4)
An “extrinsic” MOSFET has parasitic resistors 𝑅𝑆 in series with its source terminal and a 𝑅𝐷 in series with its drain terminal
(see Figure 2). The total parasitic resistance is 𝑅𝑇 = 𝑅𝑆 + 𝑅𝐷 . For “intrinsic” and “extrinsic” gate-to-source and drain-tosource biases we have [10][11]:
𝑉𝐺𝑆 = 𝑉𝑔𝑠 − 𝐼𝑅𝑆 ,
(5)
𝑉𝐷𝑆 = 𝑉𝑑𝑠 − 𝐼𝑅𝑇 .
(6)
For “intrinsic” and “extrinsic” body-to-source bias we have:
𝑉𝐵𝑆 = 𝑉𝑏𝑠 − 𝐼𝑅𝑆 .
(7)
We can rewrite this equation in terms of source-to-body bias, accounting for the fact that 𝑉𝐵𝑆 = −𝑉𝑆𝐵 and 𝑉𝑏𝑠 = −𝑉𝑠𝑏 :
𝑉𝑆𝐵 = 𝑉𝑠𝑏 + 𝐼𝑅𝑆 .
(8)
We can substitute (8) into (3) to obtain the equation for the threshold voltage in the “extrinsic” case:
𝑉𝑡 = (𝑉𝑡0 + 𝛼𝐵 𝑉𝑠𝑏 ) + 𝛼𝐵 𝐼𝑅𝑆 .
(9)
𝑉𝐺𝑇 = 𝑉𝑔𝑠 − (𝑉𝑡0 + 𝛼𝐵 𝑉𝑠𝑏 ) − 𝐼(1 + 𝛼𝐵 )𝑅𝑆 .
( 10 )
After substitution (5) and (9) into (4) we have
From (10) we can see that it is possible to introduce the equivalent transistor without the body terminal (see Figure 2) with
the equivalent threshold voltage:
𝑉𝑡∗ = 𝑉𝑡0 + 𝛼𝐵 𝑉𝑠𝑏
( 11 )
Figure 2. A four-terminal “intrinsic” MOSFET with parasitic contact resistors and the body (fourth) terminal on the left and
a three-terminal equivalent “intrinsic” MOSFET with an equivalent threshold voltage and equivalent parasitic contact
resistors on the right. Corresponding “intrinsic” MOSFETs are in the boxes drawn with short-dashed lines and “extrinsic”
MOSFETs are in the boxes drawn with long-dashed lines.
and with equivalent source resistance 𝑅𝑆∗ and drain resistance 𝑅𝐷∗ :
𝑅𝑆∗ = (1 + 𝛼𝐵 )𝑅𝑆 ,
( 12 )
𝑅𝐷∗
( 13 )
= 𝑅𝐷 − 𝛼𝐵 𝑅𝑆 .
For the “extrinsic” overdrive voltage we have:
𝑉𝑔𝑡 = 𝑉𝑔𝑠 − 𝑉𝑡 = 𝑉𝑔𝑡0 − 𝛼𝐵 𝑉𝑆𝐵 = 𝑉𝑔𝑡0 − 𝛼𝐵 𝑉𝑠𝑏 − 𝛼𝐵 𝐼𝑅𝑆
with
𝑉𝑔𝑡0 = 𝑉𝑔𝑠 − 𝑉𝑡0 .
( 14 )
For the equivalent “extrinsic” overdrive voltage we have:
∗
𝑉𝑔𝑡
= 𝑉𝑔𝑠 − 𝑉𝑡∗ = 𝑉𝑔𝑡0 − 𝛼𝐵 𝑉𝑠𝑏 .
( 15 )
∗
Note, that 𝑉𝑔𝑡
= 𝑉𝑔𝑡 + 𝛼𝐵 𝐼𝑅𝑆 . With the use of equation (12) and equation (15), we can rewrite equation (10) as
∗
𝑉𝐺𝑇 = 𝑉𝑔𝑡
− 𝐼𝑅𝑆∗ .
( 16 )
LINEAR REGIME
The output resistance of an “intrinsic” MOSFET in the linear regime (see Figure 3(a)) is [10]
∗
𝑟ch = 1⁄𝛽𝑉𝑔𝑡
.
( 17 )
Here 𝛽- the transconductance parameter. The output resistance of an “extrinsic” MOSFET in the linear regime (see Figure
4(a)) is [10]:
𝑅𝑐ℎ = 𝑟ch + 𝑅𝑇 .
( 18 )
SATURATION CURRENT AND VOLTAGE
The saturation current of an “intrinsic” MOSFET (see Figure 3(b)) is [10]
𝐼𝑆𝐴𝑇 =
𝛽𝑉𝐿2
𝛼
(√1 + (
𝛼𝑉𝐺𝑇 2
) − 1) .
𝑉𝐿
( 19 )
Here 𝑉𝐿 is the characteristic voltage for velocity saturation. And 𝛼 is:
𝛼=
where 𝑚𝐵 = 1 + 𝛼𝐵 is the bulk-charge factor [4].
1
1+𝛼𝐵
=
1
𝑚𝐵
.
( 20 )
Figure 3. (a) Static circuit model (equivalent circuit) of an “intrinsic” MOSFET operated in its linear (ohmic) regime. (b) A
large-signal circuit model for an “intrinsic” MOSFET that is biased to operate in its saturation regime [12].
The transconductance is:
𝑔𝑚 =
𝜕𝐼𝑆𝐴𝑇
𝜕𝑉𝐺𝑆
= 𝛼𝛽𝑉𝐺𝑇 ⁄√1 + (
𝛼𝑉𝐺𝑇 2
𝑉𝐿
) .
( 21 )
The “intrinsic” MOSFET saturation voltage (see Figure 3(b)) is [10]
𝑉𝑆𝐴𝑇 = 𝑉𝐿 (1 +
𝛼𝑉𝐺𝑇
𝑉𝐿
− √1 + (
𝛼𝑉𝐺𝑇 2
) ) .
𝑉𝐿
( 22 )
We will use parameter
𝑏𝑚 =
𝜕𝑉𝑆𝐴𝑇
𝜕𝑉𝐺𝑆
= 𝛼 (1 −
𝑔𝑚
𝛽𝑉𝐿
).
( 23 )
In case of an “extrinsic” MOSFET with 𝛼𝐵 = 0 in (11) an equation for the “extrinsic” saturation current is derived [11]:
2
𝛽𝑉𝑔𝑡0
𝐼𝑠𝑎𝑡 =
1+𝛽𝑉𝑔𝑡0𝑅𝑆 +√1+2𝛽𝑉𝑔𝑡0 𝑅𝑆 +(
𝑉𝑔𝑡0 2
)
𝑉𝐿
.
( 24 )
For the equivalent “extrinsic” MOSFET in the saturation point, following (16), we have:
∗
𝑉𝐺𝑇 = 𝑉𝑔𝑡
− 𝐼𝑠𝑎𝑡 𝑅𝑆∗ .
( 25 )
By substituting (25) into (19), we can obtain an implicit equation for the equivalent “extrinsic” MOSFET saturation current:
∗
𝐼𝑠𝑎𝑡 = 𝐼𝑆𝐴𝑇 (𝑉𝑔𝑡
− 𝐼𝑠𝑎𝑡 𝑅𝑆∗ ) .
( 26 )
From (26) we can derive an explicit equation for the equivalent “extrinsic” MOSFET saturation current (see Figure 4(b)):
𝐼𝑠𝑎𝑡 =
∗2
𝛼𝛽𝑉𝑔𝑡
2
𝑉∗𝑔𝑡
)
𝑉𝐿
.
( 27 )
∗ 𝑅 ∗ +√1+2𝛼𝛽𝑉 ∗ 𝑅 ∗ +𝛼 2 (
1+𝛼𝛽𝑉𝑔𝑡
𝑔𝑡 𝑆
𝑆
∗
Note, that after substitution in this equation 𝑉𝑔𝑡
(15) and 𝑅𝑆∗ (12), for the “extrinsic” MOSFET saturation current we have:
𝐼𝑠𝑎𝑡 =
𝛼𝛽 (𝑉𝑔𝑡0 −𝛼𝐵 𝑉𝑠𝑏 )
2
𝑉𝑔𝑡0 −𝛼𝐵 𝑉𝑠𝑏
1+ 𝛽 (𝑉𝑔𝑡0 −𝛼𝐵 𝑉𝑠𝑏 )𝑅𝑆 +√1+2 𝛽 (𝑉𝑔𝑡0 −𝛼𝐵 𝑉𝑠𝑏 ) 𝑅𝑆 + 𝛼 2 (
)
2
.
( 28 )
𝑉𝐿
In case 𝛼𝐵 = 0 we have 𝛼 = 1 and this equation is in full agreement with equation (24). For an “extrinsic” saturation
voltage (see Figure 4(b)), following (6), and by substituting (25) into (22), we have:
∗
𝑉𝑠𝑎𝑡 = 𝑉𝑆𝐴𝑇 (𝑉𝑔𝑡
− 𝐼𝑠𝑎𝑡 𝑅𝑆∗ ) + 𝐼𝑠𝑎𝑡 𝑅𝑇 .
( 29 )
Figure 4. (a) Static circuit model (equivalent circuit) of an “extrinsic” MOSFET operated in its linear (ohmic) regime. (b) A
large-signal circuit model for an “extrinsic” MOSFET that is biased to operate in its saturation regime.
OUTPUT RESISTANCE IN THE SATURATION REGIME
The “intrinsic” MOSFET output resistance due to short-channel effects in the saturation regime (see Figure 3(b)) is [13]
𝑟0 = 1⁄𝜆𝐼𝑆𝐴𝑇 .
( 30 )
Here 𝜆 = 1⁄𝑉𝐸 and 𝑉𝐸 is the Early voltage. For an “intrinsic” MOSFET in the saturation regime for entry-level compact
models (Level 1, for example) a linear approximation for the dependence of the drain current on drain bias is used:
𝐼𝐴𝑆𝑌1 = 𝐼𝑆𝐴𝑇 + 𝑉𝐷𝑆 ⁄𝑟0 = 𝐼𝑆𝐴𝑇 ∙ (1 + 𝜆𝑉𝐷𝑆 ).
( 31 )
In more advanced compact models (BSIM3/4, for example) more complex equation is used:
𝐼𝐴𝑆𝑌2 = 𝐼𝑆𝐴𝑇 + (𝑉𝐷𝑆 − 𝑉𝑆𝐴𝑇 )⁄𝑟0 = 𝐼𝑆𝐴𝑇 ∙ (1 + 𝜆(𝑉𝐷𝑆 − 𝑉𝑆𝐴𝑇 )) .
( 32 )
For the “extrinsic” MOSFET in the saturation regime in [2] we considered a linear approximation for the dependence of
the drain current on the “extrinsic” drain bias in two forms:
1. The first form for entry-level compact models (31):
𝐼𝑎𝑠𝑦1 = 𝐼𝑠𝑎𝑡 + 𝑉𝑑𝑠 ⁄𝑅01.
( 33 )
We obtained the equation for the output resistance for the equivalent transistor:
𝑅01 = 𝑟0 + 𝑅𝑇 + 𝑔𝑚 𝑟0 𝑅𝑆∗ with 𝑟0 = 1⁄𝜆𝐼𝑠𝑎𝑡 .
( 34 )
2. The second form for more advanced compact models (32):
𝐼𝑎𝑠𝑦2 = 𝐼𝑠𝑎𝑡 + (𝑉𝑑𝑠 − 𝑉𝑠𝑎𝑡 )⁄𝑅02 .
( 35 )
And we obtained the output resistance for the equivalent transistor in this case (see Figure 4(b)):
𝑅02 = 𝑟0 + 𝑅𝑇 + (𝑔𝑚 𝑟0 − 𝑏𝑚 )𝑅𝑆∗ with 𝑟0 = 1⁄𝜆𝐼𝑠𝑎𝑡 .
( 36 )
Note, that in (34) and (36), in equations for 𝑔𝑚 (21) and 𝑏𝑚 (23), we use 𝑉𝐺𝑇 from (25).
APPLICATION TO THE SOURCE DEGENERATION THEORY
In the theory of a common-source amplifier the circuit that consists of an NMOS transistor with a resistor 𝑅S in series with
its source terminal is known as a transistor with source degeneration [14][15][16]. The output resistance, in this case, is
𝑅0 = 𝑟0 + 𝑅𝑆 + 𝑔𝑚 𝑟0 𝑅𝑆
( 37)
Note, that this equation was derived in [15] for the output resistance of the common-gate amplifier and was applied directly
to the case of a source-degenerated common-source amplifier. In addition, in [15] it is shown, that the body effect can be
taken into account by simply replacing transconductance 𝑔𝑚 by the effective transconductance 𝑔𝑚𝑒 :
𝑔𝑚𝑒 = (1 + 𝜂) 𝑔𝑚
( 38)
Figure 5. Output characteristics for an “intrinsic” (a) and “extrinsic” (b) MOSFET with zero body bias (red solid) and
without body bias (blue dash). The gate-to-source bias is 3 V for the upper curve and further down 2V and 1V.
Figure 6. Output conductance for an “intrinsic” (a) and “extrinsic” (b) MOSFET with zero body bias (red solid) and with 2V
body bias (blue dash). The gate-to-source bias is 3 V for the upper curve and further down 2V and 1V.
Figure 7. Transconductance for an “intrinsic” (a) and “extrinsic” (b) MOSFET with zero body bias (red solid) and with 2V
body bias (blue dash). The drain-to-source bias is 0.75 V for the upper curve and further down 0.5 V and 0.25 V.
A. Zero drain resistance
Let’s put 𝑅𝐷 = 0 in equations (34) and (36):
1. From (34), with 𝑅𝑆∗ = (1 + 𝛼𝐵 )𝑅𝑆 , we have:
𝑅01 = 𝑟0 + 𝑅𝑆 + 𝑔𝑚 𝑟0 (1 + 𝛼𝐵 ) 𝑅𝑆 .
( 39 )
2. From (36), with 𝑏𝑚 from (23) and with 𝛼 = 1⁄(1 + 𝛼𝐵 ), we have
𝑅02 = 𝑟0 + 𝑔𝑚 (𝑟0 (1 + 𝛼𝐵 ) +
1
𝛽𝑉𝐿
) 𝑅𝑆 .
( 40)
B. Neglecting the body effect
In addition to 𝑅𝐷 = 0, let’s put 𝛼𝐵 = 0 (𝛼 = 1) in equations (34) and (36):
1. From (34), we have
𝑅01 = 𝑟0 + 𝑅𝑆 + 𝑔𝑚 𝑟0 𝑅𝑆 .
( 41)
2. From (36), we have
𝑅02 = 𝑟0 + 𝑔𝑚 (𝑟0 +
1
𝛽𝑉𝐿
) 𝑅𝑆 .
( 42)
Note, that the equation (41) for 𝑅01 , obtained for the case when 𝑅𝐷 = 0 and 𝛼𝐵 = 0, is in full agreement with equation
(37) from [15] for an output resistance 𝑅0 of a common-gate amplifier with a signal source with a resistance 𝑅𝑆 and of a
common-source amplifier with a source degeneration resistor 𝑅𝑆 . In addition, equation (39) for 𝑅01 , obtained for the case
when 𝑅𝐷 = 0 and 𝛼𝐵 ≠ 0, can be treated as equation (37) with the effective transconductance 𝑔𝑚𝑒 = (1 + 𝛼𝐵 ) 𝑔𝑚 instead
of 𝑔𝑚 , that is taking into account the transistor’s body effect [15].
PARAMETERS AND RESULTS
Channel length 𝐿 = 150 nm; gate width 𝑊 = 750 nm; characteristic electric field for velocity saturation 𝐸𝑠𝑎𝑡 = 8 × 104
V/cm; characteristic voltage: 𝑉𝐿 = 𝐸𝑠𝑎𝑡 𝐿 = 1.2 V; the body-effect coefficient 𝛼𝐵 = 0.2; 𝑉𝑡0 = 0.4 V; the Early voltage
𝑉𝐸 = 3.3 V; 𝑅𝑆 = 2 k; 𝑅𝐷 = 1.33 k; (parasitic contact resistances are chosen sufficiently large to emphasize one's
effect); 𝑅𝑆∗ = 2.4 k; 𝑅𝐷∗ = 0.93 k; SiO2 thickness 𝑑𝑜𝑥 = 14 nm and relative permittivity 𝜀𝑜𝑥 =3.9; 𝐶𝑜𝑥 = 𝜀𝑜𝑥 𝜀0 ⁄𝑑𝑜𝑥 =
2.5 fF/m2. We suppose the process transconductance parameter 𝑘′ = 𝜇𝑛 𝐶𝑜𝑥 = 25 A/V2. Hence, the transconductance
parameter 𝛽 = 𝑘′ 𝑊 ⁄𝐿 = 125 A/V2; characteristic resistance 1⁄𝛽𝑉𝐿 = 6.7 k. In Figures 5 and 6 output characteristics
are presented for an “intrinsic” (a) and “extrinsic” (b) MOSFET with and without body bias. In Figure 5 drain current
dependence on drain-to-source bias in piecewise approximation is presented. In Figure 6 corresponding output
conductance, obtained by numerical differentiation, is presented (in an “intrinsic” case 𝑔 = 𝜕𝐼𝑑𝑠 ⁄𝜕𝑉𝐷𝑆 and in an
“extrinsic” case 𝑔 = 𝜕𝐼𝑑𝑠 ⁄𝜕𝑉𝑑𝑠 ). In Figure 7 transconductance, obtained by numerical differentiation, is presented (in an
“intrinsic” case 𝑔𝑚 = 𝜕𝐼𝑑𝑠 ⁄𝜕𝑉𝐺𝑆 and in an “extrinsic” case 𝑔𝑚 = 𝜕𝐼𝑑𝑠 ⁄𝜕𝑉𝑔𝑠 ).
CONCLUSION
In this paper, we generalized the equation for the output resistance of an “extrinsic” MOSFET in the saturation regime
with accounting for the body effect in a linear approximation, which is a good approximation for modern transistors
employed steep retrograde body doping profiles. We found that it is possible to introduce the equivalent transistor without
the body (fourth) terminal with the equivalent threshold voltage and with equivalent source and drain resistances to
simplify compact modeling of the four-terminal transistor with body (fourth) terminal. We calculated piecewise output
and transfer characteristics for “intrinsic” and “extrinsic” MOSFET with and without body bias based on the derived output
resistance of an “extrinsic” MOSFET in the saturation regime with accounting for the body effect in a linear approximation
with help of equations for the equivalent three-terminal transistor. In addition, we discussed the application of our results
to the theory of a common-gate amplifier and a common-source amplifier with an NMOS transistor with source
degeneration.
ACKNOWLEDGMENTS
The authors acknowledge the JSC “Bolkhov Plant of Semiconductor Devices” for support of Roman Shkarlat in his Ph.D.
project carried at the Orel State University named after I.S. Turgenev, which we acknowledge also.
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