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Basic microprocessor

The microprocessor is the clock-driven digital integrated circuit that is built up by using VLSI technology and that
combines all the basic functions of a central processing unit (CPU) of the computer.
Block Diagram of a Microcomputer:
Microprocessor operation:
The microprocessor accesses and stores binary instructions into memory, or circuits that store bits. Randomaccess memory is a control memory that uses registers to temporarily store data. The microprocessor stores
volatile data used by programs in RAM. Read-only memory stores data permanently on chips with instructions
built-in. It takes longer to access the information in ROM, but it does not lose information when a computer
shuts down as does RAM.
Input and Output
The microprocessor accepts input from devices, such as a mouse, keyboard, or scanner, and performs a
function on that data. It makes a decision based on the data, the microprocessor computes the information,
and then sends the results to the output devices, such as a monitor or printer, as readable information for the
user. For example, if a user using a word processor presses "m" on the keyboard, the microprocessor will
accept that and send the letter "m" to the monitor.
Arithmetic Logic Unit
The arithmetic logic unit gathers information as input from the CPU registers and operands and then does the
arithmetic operations (addition, subtraction, multiplication, and division) and logic operations (AND, OR, and
XOR). During data processing, the ALU tests conditions and prepares to take different actions based on results.
The ALU also gathers data from additional sources, including number systems, instructions, timing, and data
routing circuits, such as adders and subtracters.
The ALU has two main functions:
it performs arithmetic and logical operations (decisions).
it acts as a gateway between primary storage and secondary storage - data transferred between them passes
through the ALU.
Control unit (CU)
The CU provides several functions:
it fetches, decodes, and executes instructions
it issues control signals that control hardware components within the CPU
it transfers data and instructions around the system
Registers are small amounts of high-speed memory contained within the CPU. They are used by the processor
to store small amounts of data that are needed during processing, such as:
the address of the next instruction to be executed
the current instruction being decoded
the results of the calculations
Different processors have different numbers of registers for different purposes. Most have some, or all, of the
program counter (PC)
memory address register (MAR)
memory data register (MDR)
current instruction registers (CIR)
accumulator (ACC)
A bus is a high-speed internal connection. Buses are used to send control signals and data between the
processor and other components.
Three types of buses are used.
Address bus - carries memory addresses from the processor to other components such as primary
storage and input/output devices. The address bus is unidirectional.
Data bus - carries the data between the processor and other components. The data bus is bidirectional.
Control bus - carries control signals from the processor to other components. The control bus also
carries the clock's pulses. The control bus is unidirectional.
A cache is a small amount of high-speed random-access memory (RAM) built directly within the processor. It is
used to temporarily hold data and instructions that the processor is likely to reuse. This allows for faster
processing, as the processor does not have to wait for the data and instructions to be fetched from the RAM.
The CPU contains a clock which, along with the CU, is used to coordinate all of the computer's components.
The clock sends out a regular electrical pulse that synchronizes (keeps in time) all the components.
The frequency of the pulses is known as clock speed. Clock speed is measured in hertz (Hz). The greater the
speed, the more instructions can be performed in any given moment of time.
In the 1980s, processors commonly ran at a rate of between 3 megahertz (MHz) and 5 MHz, which is 3 million
to 5 million pulses or cycles per second. Today, processors commonly run at a rate of between 3 gigahertz
(GHz) and 5 GHz, which is 3 billion to 5 billion pulses or cycles per second.
Information Exchange
The system bus connects the microprocessor to the peripherals, such as a keyboard, mouse, printer, scanner,
speaker, or digital camera. The microprocessor sends and receives data through the system bus to
communicate with the peripherals. It only communicates with one peripheral at a time so as to not mix up any
information and send it to the wrong place. The control unit controls the timing of the information exchange.
Internal Block diagram of 8086 microprocessor:
The internal architecture of Intel 8086 is divided into 2 units: The Bus Interface Unit (BIU),
and The Execution Unit (EU). These are explained as follows below.
1. The Bus Interface Unit (BIU):
It provides the interface of 8086 to external memory and I/O devices via the System Bus. It
performs various machine cycles such as memory read, I/O read, etc. to transfer data
between memory and I/O devices.
BIU performs the following functions•
It generates the 20-bit physical address for memory access.
• It fetches instructions from the memory.
• It transfers data to and from the memory and I/O.
• Maintains the 6-byte prefetch instruction queue (supports pipelining).
BIU mainly contains the 4 Segment registers, the Instruction Pointer, a prefetch queue,
and an Address Generation Circuit.
Instruction Pointer (IP):
• It is a 16-bit register. It holds offset of the next instructions in the Code Segment.
• IP is incremented after every instruction byte is fetched.
• Address of the next instruction is calculated as CS x 10H + IP.
CS = 4321H IP = 1000H
then CS x 10H + IP = 43210H + offset = 44210H
This is the address of the instruction.
Code Segment register:
CS holds the base address for the Code Segment. All programs are stored in the Code
Segment and accessed via the IP.
Data Segment register:
DS holds the base address for the Data Segment.
Stack Segment register:
SS holds the base address for the Stack Segment.
Extra Segment register:
ES holds the base address for the Extra Segment.
Instruction Pointer:
IP contains the offset and IP are updated each time an instruction is executed.
Address Generation Circuit:
• The BIU has a Physical Address Generation Circuit.
• It generates the 20-bit physical address using Segment and Offset addresses
using the formula:
Physical Address = Segment Address x 10H + Offset Address
6 Byte Pre-fetch Queue:
• It is a 6-byte queue (FIFO).
• Fetching the next instruction (by BIU from CS) while executing the current
instruction is called pipelining.
• Gets flushed whenever a branch instruction occurs.
2. The Execution Unit (EU):
The main components of the EU are General purpose registers, the ALU, Special purpose
registers, Instruction Register and Instruction Decoder, and the Flag/Status Register.
1. Fetches instructions from the Queue in BIU, decodes, and executes arithmetic and
logic operations using the ALU.
2. Sends control signals for internal data transfer operations within the
3. Sends request signals to the BIU to access the external module.
4. It operates with respect to T-states (clock cycles) and not machine cycles.
8086 has four 16-bit general-purpose registers AX, BX, CX, and DX that store
intermediate values during execution. Each of these has two 8-bit parts (higher and lower).
• AX register:
It holds operands and results during multiplication and division operations. Also, an
accumulator during String operations.
BX register:
It holds the memory address (offset address) in indirect addressing modes.
CX register:
It holds the count for instructions like a loop, rotates, shift, and string operations.
DX register:
It is used with AX to hold 32-bit values during multiplication and division.
Arithmetic Logic Unit (16 bit):
Performs 8 and 16-bit arithmetic and logic operations.
Special purpose registers (16-bit):
• Stack Pointer:
Points to Stack top. Stack is in Stack Segment, used during instructions like PUSH,
POP, CALL, RET, etc.
• Base Pointer:
BP can hold the offset address of any location in the stack segment. It is used to
access random locations of the stack.
• Source Index:
It holds offset address in Data Segment during string operations.
• Destination Index:
It holds offset address in Extra Segment during string operations.
Instruction Register and Instruction Decoder:
The EU fetches an opcode from the queue into the instruction register. The instruction
decoder decodes it and sends the information to the control circuit for execution.
Flag/Status register (16 bits):
It has 9 flags that help change or recognize the state of the microprocessor.
6 Status flags:
1. carry flag (CF)
2. parity flag (PF)
3. auxiliary carry flag (AF)
4. zero flag (Z)
5. sign flag (S)
6. overflow flag (O)
Status flags are updated after every arithmetic and logic operation.
3 Control flags:
1. trap flag (TF)
2. interrupt flag (IF)
3. direction flag (DF)
These flags can be set or reset using control instructions like CLC, STC, CLD, STD, CLI,
STI, etc.
The Control flags are used to control certain operations.
What is a Flag register? Write down the function of the flag used in 8086 microprocessors.
Flag Registers
Intel 8086 has 16 flag registers among which 9 are active. The purposes of
the FLAG registers are to indicate the various statuses of the processor. It is
done by setting the individual bits called flags. There are two kinds of
1. Condition FLAG
2. Control FLAG.
Conditional Flag
Condition FLAG reflects the result of an operation executed by the
processor. The control FLAG enables or disables certain operations of the
There are 6 condition flag registers and 3 control flag registers that shown
Overflow Flag
Overflow Flag is set to 1 when there is a signed overflow. For example, when you
add bytes 100 + 50 (result is not in range -128…127).
Sign Flag
Sign Flag is set to 1 when result is negative. When result is positive it is set to 0.
This flag takes the value of the most significant bit.
Zero Flag (ZF) is set to 1 when result is zero. For non-zero result this flag is set to
Auxiliary Flag is set to 1 when there is an unsigned overflow for low nibble (4
Parity Flag is set to 1 when there is even number of one bit in result, and to 0 when
there is odd number of one bit.
Carry Flag is set to 1 when there is an unsigned overflow. For example, when you
add bytes 255 + 1 (result is not in range 0…255). When there is no overflow, this
flag is set to 0.
Direction Flag is used by some instructions to process data chains, when this flag is
set to 0 – the processing is done forward, when this flag is set to 1the processing is
done backward.
When Interrupt Enable Flag is set to 1 CPU reacts to interrupts from external
Trap Flag is used for on-chip debugging.
Zero Flag
Auxiliary Flag
Parity Flag
Control Flag
Carry Flag
Direction Flag
Interrupt Enable Flag
Trap Flag
Detail about General purpose registers, special purpose registers, segment registers:
Accumulator register
Base register
Counter register
Data register
When the microprocessor performs any arithmetic or logical operations, the
accumulator provides one of the operands and it also holds the result of the
operation. The user can access this register. It is denoted by A. The
accumulator register AX can collect a total of 16-bit data i.e., 8-bit of data in
register AL (lower byte of AX) and 8-bit of data in register AH (higher byte of
For reading data from memory or writing data into memory, 8086
microprocessors have to select one memory location, 16-bit effective address
of this memory location can be stored in register BX.
In rotate and shift instructions, register CL is used as an 8-bit counter i.e., it is
used to store 8-bit count. In some instructions like REP (repeat), Loop, register
CX is used as a 16-bit implicit counter.
In multiplication and division instruction, if data or result is of 32-bits, then
register DX is used to store 16 MSB, and register AX is used to store 16 LSB
i.e., register DX is concatenated with register AX to store 32-bit data or result.
In 8086, the input port address is 16-bit and it is stored in register DX. The
name of register DX is given along with IN and OUT instructions as shown in
the below example.
Special purpose register
Stack pointer
Base pointer
Instruction Pointer
Source Index and
Destination Index
Segment register
Code segment
Stack segment
Data segment
Extra segment
It is used to hold the address of the stack top. The stack top is the uppermost
filled memory location in stack memory. There is no access to this register
directly, the modifications are done depending on the contents of the stack.
The use of BP as a pointer to a memory location is similar to the use of SI and
DI registers. BP register acts as a memory pointer to the stack segment
register. The BP register is mainly used to access any location directly in the
The IP gives the offset address of the next instruction to be executed i.e., IP
stores the address of the next instruction to be fetched from the code
segment. When reset is activated, the instruction pointer is set to the address
of the first instruction to be fetched.
SI and DI act as memory pointers relative to segment register DS. The
microprocessor will take the effective address of the data from SI and store it
in DI.
The code segment is a section of memory that holds the code (programs and
procedures) used by the microprocessor. The code segment register defines
the starting address of the section of the memory holding code. In real
mode operation, it defines the start of a 64K-byte section of memory; in
protected mode, it selects a descriptor that describes the starting address and
length of a section of memory holding code.
The stack segment defines the area of memory used for the stack. The
stack entry point is determined by the stack segment and stack pointer
registers. The BP register also addresses data within the stack segment.
The data segment is a section of memory that contains most data used by a
program. Data are accessed in the data segment by an offset address or
the contents of other registers that hold the offset address. As with the
code segment and other segments, the length is limited to 64K bytes in the
8086-80286, and 4G bytes in the 80386 and above.
The extra segment is an additional data segment that is used by some of
the string instructions to hold destination data.
Features of 8086 Microprocessor:
The features of 8086 Microprocessor are :
1.The 8086 is a 16-bit microprocessor. The term “16-bit” means that its arithmetic logic unit,
internal registers and most of its instructions are designed to work with 16-bit binary words.
2.The 8086 has a 16-bit data bus, so it can read data from or write data to memory and ports
either 16 bits or 8 bits at a time. The 8088, however, has an 8-bit data bus, soil can only read
data from or write data to memory and ports 8 bits at a time.
3.The 8086 has a 20-bit address bus, so it can directly access 220 or 10,48,576 (1Mb) memory
locations. Each of the 10, 48, 576 memory locations is byte Therefore, a sixteen-bit words
are stored in two consecutive memory locations. The 8088 also has a 20-bit address bus, so
it can also address 220 or 10, 48, 576 memory locations.
4.The Features of 8086 Microprocessor can generate 16-bit I/O address, hence it can access
216 = 65536 I/O ports.
5.The 8086 provides fourteen 16-bit registers.
6.The 8086 has multiplexed address and data bus which reduces the number of pins needed,
but does slow down the transfer of data (drawback).
7.The 8086 requires one phase clock with a 33% duty cycle to provide optimized internal
Range of clock rates (refer Fig. 6.1) are :5 MHz for 8086
8 MHz for 8086-2
10 MHz for 8086-1
8.The Features of 8086 Microprocessor is possible to perform bit, byte, word and block
operations in 8086. It performs the arithmetic and logical operations on bit, byte, word and
decimal numbers including multiply and divide.
9.The Intel 8086 is designed to operate in two modes, namely the minimum mode and the
maximum mode. When only one 8086 CPU is to be used in a microcomputer system, the
8086 is .used in the minimum mode of operation. In this mode the CPU issues the control
signals required by memory and I/O In multiprocessor (more than one processor in the
system) system 8086 operates in maximum mode. In maximum mode, control signals are
generated with the help of external bus controller (8288).
10.The Intel 8086 supports multiprogramming. In multiprogramming, the code for two or
more processes is in memory at the same time and is executed in a time-multiplexed fashion.
11.An interesting feature of the 8086 is that it fetches up to six instruction bytes (4
instruction bytes for 8088) from memory and queue stores them in order to speed up
instruction execution.
12.The Features of 8086 Microprocessor provides powerful instruction set with the following
addressing modes : Register, immediate, direct, indirect through an index or base, indirect
through the sum of a base and an index register, relative and implied.