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module 1 phy585

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Module 1:
Formation of n+
Source and Drain
Module 1: Formation of n+ Source and Drain
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101 Spin Coating of Photoresist (PR)
102 Soft Bake
103 Wafer Cooling Down
104 Mask 1 Alignment & UV Light Exposure
105 Post Exposure Bake
106 Wafer Cooling Down
107 Development
108 Ion Implantation of Phosphorus
109 Photoresist Strip
110 Annealing
101 Spin Coating of Photoresist (PR)
Place Si wafer on a spin coater. Spin the wafer with;
Speed: 2000 rpm
Time Taken: 15-30 seconds
PR
P-Si wafer
2-D Cross Section of Si
wafer with PR
PR
Top View of Si wafer with PR
102 Soft Bake
Place Si wafer on a hot plate with;
Temperature: 140 °C
Time Taken: 5 mins
PR
P-Si wafer
2-D Cross Section of Si
wafer with PR
PR
Top View of Si wafer with PR
103 Cool Down
Let Si wafer cool down at room
temperature (27 °C) for 5 mins.
PR
P-Si wafer
2-D Cross Section of Si
wafer with PR
PR
Top View of Si wafer with PR
104 Mask 1: Mask Alignment and UV exposure
By using mask aligner
and UV light tool,
Expose to UV light
for 90 seconds.
UV light
PR
P-Si wafer
Top view of mask
2-D Cross Section of Si
wafer with PR
Top View of Si wafer
105 Post Exposure Bake
Exposed PR
Exposed PR
Place Si wafer on a hot plate again,
then do post exposure bake with;
Temperature: 140 °C
Time Taken: 5 mins
PR
P-Si wafer
2-D Cross Section of Si
wafer with PR
Top View of Si wafer
106 Cool Down
Exposed PR
Exposed PR
Let Si wafer cool down at room
temperature (27 °C) for 5 mins.
PR
P-Si wafer
2-D Cross Section of Si
wafer with PR
Top View of Si wafer
107 Photoresist Development
In Wet Bench 1,
place wafer in a developer
solution for;
Time Taken: 30 secs – 1 mins
PR
P-Si wafer
2-D Cross Section of Si
wafer with PR
Top View of Si wafer with PR
108 Ion Implantation of Phosphorus
P-ion Implantation
n+
PR
PR
n+
P-Si wafer
2-D Cross Section of Si
wafer with PR
n+
n+
Top View of Si wafer
109 Photoresist Strip
n+
n+
P-Si wafer
2-D Cross Section of Si
wafer with PR
n+
n+
Top View of Si wafer
110 Annealing
n+
n+
P-Si wafer
2-D Cross Section of Si
wafer with PR
n+
n+
Top View of Si wafer
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