Uploaded by Chung-Wen Albert Tsao

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SPIM Quick Reference
MIPS Registers and Usage Convention
Register Name
zero
at
v0
v1
a0
a1
a2
a3
t0
t1
t2
t3
t4
t5
t6
t7
s0
s1
s2
s3
s4
s5
s6
s7
t8
t9
k0
k1
gp
sp
fp
ra
Number
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Usage
Constant 0
Reserved for assembler
Expression evaluation and results of a function
Expression evaluation and results of a function
Argument 1
Argument 2
Argument 3
Argument 4
Temporary (not preserved across call)
Temporary (not preserved across call)
Temporary (not preserved across call)
Temporary (not preserved across call)
Temporary (not preserved across call)
Temporary (not preserved across call)
Temporary (not preserved across call)
Temporary (not preserved across call)
Saved temporary (preserved across call)
Saved temporary (preserved across call)
Saved temporary (preserved across call)
Saved temporary (preserved across call)
Saved temporary (preserved across call)
Saved temporary (preserved across call)
Saved temporary (preserved across call)
Saved temporary (preserved across call)
Temporary (not preserved across call)
Temporary (not preserved across call)
Reserved for OS kernel
Reserved for OS kernel
Pointer to global area
Stack pointer
Frame pointer
Return address (used by function call)
System Services
Service
print_int
System Call Code
1
Arguments
$a0 = integer
Result
print_float
print_double
print_string
read_int
read_float
read_double
read_string
sbrk
exit
2
3
4
5
6
7
8
9
10
$f12 = float
$f12 = double
$a0 = string
integer (in $v0)
float (in $f0)
double (in $f0)
$a0 = buffer, $a1 = length
$a0 = amount
address (in $v0)
Assembler Directives
.align n
.ascii str
.asciiz str
.byte b1, ..., bn
.data
.double d1, ..., dn
.extern sym size
.float f1, ..., fn
.globl sym
.half h1, ..., hn
.kdata
.ktext
.space n
.text
.word w1, ..., wn
SPIM Instructions and Common Macros
Arithmetic and Logical Instructions
abs Rdest, Rsrc
add Rdest, Rsrc1, Src2
addi Rdest, Rsrc1, Imm
addu Rdest, Rsrc1, Src2
addiu Rdest, Rsrc1, Imm
and Rdest, Rsrc1, Src2
andi Rdest, Rsrc1, Imm
div Rsrc1, Rsrc2
divu Rsrc1, Rsrc2
div Rdest, Rsrc1, Src2
divu Rdest, Rsrc1, Src2
mul Rdest, Rsrc1, Src2
mulo Rdest, Rsrc1, Src2
mulou Rdest, Rsrc1, Src2
mult Rsrc1, Rsrc2
multu Rsrc1, Rsrc2
neg Rdest, Rsrc
Absolute Value
Addition (with overflow)
Addition Immediate (with overflow)
Addition (without overflow)
Addition Immediate (without overflow)
AND
AND Immediate
Divide (with overflow)
Divide (without overflow)
Divide (with overflow)
Divide (without overflow)
Multiply (without overflow)
Multiply (with overflow)
Unsigned Multiply (with overflow)
Multiply
Unsigned Multiply
Negate Value (with overflow)
negu Rdest, Rsrc
nor Rdest, Rsrc1, Src2
not Rdest, Rsrc
or Rdest, Rsrc1, Src2
ori Rdest, Rsrc1, Imm
rem Rdest, Rsrc1, Src2
remu Rdest, Rsrc1, Src2
rol Rdest, Rsrc1, Src2
ror Rdest, Rsrc1, Src2
sll Rdest, Rsrc1, Src2
sllv Rdest, Rsrc1, Rsrc2
sra Rdest, Rsrc1, Src2
srav Rdest, Rsrc1, Rsrc2
srl Rdest, Rsrc1, Src2
srlv Rdest, Rsrc1, Rsrc2
sub Rdest, Rsrc1, Src2
subu Rdest, Rsrc1, Src2
xor Rdest, Rsrc1, Src2
xori Rdest, Rsrc1, Imm
Negate Value (without overflow)
NOR
NOT
OR
OR Immediate
Remainder
Unsigned Remainder
Rotate Left
Rotate Right
Shift Left Logical
Shift Left Logical Variable
Shift Right Arithmetic
Shift Right Arithmetic Variable
Shift Right Logical
Shift Right Logical Variable
Subtract (with overflow)
Subtract (without overflow)
XOR
XOR Immediate
Constant-Manipulating Instructions
li Rdest, imm
lui Rdest, imm
Load Immediate
Load Upper Immediate
Comparison Instructions
seq Rdest, Rsrc1, Src2
sge Rdest, Rsrc1, Src2
sgeu Rdest, Rsrc1, Src2
sgt Rdest, Rsrc1, Src2
sgtu Rdest, Rsrc1, Src2
sle Rdest, Rsrc1, Src2
sleu Rdest, Rsrc1, Src2
slt Rdest, Rsrc1, Src2
slti Rdest, Rsrc1, Imm
sltu Rdest, Rsrc1, Src2
sltiu Rdest, Rsrc1, Imm
sne Rdest, Rsrc1, Src2
Set Equal
Set Greater Than Equal
Set Greater Than Equal Unsigned
Set Greater Than
Set Greater Than Unsigned
Set Less Than Equal
Set Less Than Equal Unsigned
Set Less Than
Set Less Than Immediate
Set Less Than Unsigned
Set Less Than Unsigned Immediate
Set Not Equal
Branch and Jump Instructions
b label
bczt label
bczf label
beq Rsrc1, Src2, label
beqz Rsrc, label
bge Rsrc1, Src2, label
bgeu Rsrc1, Src2, label
bgez Rsrc, label
bgezal Rsrc, label
bgt Rsrc1, Src2, label
Branch instruction
Branch Coprocessor z True
Branch Coprocessor z False
Branch on Equal
Branch on Equal Zero
Branch on Greater Than Equal
Branch on GTE Unsigned
Branch on Greater Than Equal Zero
Branch on Greater Than Equal Zero And Link
Branch on Greater Than
bgtu Rsrc1, Src2, label
bgtz Rsrc, label
ble Rsrc1, Src2, label
bleu Rsrc1, Src2, label
blez Rsrc, label
bgezal Rsrc, label
bltzal Rsrc, label
blt Rsrc1, Src2, label
bltu Rsrc1, Src2, label
bltz Rsrc, label
bne Rsrc1, Src2, label
bnez Rsrc, label
j label
jal label
jalr Rsrc
jr Rsrc
Branch on Greater Than Unsigned
Branch on Greater Than Zero
Branch on Less Than Equal
Branch on LTE Unsigned
Branch on Less Than Equal Zero
Branch on Greater Than Equal Zero And Link
Branch on Less Than And Link
Branch on Less Than
Branch on Less Than Unsigned
Branch on Less Than Zero
Branch on Not Equal
Branch on Not Equal Zero
Jump
Jump and Link
Jump and Link Register
Jump Register
Load Instructions
la Rdest, address
lb Rdest, address
lbu Rdest, address
ld Rdest, address
lh Rdest, address
lhu Rdest, address
lw Rdest, address
lwcz Rdest, address
lwl Rdest, address
lwr Rdest, address
ulh Rdest, address
ulhu Rdest, address
ulw Rdest, address
Load Address
Load Byte
Load Unsigned Byte
Load Double-Word
Load Halfword
Load Unsigned Halfword
Load Word
Load Word Coprocessor z
Load Word Left
Load Word Right
Unaligned Load Halfword
Unaligned Load Halfword Unsigned
Unaligned Load Word
Store Instructions
sb Rsrc, address
sd Rsrc, address
sh Rsrc, address
sw Rsrc, address
swcz Rsrc, address
swl Rsrc, address
swr Rsrc, address
ush Rsrc, address
usw Rsrc, address
Store Byte
Store Double-Word
Store Halfword
Store Word
Store Word Coprocessor z
Store Word Left
Store Word Right
Unaligned Store Halfword
Unaligned Store Word
Data Movement Instructions
move
mfhi
mflo
mthi
mtlo
Rdest, Rsrc
Rdest
Rdest
Rdest
Rdest
Move
Move From hi
Move From lo
Move To hi
Move To lo
mfcz Rdest, CPsrc
mfc1.d Rdest, FRsrc1
mtcz Rsrc, CPdest
Move From Coprocessor z
Move Double From Coprocessor 1
Move To Coprocessor z
Floating Point Instructions
abs.d FRdest, FRsrc
abs.s FRdest, FRsrc
add.d FRdest, FRsrc1,
add.s FRdest, FRsrc1,
c.eq.d FRsrc1, FRsrc2
c.eq.s FRsrc1, FRsrc2
c.le.d FRsrc1, FRsrc2
c.le.s FRsrc1, FRsrc2
c.lt.d FRsrc1, FRsrc2
c.lt.s FRsrc1, FRsrc2
cvt.d.s FRdest, FRsrc
cvt.d.w FRdest, FRsrc
cvt.s.d FRdest, FRsrc
cvt.s.w FRdest, FRsrc
cvt.w.d FRdest, FRsrc
cvt.w.s FRdest, FRsrc
div.d FRdest, FRsrc1,
div.s FRdest, FRsrc1,
l.d FRdest, address
l.s FRdest, address
mov.d FRdest, FRsrc
mov.s FRdest, FRsrc
mul.d FRdest, FRsrc1,
mul.s FRdest, FRsrc1,
neg.d FRdest, FRsrc
neg.s FRdest, FRsrc
s.d FRdest, address
s.s FRdest, address
sub.d FRdest, FRsrc1,
sub.s FRdest, FRsrc1,
FRsrc2
FRsrc2
FRsrc2
FRsrc2
FRsrc2
FRsrc2
FRsrc2
FRsrc2
Floating Point Absolute Value Double
Floating Point Absolute Value Single
Floating Point Addition Double
Floating Point Addition Single
Compare Equal Double
Compare Equal Single
Compare Less Than Equal Double
Compare Less Than Equal Single
Compare Less Than Double
Compare Less Than Single
Convert Single to Double
Convert Integer to Double
Convert Double to Single
Convert Integer to Single
Convert Double to Integer
Convert Single to Integer
Floating Point Divide Double
Floating Point Divide Single
Load Floating Point Double
Load Floating Point Single
Move Floating Point Double
Move Floating Point Single
Floating Point Multiply Double
Floating Point Multiply Single
Negate Double
Negate Single
Store Floating Point Double
Store Floating Point Single
Floating Point Subtract Double
Floating Point Subtract Single
Exception and Trap Instructions
rfe
syscall
break n
nop
Return From Exception
System Call
Break
No operation
Taken from https://www.cs.tcd.ie/John.Waldron/itral/spim_ref.html created by reformatting
portions of the LaTeX source file of the public domain documentation distributed with the SPIM
simulator.
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