WHITE PAPER Wynces Silvoza Package Development Sr. Manager Cypress Semiconductor Corp. Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes Introduction Abstract This white paper discusses soldering techniques for gull wing packages with nickel-palladium-gold (NiPdAu) finishes to achieve optimal solder joint wetting on the leads and the PCB pad. A design of experiment using a TSOP 28 Cypress package with a NiPdAu finish was mounted on a customer PCB board to assess the influences of several variables during surface mount. The Pb-free solder paste used was tin-silvercopper (SnAgCu). Key variables were pad stencil aperture, placement force and reflow profile while solder joint quality and lead push were the output responses. Cypress IC packages are offered in different lead finishes to suit customer requirements and applications. One of the popular lead finishes offered by Cypress today is nickel-palladium-gold (NiPdAu). This finish has been accepted by the electronics industry since Texas Instruments introduced it to the market in 2001 to meet the ever-growing demand for lead-free components and boards. NiPdAu is an offspring of nickel-palladium, another type of surface finish. With this finish, however, studies have shown that the top palladium surface oxidizes easily and presents wettability issues during soldering. Adding a gold flash top layer helps the palladium to survive further oxidation, promoting optimal wetting. Today, the semiconductor industry has shipped millions of NiPdAu lead finish packages. The demand for it is increasing exponentially because of its environmental friendliness. Lead with its high toxicity has been reduced dramatically through legislation such as the European Council Directive on Waste of Electrical and Electronic Equipment (WEEE), which proposes restrictions on the use of Pb, among other materials, in electronic products. Like any other finish, NiPdAu brings challenges in soldering. This paper addresses those challenges in an attempt to help make soldering easy. Data results from the completed experiment showed the key SMT factors that optimize wetting for NiPdAu lead finishes, which this paper discusses and recommends. Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 2 Cypress Semiconductor Corp. Nickel-Palladium-Gold Flat Lead Gull Wing Package 101 The Cypress Pd-based lead finish structure is the NiPdAu finish. It typically possesses a plating thickness where nickel (Ni) ranges from 20–80 microinches, palladium (Pd) is at 0.8 microinches minimum, and a gold (Au) flash ranges from 0.12–0.6 microinches, as shown in Figure 1. Au: 0.12–0.6 µin Pd: 0.8 µin min Ni: 20–80 µin Flash Cu: Base Metal of Lead Plated Plated Figure 1. NiPDAu Finish Table 1 shows the Cypress packages with a NiPdAu lead finish that have passed qualification testing per JEDEC reliability standards. Table 2 through Table 7 summarize the package reliability tests. Cypress QTP Number Qual Description Qual Level MSL + Reflow 015108 SOIC 20/24L Ni/Pd/Au Finish MSL1, 235 °C 010612 SOIC 20/24L Ni/Pd/Au Finish MSL1, 220 °C 013805 SSOP 48/56L Ni/Pd/Au Finish MSL1, 235 °C 013802 TSSOP 16/20L Ni/Pd/Au Finish MSL1, 235 °C 015107 TSSOP 16/20L Ni/Pd/Au Finish MSL1, 260 °C Table 1. Summary of Package Qualifications Test Vehicle Before MSL1 Pre-con After MSL1 Pre-con Result Die Top Lead finger Paddle Bottom External Visual Die Top Lead finger Paddle Bottom External Visual TV1 0/15 0/15 0/15 0/15 0/15 0/15 0/15 0/15 Passed TV2 0/15 0/15 0/15 0/15 0/15 0/15 0/15 0/15 Passed TV3 0/15 0/15 0/15 0/15 0/15 0/15 0/15 0/15 Passed Table 2. Acoustic Monitor Stress (C-SAM) Test Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 3 Cypress Semiconductor Corp. Test Vehicle Electrical Test Results Remarks TV1 0/150 Passed TV2 0/50 Passed TV3 0/50 Passed Table 3. Moisture Preconditioning (MSL1) Test Test Vehicle Electrical Test Results Remarks TV1 0/50 Passed Table 4. Pressure Cooker Test (PCT) Test Vehicle Electrical Test Results (After 300 Cycles) Remarks TV1 0/50 Passed TV2 0/50 Passed TV3 0/50 Passed Table 5. Temperature Cycle Test (TC) Test Vehicle Electrical Test Results Remarks TV1 0/50 Passed Table 6. Highly Accelerated Stress Test (HAST) Steam Age Duration Steam Age Temperature Lead Visual Inspection (Reject/Sample Size) 0 hr 93 oC 0/2 1 hr 4 hrs 8 hrs o 0/2 o 0/2 o 0/6 93 C 93 C 93 C Table 7. Solderability Data (Ceramic Plate Test) with Steam Age Facing the Challenges Several defects are formed during soldering, with the most undesirable being non-wetting. This type of defect can spring from various causes ranging from materials and environment to handling, equipment, and tools alike. This paper tackles the wettability issues related to typical gull wing lead packages widely seen on most electronic boards for various applications. Non-wetting is a phenomenon where adjoining metal surfaces fail to fuse or adhere to each other to form a metallic bond. Such failures can cause direct opens to complex field failures due to reliability issues. IPC standards are very clear in defining what is acceptable and rejected, but customers still follow their own preferences based on the application of the package, be it commercial or automotive. The following are some non-wetting anomalies that most board mount sites encounter, as shown in Figure 2. Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 4 Cypress Semiconductor Corp. Figure 2. Common Non-Wetting Anomalies Lead toe non-wetting: Insufficient to zero solder fillet formation on the toe of the lead Lead bottom non-wetting: Insufficient to zero bottom fillet on the bottom surface of the lead Lead sidewall non-wetting: Zero solder fillet on the side wall of the lead Low heel non-wetting: Insufficient to zero solder heel fillet on the lead Solder paste and flux pooling on bottom of package These defects are common during the soldering of flat lead gull wing packages, and the root cause may lie in the component and board mount level. This paper presents soldering solutions for these defects—from simple reflow profiles to complex paste printing and PCB pad geometry. Regarding the previously mentioned solderability issues, IPC specifically classifies lead bottom and heel non-wetting as valid rejects, which are critical for a strong solder joint. Sidewall wetting and toe wetting are not classified as valid rejects, as they do not put much weight on solder joint strength. Following are the IPC standards for solder wetting on gull wing packages, applicable to high-volume PCB manufacturing. Class 1 – General Electronic Products Class 2 – Dedicated Service Electronics Products Class 3 – High-Performance Electronics Products Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 5 Cypress Semiconductor Corp. Figure 3. Solder Joint Anomalies Surface Mount Technology Solutions Lead Sidewall Non-Wetting Reflow Process The convectional reflow furnace is perhaps the simplest off-the-shelf solution to most solderability issues, particularly lead sidewall wetting on a NiPdAu lead finish. In a lead-free solder paste application, typically the reflow plays a major role in properly activating the solder paste to protect the leads from further oxidation during the time at reflow and achieve a good wetting. In contrast to a pure matte Sn-based finish, a NiPdAu finish does not dissolve easily into the lead-free solder paste, so sidewall wetting is very difficult to achieve. The slow ramp reflow profile is a standard lead-free reflow profile that is generally used for board mount. This type of generic profile can easily make a pure Sn-based lead finish wet properly to a lead-free solder paste. However, for a NiPdAu finish, this may not be the case, as the nickel plating does not dissolve Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 6 Cypress Semiconductor Corp. into the lead-free solder paste. In this case, a much hotter profile with fast ramp characteristics is highly recommended. This fast ramp profile allows the lead-free solder paste basically to wick upwards and wet the sidewall of the NiPdAu lead finish. See “Evaluation of NiPdAu Lead Finish Flat Lead Package TSOP28.” Slow Ramp Reflow Profile (Generic Lead-Free Reflow Profile) This profile is characterized by a slow ramp with an extended dwell at a reflow temperature above 200 °C. When applied on most lead-free solder paste, this profile causes solder graping, so the flux gets easily exhausted and the solder spheres oxidize and fail to wet properly. Figure 4. Slow Ramp Reflow Profile Fast Ramp Reflow Profile (Generic Lead-Free Reflow Profile) This profile is slightly hotter than the slow ramp profile. Flux is not exhausted easily, as there is a fast ramp immediately before 200 °C. There is still a good soak, but at a much lower temperature not extending to 200 °C. When applied on most lead-free solder paste, this profile eliminates solder graping, so the flux is not exhausted easily and protects the solder spheres from oxidation, enabling them to wet properly. Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 7 Cypress Semiconductor Corp. Figure 5. Fast Ramp Reflow Profile Lead Side Wall Wetting Comparison for Slow Ramp and Fast Ramp Reflow Profile Solder paste wicked upwards more for fast ramp profile Good sidewall wetting observed on fast ramp profile Insufficient sidewall wetting on slow ramp profile Insufficient Sidewall Wetting Sufficient Sidewall Wetting Figure 6. Lead Side Wall Wetting Solder Paste Application Process Solder paste application is critical in achieving a reliable solder joint. Today, automated optical inspection systems are put in place to tightly monitor the amount of solder paste deposited on the PCB pad post-paste printing, even before a component is mounted on the solder paste. Too little solder paste can trigger an insufficient solder joint and weak joint strength, while too much can yield solder joint shorts. Therefore, it is important to achieve the optimum amount of solder paste deposit applicable to the lead finish of the package. As mentioned previously, a pure Sn-based lead-free finish easily dissolves into the lead-free SAC solder paste, so a slightly reduced solder paste volume would not starve the solder joint as the pure Sn plating homogenously joins with the lead-free solder paste. With the NiPdAu lead finish, the nickel does not dissolve to the lead-free solder paste at Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 8 Cypress Semiconductor Corp. reflow temperature, so a lesser solder paste volume would significantly reduce the solder joint formation. Thus, the amount of solder paste volume required for this type of lead finish needs to be optimized by defining the correlation between the stencil aperture, thickness, pad geometry, and lead dimension of the package. All these aspects need to support one another to achieve the ideal solder joint. With the advent of the fine-pitch leaded package, the spacing between leads has become very small, and in effect, the PCB pad geometry has also been reduced. This presents more challenges for the NiPdAu finish, as the width of the PCB pad is either less than or equal to the lead width to meet fine-pitch requirements. In this scenario, the solder paste printed on the narrower PCB pad remains beneath the bottom of the lead, making it more difficult to wick upwards to form a sidewall wetting. Unlike the pure Sn-based finish, the pure Sn plating easily melts and dissolves together with the lead-free solder paste at the bottom of the lead, resulting in proper wicking to form a sidewall wetting. There are two ways to achieve a good sidewall wetting for the NiPdAu finish leads, and both are related to fanning out solder paste on the sides of the leads. One way is by doing an overprint without creating shorts to allow the solder paste to wet the side of the wall. Another way is to design a slightly larger PCB pad with respect to the lead width dimension, but this option is more costly than the stencil change. Overprinting Technique Increasing the stencil aperture and widening it allows a wider paste deposit area. A wider solder paste deposit area means paste can easily extend to the sidewall. This PCB pad design makes solder paste wicking easy to form sidewall wetting. Figure 7. Effects of Overprinting Wider Pad Geometry Wider pad design means wider solder paste deposit. Wider solder paste deposit means paste can easily extend to the sidewall. This PCB pad design makes solder paste wicking easy to form sidewall wetting. Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 9 Cypress Semiconductor Corp. Figure 8. Effects of Wider Pad Geometry Pick and Place Process Pick and place plays a major role in achieving a good solder joint fillet, especially sidewall wetting. The amount of force applied to the solder paste dictates the amount squeezed out and the distance the paste will travel. Typically, the higher the pressure, the further the squeeze-out goes. For NiPdAu, where the nickel does not dissolve into the SAC solder paste, the position of the solder paste deposit is very important. If the squeeze-out does not reach the edge of the lead width, then the solder paste will have a hard time wicking upwards to form a sidewall wetting and fillet. Ideally, it is recommended that the solder paste have a squeeze-out breaching the lead width, but not to the extent that it shorts to adjacent leads or minimal solder paste is left at the bottom of the lead. This approach to resolving sidewall wetting is a good containment when the option to change the stencil or PCB pad is not available. Board mount manufacturers should define the optimum placement force to achieve good solder paste squeeze-out and in effect good sidewall wetting. Figure 9. Effects of Placement Force Accurate placement of the component on the PCB plays a significant role in achieving sidewall wetting. If the lead is offset on one side of the PCB pad, the opposite side of the lead achieves a better sidewall wetting, as there is an incidental overprint on one side, with little paste squeeze-out on the affected side. So, in principle, the more centered the lead is to the PCB pad, the higher the probability of a uniform sidewall wetting between the left and right side of the lead. Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 10 Cypress Semiconductor Corp. Figure 10. Effects of Placement Accuracy PCB Pad Type Two major types of PCB pad types are available for board mounts depending on the application: non-solder mask defined (NSMD) and solder mask defined (SMD). NSMD presents challenges for NiPdAu, as the solder paste is restricted by the canal of the NSMD from wicking to the side of the lead, as illustrated in Figure 11. In this case, the need to overprint becomes mandatory using techniques from stencil change to pick and place, as discussed previously. On the other hand, SMD, with the absence of the canal that separates the land from the solder mask, simply allows free movement of the solder paste during squeeze-out or overprinting, making it easier for the solder paste to wick upwards to the sidewall of the lead. Figure 11. Effects of PCB Pad Type Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 11 Cypress Semiconductor Corp. Lead Toe Non-Wetting Trim and Form Process The lead frame package undergoes a trim and form process to cut and form the leads. Due to the mechanical nature of this process, some degree of exposed copper is allowed, especially on the lead toe where a direct cross section of the lead is performed, completely exposing the base copper metal of the lead. Having copper exposed makes the lead tone susceptible to copper oxidation, which results in poor solderability due to non-wetting. Similarly, some portions of the NiPdAu plating are smeared on the lower portion of the toe, allowing solder to wet depending on the smearing coverage. For pure Sn lead finishes, similar phenomena occur, but the pure Sn plating dissolves into the SAC solder paste and manages to cover the entire lead toe as shown in Figure 13. Figure 12. Lead Toe Non-Wetting Figure 13. Lead Toe Non-Wetting Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 12 Cypress Semiconductor Corp. Evaluation of NiPdAu Lead Finish Flat Lead Package TSOP 28 Previously in this paper, various aspects of the board mount process were discussed in relation to their effects on lead sidewall wetting and lead toe wetting. This section summarizes an evaluation performed to support the aforementioned solutions. This evaluation uses a TSOP 28 Flat Lead Package with NiPdAu finish and was done on an actual board mount facility to accurately simulate the surface mount conditions. Following are the details of the evaluation. Key Factors Identified Affecting Wetting and Solderability Stencil aperture opening Reflow profile Pick and place force Design of Stencil The test stencil was designed to accommodate five different stencil aperture openings for an individual panel on the PCB so that constant print parameters applied for various stencil designs to easily identify which aperture would bring the best results. Figure 14. Customer PCB Stencil aperture openings were designed based on a package lead to PCB pad to stencil aperture opening dimension analysis and factored in effects of a narrow aperture width and a shorter aperture length. PCB Pad Dimensions PCB pad size: 75 mil x 12 mil Pad pitch: 21.5 mils Package Lead Dimensions Lead width maximum: 10.6 mils Lead end distance: 535 mils Pad end distance: 583 mils Package size: 468 mils Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 13 Cypress Semiconductor Corp. Lead to PCB Pad to Stencil Superimposition Figure 15. Lead to Pad to PCB Superimposition New Stencil Aperture Dimensions Per Panel Versus Old Stencil Aperture for 10.6-Mil Lead Width Original stencil aperture size: 73 mil x 10 mil (existing stencil) Test stencil aperture size1 (S1): 60.0 mil x 15 mil Test stencil aperture size2 (S2): 57.5 mil x 15 mil Test stencil aperture size3 (S3): 56.0 mil x 14 mil Test stencil aperture size4 (S4): 54.0 mil x 13 mil Test stencil aperture size5 (S5): 53.0 mil x 12 mil Design of Reflow Profile Two types of reflow profile were used in this experiment, the current slow ramp profile and the fast ramp profile, as shown in Figure 16. Slow Ramp Profile Figure 16. Slow and Fast Ramp Profiles Reflow profile temperature settings per zones set at low, medium, and high: Low: Typical reflow profile used at board mount Medium: Faster ramp with higher peak temperature settings of 255 °C High: Fastest ramp with higher peak temperature settings of 255 °C Actual settings for various reflow zones for DOE: Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 14 Cypress Semiconductor Corp. Design of Pick and Place Force When modified, placement force can dictate how much squeeze-out of solder paste will happen during package placement. This paste squeeze-out will mechanically force sidewall creeping of the paste. Consequently, during reflow, the paste coverage on the sidewall of the lead will more easily wet and cover the sidewall during reflow. The following settings were selected based on process capabilities, as shown in Figure 17. Low: 150 grams, standard SMT setting Medium: 300 grams to double the effect High: 500 grams to test the maximum load Figure 17. Placement Force Settings Evaluation Matrix Table 8 is the summarized evaluation matrix to check the interaction of the three key factors mentioned. Table 8. Evaluation Matrix Figure 18 shows the stencil aperture orientation per panel in the PCB. Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 15 Cypress Semiconductor Corp. Figure 18. Stencil Aperture Orientation per Panel Experiment Output Responses Visual Mechanical Inspection and Cross Section (SEM) Lead toe non-wetting: Insufficient to zero solder fillet formation on the toe of the lead Lead bottom non-wetting: Insufficient to zero bottom fillet on the bottom surface of the lead Lead sidewall non-wetting: Zero solder fillet on the sidewall of the lead Low heel non-wetting: Insufficient to zero solder heel fillet on the lead Solder paste and flux pooling on bottom of package Figure 19. Solder Joint Anomalies Lead Push Test (on Best Leg) The lead push test is a mechanical test in which the package is separated from the board mechanically through a force gauge jig while the PCB is mounted on a bench vise by a custom jig. The methodology is primarily manual and may incur noise depending on the speed of shear, which is done manually. In this evaluation, the shear values were noted with the break modes as the key indicating factor for wetting. Figure 20 shows how the lead push test works. Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 16 Cypress Semiconductor Corp. Figure 20. Lead Push Test The lead push test is performed to document the shear mode for qualitative analysis. No shear values are used to gauge the results of the push test. Key break modes are as follows: Pad rips off from PCB: Suggests very good wetting Lead rips off from bulk solder: Suggests good wetting with good trace of solder on lead Lead rips off clean from solder: Suggests poor wetting without any trace of wetting Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 17 Cypress Semiconductor Corp. Data and Results Summary Visual Mechanical Inspection (Optical) Leg 1 remains the most inferior of the settings. Leg 3 and Leg 4 improved when the stencil aperture was widened and reduced in length. Leg 4 showed consistent satisfactory wetting when reflow was set at median. Leg 5 showed the most consistent very good wetting. Leg 6 to 7 had close results with leg 5 when the pick and place parameter was increased. Figure 21. Soldering DOE Results Visual Mechanical Inspection (Cross Section and SEM of Best Leg) Good toe fillet height Good lead sidewall wetting (offset placement becomes critical when aperture width decreases) Good heel fillet Good bottom solder fillet Zero flux pooling Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 18 Cypress Semiconductor Corp. 15-mil Aperture Width 15-mil Aperture Width 14-mil Aperture Width 13-mil Aperture Width 12-mil Aperture Width Toe, Bottom and Heel Fillet Sidewall/ Bottom Fillet Lead Push Test Figure 22. Cross Section and SEM Results Lead push strength increased significantly (although should be used for trend only). Significant improvement in break mode when fast ramp reflow and increased stencil aperture width were used. Table 9. Lead Push Test Summary Summary of Results Visual mechanical inspection showed good wetting on all surfaces of the lead. Lead sidewall was achievable when stencil aperture was modified to force an overprint of paste on the sidewall, as it allowed solder paste wicking on the lead sidewall. Reflow profile improved wetting on all surfaces of the lead. There was zero flux pooling when the length of the aperture was shortened away from the bottom of the package. Lead push test yielded good consistent break mode where majority was PCB pad lift. Pick and place parameter showed slight improvement on wetting, but contribution was low. Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 19 Cypress Semiconductor Corp. Best Practice Recommendations for Soldering NiPdAu Based on the evaluation and root cause analysis, a slow ramp profile yields inferior wettability for NiPdAu finish. The most compelling parameter is the reflow profile and stencil aperture design, which yielded drastic improvements in lead sidewall wetting and toe wetting. This paper recommends the following settings to achieve maximum wettability for Cypress products with a NiPdAu finish. Reflow Process It is recommended to use a fast ramp profile to avoid flux exhaustion, which contributes to solder sphere oxidation. Board mount personnel must work with the solder paste supplier to learn the correct flux activation temperature and set the fast ramp somewhere at the end of that activation temperature. Too much exposure or soak time at a higher temperature than the flux activation would cause flux exhaustion. Following is a sample reflow profile setting for a solder paste whose flux activation plays on the 150–180 °C range. These values may be used only as a reference as reflow conditions may vary depending on equipment. Figure 23. Fast Ramp Reflow Profile Profile Z1 Z2 Z3 Z4 Z5 Z6 Z7 Min 120 160 170 170 170 255 255 80 cm/min Conveyor Speed Max 120 160 170 170 170 255 255 90 cm/min Proper profiling and maintenance of profilers needs to be observed at all times. For cases where N2 purge is available, use it as it drives out the unwanted oxygen within the convection reflow and reduces the risk of oxidation on the solder spheres of the solder paste and leads. For best results, a design of experiment using these parameters as a baseline is recommended. Stencil Aperture Solder paste reaching the sidewall of the lead is key in promoting sidewall wetting for a NiPdAu finish as seen in the experiment. It is highly recommended that the solder paste be overprinted and that it cover the width of the lead without sacrificing solder bridging. As a rule of thumb, a minimum 13 percent increase in stencil aperture width is required against the lead width dimension to create an overprint without solder bridging. Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 20 Cypress Semiconductor Corp. Figure 24. Stencil Aperture Design PCB Pad Geometry Like the stencil aperture pad, geometry plays a role in achieving good lead sidewall wetting. The key still is that the pad should be at a minimum 13 percent wider than the lead width, and the stencil will follow a minimum of 1:1 ratio with the pad width. The maximum value for increasing the pad width is dependent on the pitch of the leads to avoid solder bridging. It is recommended that a design of experiment with varying pad geometry be initiated to optimize the paste print settings with lead sidewall wetting as a response for the NiPdAu finish. Best Practice Common Practice Lead Width Lead Width Pad Width at minimum is 13% wider than lead Pad Width is 1:1 ratio at maximum setting Figure 25. PCB Pad Width Design The PCB pad length is also critical during the design stage. It should not exceed the inner perimeter of the molded package area, as solder paste may creep at the bottom of the package due to the pad extrusion. It is recommended that the PCB pad length be reduced in such a way that it limits the coverage of the solder paste from getting to the bottom of the plastic package. As a general rule of thumb, the inner edge of the pad should not exceed the perimeter of the package. Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 21 Cypress Semiconductor Corp. Figure 26. PCB Pad Length Design If the PCB pad length extends to the package perimeter, printed solder paste touches the bottom side of the package during placement. The capillary effect pulls the flux on the solder paste to pool on the bottom side of the package. This phenomenon starves the solder paste area on the lead, allowing the solder beads on the paste to oxidize during reflow. Oxidized beads cause cold solder joints, spot non-wetting, and solder beading, as shown on the optical photo and SEM photo. See Figure 27. Figure 27. Effects of Very Long Pad Length Extending to Bottom of Package PCB pad width and length are a critical geometric aspect of the pad design, but the type of pad is also important when trying to achieve good solder wetting and fillet on the lead sidewall and other lead surfaces. SMD design is recommended as a best practice, as it will not restrict the solder paste from squeezing out to wick to the lead sidewall, as shown in Figure 28. Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 22 Cypress Semiconductor Corp. Figure 28. Effects of SMD over NSMD on Solder Joint Pick and Place Parameter The placement parameter can be used as a quick workaround when a new stencil or pad design is not available. Combined with a fast ramp reflow profile, it can achieve maximum wetting, as seen in the evaluation. As a general rule of thumb, the maximum placement that would yield the most optimum paste squeeze-out is the objective when using this parameter. A design of experiment is highly recommended to achieve maximum squeeze-out and promote good lead sidewall wetting. Figure 29. Effects of Placement Force Conclusion A NiPdAu lead finish based on the process optimizations is easy to solder provided the best practices recommended are used as a baseline. With simple general guidelines and best practices, users can easily solder this type of finish consistently and at the same time enjoy the long-term advantages of a NiPdAu finish, which include zero whisker and environmental friendliness. In the various practices mentioned in this paper, the solder paste overprint on the lead sidewall significantly contributes to achieving good lead sidewall wetting, toe wetting, and heel wetting. This aspect combined with the second most important aspect, which is a fast ramp reflow, generally provides the best soldering results for NiPdAu. Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 23 Cypress Semiconductor Corp. This paper also notes that there are two approaches in achieving side overprint of paste. One is by modifying the stencil aperture width, making it larger than the lead width, and another is by modifying the PCB pad geometry. Both ways have their pros and cons in terms of lead time to application but will generally yield similar satisfying soldering results. This white paper serves as a guideline that surface mount personnel can use as a baseline when trying to optimize their SMT line and make it more robust when soldering NiPdAu finishes. Other aspects that involve package optimization and solder paste selection, such as halogenated type, are also options that are viable depending on the end-user application. In the end. it is the SMT engineer’s responsibility to diligently create a design of experiment to maximize the effects of the predefined guidelines of this paper and suit the SMT conditions. The user needs to evaluate and validate the information provided in this paper to achieve soldering success. References 1. PC/EIA J-STD-002A, Joint Industry Standard, “Solderability Tests for Component Leads, Terminations, Lugs, Terminals and Wires,” October 1998 2. IPC-A-610E, “Acceptability of Electronics Assemblies,” April 2010 3. “Qualification Report of Nickel/Palladium/Gold-Finish for Integrated Circuits,” Mike Burke, Bo Chang 4. “Factors that Influence Side Wetting Performance,” Donald C. Abbott, Bernhard Lange, Douglas W. Romm, and John Tellkamp Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014 24 Cypress Semiconductor Corp. Cypress Semiconductor 198 Champion Court San Jose, CA 95134-1709 Phone: 408-943-2600 Fax: 408-943-4730 http://www.cypress.com © Cypress Semiconductor Corporation, 2014. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. PSoC Designer™ and Programmable System-on-Chip™ are trademarks and PSoC® is a registered trademark of Cypress Semiconductor Corp. All other trademarks or registered trademarks referenced herein are property of the respective corporations. This Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Soldering Techniques for Gull Wing Packages Using Nickel-Palladium-Gold Finishes 001-94815 Rev. *A October 2014