Microchip Technology Inc.
WebSeminar: December 17, 2003
Smaller Packages =
Bigger Thermal
Challenges
© 2003 Microchip Technology Incorporated. All Rights Reserved.
Smaller Packages = Bigger Thermal Challenges
1
Hi, my name is Terry Cleveland
Smaller Packages =
Bigger Thermal Challenges
Page 1
Microchip Technology Inc.
WebSeminar: December 17, 2003
New Power Management
Applications
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Chipsets That Require Multiple Voltages
Load Shedding Applications
Output Voltage Sequencing Requirements
More Current Capability
Smaller Size Solutions
Lower Cost Solutions
© 2003 Microchip Technology Incorporated. All Rights Reserved.
Smaller Packages = Bigger Thermal Challenges
2
The first slide is called, “New Power Management Applications”. I want to take
a quick minute to discuss new applications that are creating some of the bigger
challenges.
The first one is titled, “Chipsets that Require Multiple Voltages”. This is
probably not a real new application, but we do see it repeatedly emerging over
time. These applications have a portion that is powered by more than one
voltage. For example, they may required 3.3V and 1.8V.
Another application that we see, that tends to be popular, is called load
shedding or load partitioning. Load shedding applications are when the circuitry
requires 3.3 volts (or more volts) and portions of the circuitry require the same
voltage. So you can turn some portions off while you leave some on.
The next is output voltage sequencing. This has been around a long time, and
it is very popular. It is where you want to sequence one voltage before another
voltage at all times, either when powering up or down. We do see some
increase current capability required for many applications. In addition to that I
should mention that they are at reduced output voltages. So voltages that use
to be 1.8V or 2.5V now require 1.5V or 1.2V. So the voltage is coming down as
the current is increasing. The driving factors are always smaller size and lower
cost solutions.
With the next slide, I want to talk about some of the higher performance power
management solutions that are available today, and newly available from
Microchip, as well.
Smaller Packages =
Bigger Thermal Challenges
Page 2
Microchip Technology Inc.
WebSeminar: December 17, 2003
Higher Performance Power
Management Solutions
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Higher Integration (Smaller Solutions)
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Multiple Outputs, Additional Features
Independent Output Control
Wide Selection of Output Voltage
Combinations
Small Package and Minimal External
Components
© 2003 Microchip Technology Incorporated. All Rights Reserved.
Smaller Packages = Bigger Thermal Challenges
3
These higher performance power management devices feature higher
integration, which enables the smaller solutions. They have multiple outputs
and additional features. All these features are integrated into the same part
which reduces size and cost. These devices have independent output control,
so we control each output of the power management system. They have a
wide selection of output voltage combinations, so they offer a wider range from
lower to higher voltages. These voltages are either set at the factory or
programmed through adjustable resistors. They are in small packages with
minimal external component count. So, we are decreasing package size,
increasing output current capability, lowering voltage output which tends to
output more power dissipation in a smaller spot.
The next slide introduces the TC1301 / TC1302 dual output LDO family recently
released by Microchip.
Smaller Packages =
Bigger Thermal Challenges
Page 3
Microchip Technology Inc.
WebSeminar: December 17, 2003
TC1301 / TC1302 Dual Output
LDO Family
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Multiple Output LDO Family of Products
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VOUT1 @ 300mA, VOUT2 @ 150mA
Both Outputs Stable with 1µF Ceramic
Capacitors
Dropout Voltage = 104mV @ 300mA
58µA Bias Current / Output
Independent Shutdown (Sequencing Outputs)
Voltage Detect and RESET Features
3X3 DFN8 or MSOP8 Package
© 2003 Microchip Technology Incorporated. All Rights Reserved.
Smaller Packages = Bigger Thermal Challenges
4
I just want to introduce that part family real quick and go through some power
dissipation and thermal management examples. First, there are actually two
output voltages; Vout1 and Vout2. Vout1 is capable of driving 300 mA; Vout2 is
capable of driving 150 mA. Both outputs are stable with a 1uF ceramic
capacitors. So by just putting a 1uF capacitor on the output, the regulator has
all the components that it needs for the total solution. The ceramic portion is
important. This allows you to use smaller, lower cost, higher performance, low
ESR capacitors. The dropout voltage is 104 mV at 300 mA enabling the output
voltage to be within regulation, where the input voltage is only 104mV above it
at full load. It is very popular for battery applications that only require 58 mA of
bias current for each channel or each output. Again, a battery-friendly
specification.
Each output has an independent shutdown, so you can sequence the output, so
you can load partition the outputs with this part. The TC1301 portion of family,
includes a voltage detect and reset features. This is all available in a 3x3 DFN8
or MSOP8 package. These are very small packages capable of a lot of current
capability down to load output voltages.
Smaller Packages =
Bigger Thermal Challenges
Page 4
Microchip Technology Inc.
WebSeminar: December 17, 2003
Total Solution Size (Smaller
Packages)
TC1301
1uF
2.2uF
1uF
1 3X3 DFN 8 Pin Package (0.118” X 0.118”)
2 0402 X5R 4V Ceramic Capacitors (0.040” X 0.020”)
1 0603 X5R 6.3V Ceramic Capacitor (0.063” X 0.032”)
All components fit in a 0.17” X 0.14” Area
© 2003 Microchip Technology Incorporated. All Rights Reserved.
Smaller Packages = Bigger Thermal Challenges
5
So, that is all the good news. I sized the total solution size quickly with just
the package dimensions and some of the available ceramic capacitor
technology today. We are looking at a DFN package of 3x3, which is 0.118”
square. It is very small. You probably could fit 3 of these total solutions in a
space less than a dime. We have two 0402 capacitors and one 0603
capacitor, which is an optional input capacitor for the solution. By using this
two-channel LDO, we have one 3x3 package and two 0402 capacitors. This
area generates 300 mA and 150 mA currents. That is the smaller size
portion of the presentation.
Next, we are going to talk about the more important topic today and that is
the bigger thermal challenges.
Smaller Packages =
Bigger Thermal Challenges
Page 5
Microchip Technology Inc.
WebSeminar: December 17, 2003
Bigger Thermal Challenges
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Increased Output Current Capability
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LDO Internal Power Dissipation
● PDISS(LDO) = (VIN - VOUT) * IOUT
● Lower Output Voltages
● Multiple Outputs
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Example
● VIN = 4.2V (Single Cell Li-Ion)
● VOUT1 = 2.8V @ 300mA
● VOUT2 = 1.8V@150mA
● PDISS = 780mW
© 2003 Microchip Technology Incorporated. All Rights Reserved.
Smaller Packages = Bigger Thermal Challenges
6
What we have done is increase the output current capability of a linear
regular. The internal dissipation for the regulator is equal to the voltage
differential between input and output times the output current. So, it is the
input voltage minus the output voltage times the current. Now, we have
gone ahead and lowered the output voltage capability to meet new demands,
so if you look at the equation, that is going to increase the power dissipation.
As you increase current and lower output voltage they both cause the
internal dissipation within the regulator to increase. In addition to that, we
have added another channel or another output, so you have two linear
regulators in the same package.
As you can see, we have taken the power of dissipation and probably more
than doubled the capability of the part electrically. As a quick example; if
you have a maximum input voltage of 4.2 V, which is typical for a single cell
Lithium-ion battery. You have a 2.8 V output at 300 mA and a 1.8 V output at
150 mA. You can see the total dissipation is 780 mW. That is a
considerable dissipation for an area that is only 0.14” by 0.17” square.
If you go to the next slide, we can calculate the temperature rise of the
junction for the 3x3.
Smaller Packages =
Bigger Thermal Challenges
Page 6
Microchip Technology Inc.
WebSeminar: December 17, 2003
Temperature Rise
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For 3X3DFN8 RθJA = 41°C/Watt
Junction Temperature Rise
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41°C/Watt x 780mW = 32°C
Assumptions…..
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Industry Standards (JEDEC 51-5 and JEDEC 51-7)
● 4 Layer FR4 PCB with Internal 1 oz. (Cu
Thickness) Plane
● 2 oz. Cu Outer Layers
● 2 Vias connecting the exposed pad to the internal
PCB planes on a 1.2mm pitch
© 2003 Microchip Technology Incorporated. All Rights Reserved.
Smaller Packages = Bigger Thermal Challenges
7
In the TC1301 data sheet, we specify a 41oC per watt, thermal resistance
from junction to ambient. So, if we had a 41oC per watt thermal resistance
and were dissipating 780 mW from the package, we will see a temperature
rise of 32oC on the junction of the part. For example, if you had a 50oC
maximum ambient application, and the junction temperature rose 32oC, the
junction temperature would be 82oC. This doesn’t sound like a real big
thermal problem, considering that all of Microchip’s LDOs are rated for
125oC continuous operation and it meets all specifications over that
temperature range. It doesn’t really sound like a concern, but there are
some assumptions made when you consider that 41oC per watt. If you look
at the industry standards, the JEDEC 51-5 and JEDEC 51-7 are used to
determine the thermal resistance, they specify many things in the board
layout. They specify a 4-layer FR4 printed circuit board with a l oz; the 1 oz
refers to the thickness of the copper internal planes. They also specify 2oz.
which is the thickness of the copper outer plane. This is not typical for
everybody’s application. This is more for a power supply application or a
high-current situation. They also specify 2 vias in the exposed pad of the
DFN package, connected to the plane. So, we have a package thermal
resistance value of 41oC per watt, based on these assumptions. In some
cases, in many of your applications you don’t always have a 4-layer board. If
it’s a little different application maybe you have two layers, maybe you have
6 layers, maybe you have ½ oz. Copper.
Smaller Packages =
Bigger Thermal Challenges
Page 7
Microchip Technology Inc.
WebSeminar: December 17, 2003
Temperature Rise
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For 2 Layer PCB 3X3DFN8 RθJA = 150 °C/Watt
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Junction Temperature Rise
● 150°C/Watt x 780mW = 117°C
Assumptions…..
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Carsem MLP Application Note
2 Layer Board with minimum trace width
Minimal Exposed Pad Copper
© 2003 Microchip Technology Incorporated. All Rights Reserved.
Smaller Packages = Bigger Thermal Challenges
8
So if you take it a step further, we look at a 2 layer PCB board, with probably
the minimum trace width and minimum copper. The DFN 3x3 appears to be
150 oC per watt, not the previous 41oC per watt that we talked about. Using
that 150 oC per watt thermal heat resistance from junction to air, we multiple
that times 780 mW and we see a junction temperature rise of 117oC.
So, if we are working in a 50oC ambient, that is a 167oC junction
temperature which exceeds the 125oC continuous and the 150oC max
operating junction temperature of the device. So, you see you have a
problem from this particular board design versus the previous board design.
Other assumptions for the 2- layer board, if you look at a Carsem, which is a
packaging house application note (MLP application note), they specify a 2layer board with a minimum trace width and a minimal exposed copper pad
for 150oC per watt. So, now we are asking ourselves: What do we use for
thermal resistance from junction to air for your application? And that is really
the method we wanted to introduce today.
Smaller Packages =
Bigger Thermal Challenges
Page 8
Microchip Technology Inc.
WebSeminar: December 17, 2003
Practical Method For
Measuring RθJA
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Practical Applications 41°C/Watt < RθJA < 150°C/Watt
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Example
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RθJA = 78 °C/Watt
TRISE(780mW) = 61°C
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How to Measure the Thermal Resistance for
Your Application
© 2003 Microchip Technology Incorporated. All Rights Reserved.
Smaller Packages = Bigger Thermal Challenges
9
Practically speaking, for most applications the thermal resistance is probably
going to be somewhere between 41oC per watt and 150oC per watt. In the
example shown, the top layer of a 2-layer board the thermal resistance was
measured to be about 78oC per watt so we can go back to our 780 mW
power dissipation example. We have a temperature rise of 61oC. For a 50oC
ambient, the junction temperature is 111oC, which is well within the 125oC
rating.
How can you measure thermal resistance for your application? That is what
we want to talk about next.
Smaller Packages =
Bigger Thermal Challenges
Page 9
Microchip Technology Inc.
WebSeminar: December 17, 2003
A Simple Approach to
Measuring RθJA
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Identify TSP
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Define Experiment
Measure
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Temperature Sensitive
Parameter
Power
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Vin
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Vout
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Iout
Ambient Temp.
Junction Temp.
Vin
LDO
Vout
Iout
GND
Power = (Vin - Vout) * Iout
Tjunction= Approximately 160 °C
θJA= (Tjunction- Tambient)/Pdissipated
Calculate RθJA
© 2003 Microchip Technology Incorporated. All Rights Reserved.
Smaller Packages = Bigger Thermal Challenges
10
A simple approach is to measure thermal resistance from junction to ambient. The first thing
you want to do to is to identify TSP or a temperature sensitive parameter. The temperature
sensitive parameter for our application within this LDO (within the Microchip LDO product
line or integrated switcher line as well) is a thermal shut down protection feature in all
devices. That thermal shutdown is approximately 160oC.
So, knowing that, we need to define an experiment to be able to measure and to calculate
thermal resistance. To define the experiment, the first thing we want to recall is the power
dissipation equation for the LDO. The power is equal to Vin minus Vout times output
current. If we also refer to the thermal resistance from junction to air equation shown in red,
that is equal to the junction temperature minus the ambient temperature divided by the
power dissipated within the device. So, if we look at that equation closely, we know the
junction temperature when the device reaches thermal shutdown. What does the device look
like in thermal shutdown? What will happen is when the junction temperature rises and
reaches the 160oC shutdown point, the device shuts down. The output voltage will go to
zero. So at that point there is no power being dissipated in the LDO, so it cools down to
about 150oC or 145oC. Then it will turn back on.
So, you see the output of the LDO is pulsing. That is how you know when you have a
thermal shutdown. So, in order to dissipate enough power you increase the input voltage for
increased power or increase the output current or both. You should do that and monitor the
output of the LDO with either an oscilloscope or meter. You see the output voltage drop to
zero briefly, and you know you have reached thermal shutdown. You know the junction
temperature is approximately 160oC. If you know your ambient temperature, or the
temperature of the surrounding air around the LDO, then you can measure the dissipated
power. This is done by measuring the input voltage, output voltage, and low current, and
then calculate the thermal resistance. There are some examples at the next slide, to
calculate thermal resistance.
Smaller Packages =
Bigger Thermal Challenges
Page 10
Microchip Technology Inc.
WebSeminar: December 17, 2003
Calculation Examples
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θJA=(TJ-TA)/Power
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If TJ= 160°C, TA= 60°C and PD= 1 Watt
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Determine the θJA
Given a θJA = 78°C / Watt
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Determine TJ when TA=50 °C and PD=1 Watt
© 2003 Microchip Technology Incorporated. All Rights Reserved.
Smaller Packages = Bigger Thermal Challenges
11
The equation thermal resistance is equal to junction temperature minus ambient
temperature divided by the power dissipated internal to the LDO. So, in this
case if the junction temperature is 160oC, the ambient temperature is 60oC and
you are dissipating one watt, you can calculate the thermal resistance. It is
simply 160oC minus 60oC or 100oC rise, divided by 1watt. This is 100oC per
watt.
If we turn this around a little bit, and asked the question; If we know our thermal
resistance is 78oC per watt, and we are dissipating 1 watt, what is the junction
temperature with an ambient of 50oC? So, we multiply the 78oC per watt, times
1 watt and we get a temperature rise of 78oC add that to 50oC and that’s a
128oC junction which is slightly above the 125oC maximum junction
specification.
The next slide lists some references that were used to develop the presentation
and the applications.
Smaller Packages =
Bigger Thermal Challenges
Page 11
Microchip Technology Inc.
WebSeminar: December 17, 2003
References
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Reference Material
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ADN005, Smaller Packages = Bigger Thermal Challenges
AN792, A Method to Determine How Much Power a SOT-23 Can
Dissipate in an Application
“MLP Application Note: Comprehensive User’s Guide (MLP, Micro
Leadframe Package)” Carsem, April 2002
JEDEC Standards JESD 51-5, 51-7
Dual LDO with Microcontroller RESET Function, TC1301A/B,
Microchip Technology Inc., DS21798
Low Quiescent Current Dual Output LDO, TC1302A/B, Microchip
Technology Inc., DS21333
TC1301/TC1302 Evaluation Board Users Guide, Microchip
Technology Inc., DS51427A
© 2003 Microchip Technology Incorporated. All Rights Reserved.
Smaller Packages = Bigger Thermal Challenges
12
The first one is the ADN005, “Smaller Packages = Bigger Thermal Challenges”.
This is an application design note that is on Microchip’s website, which you can
review. It describes this technique in a little more detail than we covered today.
AN792 is an application note that goes into even more details about thermal
management and how to apply this method to some other packages and
applications.
MLP application note that is available on Carsem’s website and the JEDEC
standards are available on JEDEC website, and that JEDEC.org. Those
standards are free, and you can pull those down and see actually how those
thermal resistances are derived.
In addition, there are some other reference materials listed. The data sheets
for the TC1301 and TC1302 product multiple output LDO families and there is
also an evaluation board users guide and a female board available for the
TC1302 family.
Smaller Packages =
Bigger Thermal Challenges
Page 12
Microchip Technology Inc.
WebSeminar: December 17, 2003
Conclusion
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New Power Management Devices Decrease
Cost and Increase Performance
Thermal Management is Key to
Performance Increase
Thermal Resistance Varies from Application
to Application and Requires Careful
Evaluation
© 2003 Microchip Technology Incorporated. All Rights Reserved.
Smaller Packages = Bigger Thermal Challenges
13
In conclusion, there are some new power management devices that are
available to decrease cost and increase performance for your applications.
Especially the devices are for applications that require more than one output
voltage. To be able to get the total capability available out of these packaged
parts, you really have to understand the thermal management and performance
issues.
Lastly, I want to mention thermal resistance varies from application to
application. So, when you look at a data sheet and you see the thermal
resistance is 41oC per watt, remember that is for a specific identified board that
has specific copper thickness, trace thickness, ground plane specifications,
and via specifications. Your applications are going to vary either above or
below that. You may have thicker copper or you may have thinner copper.
Typically if you see a thermal resistance for MSOP package or a SOT-23
package, that thermal resistance is defined for minimum trace width, fanned-out
over an inch.
So, you are looking at something that is closer to worse case, look at thermal
resistance for DFN packages. They are specified closer to a best case. That is
one of the big differences between the new DFN packages and the SOT-23 and
MSOP packages that have been available for sometime.
Smaller Packages =
Bigger Thermal Challenges
Page 13
Microchip Technology Inc.
WebSeminar: December 17, 2003
WebSeminar:
December 17, 2003
Smaller Packages =
Bigger Thermal
Challenges
© 2003 Microchip Technology Incorporated. All Rights Reserved.
Smaller Packages =
Bigger Thermal Challenges
Smaller Packages = Bigger Thermal Challenges
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