Fifteen Level Cascaded Multilevel Inverter Using Embedded Controller

International Journal of Information Science and Intelligent System,
3(1): 1-7,
2014
Fifteen Level Cascaded Multilevel Inverter
Using Embedded Controller
S. Sivasankari1,∗, C. R. Balamurugan2
1
PG Student, Department of EEE, Arunai Engineering College, Tiruvannamalai, Tamilnadu, India
2
Department of EEE, Arunai Engineering College, Tiruvannamalai, Tamilnadu, India
Received: 03 October 2013; Accepted: 15 December 2013
Abstract
This paper presents the 15-level cascaded multilevel inverter. Multilevel inverter topologies
(MLIs) are increasingly being used in medium and high power applications due to their many
advantages such as low power dissipation on power switches, low harmonic contents and low
electromagnetic interference (EMI) outputs. The proposed 15-level cascaded multilevel
inverter produces the pulses using Matlab/Simulink based embedded controller due to reduced
harmonic distortion. Embedded switching pattern scheme is used to improve the performance
of Multilevel Inverter. This scheme reduces the switching loss. To validate the developed
technique simulations are carried out through MATLAB/SIMULINK.
Keywords: THD; CMLI; Embedded controller
©Martin Science Publishing. All Rights Reserved.
1. Introduction
Multilevel inverters have become more popular over the years in high power electric
applications without use of a transformer and filters. Multilevel inverters can be divided into
three presentable topologies; diode-clamped, flying-capacitor, and cascaded H-bridge cell.
The concept of cascaded multilevel inverter is based on connecting H-bridge inverters in
series to get a sinusoidal voltage output. The output voltage is the sum of the voltage that is
generated by each cell. As the number of levels increases, the synthesized output waveform
has more steps which produce a staircase wave that approaches a desired waveform. The
voltage source inverters produce an output voltage or a current with levels either 0 or ±Vdc.
They are known as the two-level inverter. Among them, cascaded H-bridge multilevel
inverters have been received a great attention because of their merits such as minimum
∗
Corresponding author.
E-mail address: crbalain2010@gmail.com
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number of components, reliability, and modularity. In the viewpoint of obtaining a sinusoidal
output voltage wave, multilevel inverters may increase the number of output voltage levels.
However, it will need more components resulted in complexity and cost increase. To
minimize these drawbacks, multilevel inverter employing cascaded transformers. Bill Diong
et al [1] proposed a multilevel inverter with minimum total harmonic distortion. K.Gobinath
et al [2] developed a novel cascaded multilevel inverter for harmonic elimination. Pharne [3]
made a review on various multilevel inverter topologies. Prasad et al [4] evaluates the
different topologies of cascaded H-bridge multilevel inverters. Krishna Kumar et al [5]
presented a new multilevel inverter which consists of isolated symmetric input DC sources
alternately connected in opposite polarities through power switches. The structure allows
synthesis of multilevel waveform using reduced number of power switches as compared to the
classical topologies. Jacob James Nedumgatt et al [6] proposed a new cascaded multilevel
inverter topology. Ehsan Najafi et al [7] introduced a new topology with a reversing-voltage
component is proposed to improve the multilevel performance. Bayat et al [8] introduced a
new cascaded multilevel inverter with reduced number of switches. Murugesan.G et al [9]
proposed a PWM control technique for getting the multilevel output. G.S. Konstantinou et al
[10] proposed a topology which is a cascaded connection of a conventional three phase, two
level inverter. Domingo Ruiz-Caballero et al [11] introduced a new asymmetric hybrid
voltage inverter provides validity analyses for high voltage applications. Al-Judi et al [12]
introduced a bypass diode technique for conventional H-bridge multilevel inverter topology
that can reduce the number of active switching elements in the system. Tehrani et al [13]
proposed a multilevel inverter neutral point without the diode-clamped which deduced from
neutral point clamped or multipoint clamped topologies. Jin Wang et al [14] proposed a new
practical harmonics elimination method for multilevel inverters. Oliva et al [15] described a
algorithm that reduce the total harmonic distortion of the inverter. Ceglia et al [16] described
a new inverter topology using an auxiliary switch that reduces the number of power devices
required to implement a multilevel output.
2. Proposed System
The multilevel inverter has drawn tremendous interest in the power industry. The multilevel
inverter describes a new set of features that are suited for use in reactive power compensation.
It may be easier to produce a high- power, high voltage inverter with the multilevel structure
because of the way in which device voltage stresses are controlled in the structure. One of the
significant advantages of multilevel configuration is the harmonic reduction in the output
waveform without increasing switching frequency or decreasing the inverter power output.
Increasing the number of voltage levels in the inverter without requiring higher ratings on
individual devices can increase the power rating. The unique structure of multilevel voltage
source inverters allows them to reach high voltages with low harmonics without the use of
transformers or switching devices. By using a multilevel inverter the stress on each switching
device can be reduced proportional to the number of levels of the multilevel inverter, thus the
inverter can handle higher voltage without using an expensive and bulky step up transformer
in various application. As the number of voltage levels increases, the harmonic content of the
output voltage waveform decreases significantly. The different multilevel inverter structures
are cascaded H-bridge, diode clamped and flying capacitor multilevel inverter. Among these
three topologies, the cascaded multilevel inverter has the potential to be the most reliable and
achieve the best fault tolerance. The cascaded multilevel inverter typically comprises several
identical single phase H-bridge cells cascaded in series at its output side. This configuration is
commonly referred to as a cascaded H-bridge. The concept of this inverter is based on
connecting H-bridge inverters in series to get a sinusoidal voltage output. The output voltage
is the sum of the voltage that is generated by each cell. The asymmetrical cascaded multilevel
S. Sivasankari / International Journal of Information Science and Intelligent System
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inverter contains the DC bus voltages which are not equal in all the series power cells. The
schematic diagram of proposed asymmetrical fifteen level cascaded multilevel inverter is
shown in fig. 1.
Figure 1. Fifteen level asymmetric cascaded multilevel inverter
The traditional two or three levels inverter does not completely eliminate the unwanted
harmonics in the output waveform. When the number of levels increases, the total harmonic
distortion decreases significantly. This proposed method produce the pulses using
Matlab/Simulink based embedded controller for fifteen level asymmetrical cascaded
multilevel inverter. In this method the switching states are given as the input using the
Matlab/Simulink. The cascaded H-bridges multilevel inverter introduces the idea of using
Separate DC Sources to produce an AC voltage waveform. Each H-bridge inverter is
connected to its own DC sources such as Vdc, 2Vdc, 4Vdc. The structure of separate DC sources
is well suited for various renewable energy sources such as fuel cell, photovoltaic and
biomass. By cascading the AC outputs of each H-bridge inverter, an AC voltage waveform is
produced. A cascaded H-bridges multilevel inverter is simply a series connection of multiple
H-bridge inverters. Consider the fifteen level inverter; it requires 12 switches. By closing the
appropriate switches, each H-bridge inverter can produce fifteen different voltages, the output
levels are 7Vdc, 6Vdc, 5Vdc, 4Vdc, 3Vdc, 2Vdc, Vdc, 0, -Vdc, -2Vdc, -3Vdc, -4Vdc, -5Vdc, -6Vdc,
-7Vdc. It is also possible to modularize circuit layout and packaging because each level has the
same structure, but different voltage sources and there are no extra clamping diodes or voltage
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balancing capacitors. The switching angles can be chosen in such a way that the total
harmonic distortion is minimized. An embedded system is some combination of computer
hardware and software, either fixed in capability or programmable, that is specifically
designed for a particular function. Industrial machines, automobiles medical equipment,
cameras, household appliances, airplanes, vending machines and toys are among the myriad
possible hosts of an embedded system. Embedded systems that are programmable are
provided with programming interfaces. The embedded controller is in the center of power
management for the platform so there are various power management signals connecting the
Intel Architecture components to the embedded controller.
One of the advantages of this type of multilevel inverter is that it needs less number of
components comparative to the Diode clamped or the flying capacitor, so the price and the
weight of the inverter is less than that of the two former types. Soft-switching techniques can
be used to reduce switching losses and device stresses. The final output voltage levels
becomes the sum of each terminal voltage of H-bridge and it is given as,
Vout= VHB1+VHB2.
The total harmonic distortion (THD), which is a measure of closeness in shape between a
waveform and its fundamental component. When the voltage levels of the topologies are
increases, the harmonic content of the output voltage waveform decreases significantly. The
switching loss of the proposed system was low compared with the minimum levels of
cascaded multilevel inverter by using this embedded controller. The Total Harmonic
Distortion (THD) was reduced so that the performance of the proposed system also increased.
Table 1. Switching states for fifteen level asymmetric cascaded multilevel inverter
Switching states
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
Output
voltage
1
1
0
0
1
1
0
0
1
1
0
0
7Vdc
0
1
0
1
1
1
0
0
1
1
0
0
6Vdc
1
1
0
0
0
1
0
1
1
1
0
0
5Vdc
0
1
0
1
0
1
0
1
1
1
0
0
4Vdc
1
1
0
0
1
1
0
0
0
1
0
1
3Vdc
0
1
0
1
1
1
0
0
0
1
0
1
2Vdc
0
0
1
1
1
1
0
0
0
1
0
1
Vdc
0
1
0
1
0
1
0
1
0
1
0
1
0Vdc
1
1
0
0
0
0
1
1
0
1
0
1
-Vdc
0
1
0
1
1
1
0
0
0
1
0
1
-2Vdc
0
0
1
1
0
0
1
1
0
1
0
1
-3Vdc
0
1
0
1
0
1
0
1
0
0
1
1
-4Vdc
0
0
1
1
0
1
0
1
0
0
1
1
-5Vdc
0
1
0
1
0
0
1
1
0
0
1
1
-6Vdc
0
0
1
1
0
0
1
1
0
0
1
1
-7Vdc
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3. Simulation Results
We are performed computer-aided simulations to prove availability of the proposed
multilevel inverter. The simulations are implemented using Matlab and it was considered to a
pure resistive load. The conventional method simulation output has been obtained by using
the carriers. In this proposed method the output has been obtained by using the
Matlab/Simulink. The simulation output of the proposed fifteen level asymmetric cascaded
multilevel inverter is shown in the fig. 2.
Figure 2. Simulation output of fifteen levels asymmetric cascaded multilevel inverter
In this proposed system, the total harmonic distortion value was reduced compared with the
minimum levels of cascaded multilevel inverter. When the number of levels increases the
total harmonic distortion value was reduced. The switching loss of the proposed system also
reduced compared with the conventional method. So that the performance of the proposed
system also increased. The total harmonic distortion (THD) value of the conventional
cascaded multilevel inverter is shown in the fig. 3.
Figure 3. THD for proposed CMLI
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In this proposed method the lower order harmonics values are reduced compared with the
minimum levels of CMLI and conventional cascaded multilevel inverter. The switching loss
of the proposed system also reduced and performance of the system will be increased. When
the number of levels increases, the lower order harmonics will be reduced.
Table 2. THD value for proposed fifteen level asymmetric cascaded multilevel inverter
Topology
Asymmetric
cascaded
multilevel
inverter
Number of
Levels
Number of
switches
Total
Harmonic
Distortion
15
12
6.59%
The above table represents the total harmonic distortion (THD) value for the proposed
fifteen level asymmetric cascaded multilevel inverter. In this proposed system there are
twelve switches are used. The total harmonic distortion (THD) value for the embedded
controller based asymmetric cascaded multilevel system was reduced compare with the
Conventional CMLI and lower level CMLI.
4. Conclusion
In this paper, fifteen level embedded controller based asymmetric cascaded multilevel
inverter is presented. The proposed inverter can synthesize high quality output voltage near to
sinusoidal waves. It is used to provide better performance than the conventional cascaded
multilevel inverter. And also this proposed method is used to reduce the switching losses. The
total harmonic distortion (THD) can be further reduced.
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