New Xilinx Technology for Industrial Automation at SPS/IPC/Drives 2011
Frequently Asked Questions
Embargoed News: Nov 22, 2011
Xilinx Unveils IP Cores, Development Kits and New Agile Mixed Signal
Functionality to Enhance Design of Industrial Automation Subsystems
1. What are the major innovations Xilinx is announcing at SPS/IPC/DRIVES 2011?
Xilinx, Inc. and its ecosystem have extended their range of development platforms and IP
cores that help to reduce development time and simplify the design of subsystems for
industrial automation. The latest solutions are focused on precision motor control,
connectivity utilizing the major industrial real-time networking standards, and Agile Mixed
Signal for sensing and control applications.
2. What are the benefits of FPGAs in industrial automation applications?
Using FPGAs to develop systems for industrial automation enables system developers to add
greater performance, increase integration and thereby reduce solution size and bill-ofmaterials costs. Greater integration can also improve reliability by eliminating numerous
potential points of failure.
An FPGA-based solution is scalable and future proof, offering protection against challenges
such as obsolescence that can affect solutions built with Application-Specific Standard
Products (ASSPs). FPGAs also provide flexibility for system developers to address demands
such as configurable support for one of a number of networking protocols on a single
hardware platform. By taking advantage of IP blocks, evaluation kits, reference designs and
Targeted Design Platforms (TDPs), such as those unveiled by Xilinx at SPS/IPC/DRIVES
2011, developers can significantly reduce the time to develop equipment and subsystems.
Additional benefits include high levels of functional safety, where engineers can take
advantage of FPGA circuitry to implement error detection and hence allow the host controller
to manage faults and exceptions intelligently. Security can also be improved by taking
advantage of anti-tamper mechanisms implemented in the FPGA.
SPS Drives 2011 FAQ
3. What exactly is available to customers?
Xilinx has increased support for development of motor controls with its new IP blocks
featuring advanced algorithms such as sensor-less Field-Oriented Control (FOC) and
Recursive Pulse-Frequency Modulation (RPFM), thereby helping accelerate development of
precision motor drives capable of operating at high performance and low electromagnetic
noise. This is the first time an FPGA vendor has offered advanced algorithms such as these
for motor control.
In addition, a new motor-control and networking daughter card, developed in close
cooperation with Xilinx Alliance Program member, QDESYS, is also available. The card can
be plugged into Xilinx development kits and Targeted Design Platforms, allowing engineers
to evaluate IP blocks for motor control and begin prototyping quickly. Moreover, the
daughter card can be incorporated into the end product quickly and easily, as a reference
design, at no extra cost.
Xilinx also unveiled new development platforms and IP for industrial networking
applications. Among these are three new major industrial Ethernet standard reference
designs, which can be downloaded at Avnet’s Design Resource Center. Using the Industrial
Ethernet Kit developed by Xilinx’s global distribution partner Avnet, which features a
Spartan®-6 FPGA, developers can build solutions supporting EtherCAT, Ethernet
POWERLINK, SERCOS III or PROFINET connectivity. A low-cost USB development
platform, called LX9 Micro Board, is also available, supporting development of Ethernet
POWERLINK solutions.
Finally, Xilinx 7 series and Zynq™-7000 devices now integrate enhanced analog circuitry
that enable developers to improve analog-to-digital conversion and also enable filtering and
important post-processing tasks such as calibration and linearization to be performed in the
FPGA. This helps customers to take advantage of the inherent DSP capabilities of Xilinx
FPGAs in a wide range of sensing and control applications.
4. What are the key value propositions of the new IP blocks and platforms?
In general, development platforms such as the Industrial Ethernet Kit and LX9 Micro Board,
and functional modules, allow rapid proof of concept, thereby reducing design risk, and
enable developers to begin prototyping their designs quickly and so shorten time to market.
2
SPS Drives 2011 FAQ
The NETMOT daughter card, advanced development platform, available from QDESYS,
accelerates prototyping of networkable motor drives, while the reference design enables rapid
transition into full production. The advanced IP blocks provide developers significant
performance advantages over traditional microcontroller or DSP motor control offerings.
Unlike a microcontroller or DSP-based controller, a single FPGA can be used to control
multiple motors. This empowers developers to consolidate the electronics for several motorcontrol channels thereby reducing both solution size and bill-of-materials costs. The number
of axes that can be controlled is limited only by the size of the FPGA specified, hence
offering immense scalability and flexibility. Another benefit is that customers can specify
lower cost motors by using the FPGA’s processing and logic to overcome challenges that
conventionally demand higher quality mechanical components. In large multi-axis systems,
this can yield a significant saving.
As far as networking applications are concerned, increased protocol support provides
flexibility to build configurable solutions capable of supporting any one protocol as required
by the end user. This allows system developers to offer a range of products based on common
hardware, to gain benefits such as faster turnaround times and save the overheads of
designing and managing several distinct hardware platforms. Taking advantage of this larger
set of protocol stacks, developers can use Xilinx FPGAs to integrate networking with their
industrial control application. In each case, Xilinx has worked closely with the primary
source of competence, such as SERCOS International and the Ethernet POWERLINK
Standardization Group, to achieve a high-quality implementation ensuring compliance with
the applicable standards.
5. What is Agile Mixed Signal?
Xilinx has extended its commitment to support analog mixed-signal functionality by
significantly enhancing the System Monitor embedded analog subsystem, which was first
introduced in Virtex®-5 FPGAs. Now including two 1Msps 12-bit general-purpose
analog/digital converters and named XADC, this subsystem is tightly coupled with FPGA
logic to create a programmable mixed-signal platform called Agile Mixed Signal (AMS).
AMS is included in all 7 series devices (Artix™, Kintex™ and Virtex FPGAs) and Zynq7000 EPP.
6. What does AMS contribute to industrial automation systems?
AMS enables customers to perform signal conditioning inside the FPGA that would
otherwise call for additional discrete components and demand significant analog design
3
SPS Drives 2011 FAQ
4
skills. This reduces design risks as well as solution size and cost, and also helps engineers
utilize the DSP functionality inherent in Xilinx FPGAs. Capturing analog signals for
processing or storage in the digital domain can require intensive signal conditioning such as
linearization, filtering or calibration. The new AMS platform, which offers improved analog
functionality, enables engineers to eliminate a significant quantity of discrete analog circuitry
such as filtering networks when building sensor monitoring or advanced data-acquisition
systems. AMS provides the industry’s most flexible general-purpose analog FPGA interface.
Support for the XADC block and AMS is provided in the applicable device design tools,
enabling designers to model the analog signal environment accurately within the FPGA
design flow. Moreover, Xilinx development kits for 7 series and Zynq devices support AMS
functionality, thereby allowing customers to implement prototype hardware with built-in
mixed-signal capability at an early project stage.
7. Are any additional expenses, such as license fees, applicable?
There are no license fees for any evaluation reference designs for both Industrial Networking
and Motor Control IP. Protocols such as EtherCAT, SERCOS III or PROFINET require
licenses from the respective owning bodies. Ethernet POWERLINK is an open standard, and
can be used without needing a license. For motor control IP licensing, please go to
www.qdesys.com for more details.
8. What device architectures do the IP blocks and development kits support?
The development kits and IP for motor control and networking are supported on the costeffective high-performing Spartan-6 FPGA architecture. As Spartan-6 FPGAs have common
characteristics as 7 series FPGAs, the IP cores and reference designs will be supported
leveraging the unified architecture. AMS functionality is currently supported on 7 series
FPGAs and Zynq-7000 EPP.
9. What software is required?
The Xilinx Integrated Software Environment (ISE) includes support for the devices and IP
blocks covered by this announcement. For more information, visit www.xilinx.com/ise.
###