EE 312
Electromagnetic and Electronic Devices Lab
Spring 2009
Name_____________________________
Lab 3 - Transistor Digital Logic Circuits
Feb. 4, 2009
Lab Report due Friday, Feb. 13
Purpose:
To measure and analyze the characteristics of bi-junction transistor circuits configured as
digital logic gates.
Equipment:
Dual DC power supply
Two 2N3904 NPN transistors
240 Ω and 10k Ω resistor
Digital Multimeter (DMM)
Breadboard
Wire Jumper Kit
Connecting leads
Dual In-Line Pin (DIP) switches
Steps 1 and 2 – Inverter Circuit
1)
□ On the breadboard, construct the inverter transistor circuit shown in Figure 1. The input voltage is
the voltage across the switch and the output voltage in VC. When Vin is HIGH , Vout should be LOW
and vice versa. Sketch the circuit layout on a breadboard layout sheet. Use a collector resistor of RC
= 240 Ω, a base resistor of RB = 9.1 kΩ, and a diode resistor of RD = 150 Ω.
Figure 1 – Common Emitter Transistor Circuit.
2)
□ Note what happens when switch is closed and when it is opened.
LED is on when switch is _____________ . LED is off when switch is _____________ .
3)
□ Measure VC when switch is opened and closed.
VC = __________ when switch is OPEN.
4)
VC = __________ when switch is CLOSED.
□ Calculate VC when switch is opened and closed.
VC = __________ when switch is OPEN.
VC = __________ when switch is CLOSED.
EE 312
Electromagnetic and Electronic Devices Lab
Spring 2009
Part II – NAND Gate Transistor Circuit
□ On the breadboard, construct the AND gate transistor circuit shown in figure 3.
Sketch the circuit
layout on a breadboard layout sheet. Use a collector resistor of RC = 240 Ω and base resistors of RB1 = RB2 =
10 kΩ.
Figure 2 – NAND gate Circuit
□ Operate the switches and record the results in Table 3.
Calculate the output voltage for each case
with the diode removed.
5)
□ Assume saturation and calculate the current in the collector resistor when both switches are
CLOSED.
6)
□ Assume cutoff operation and calculate the collector voltage VC1 when both switches are OPEN.
INPUT
Switch 1
Table 1 – AND Gate Operation
OUTPUT
Calculated
Vout
LED ON or
With
diode
Switch 1
OFF
removed
OPEN
OPEN
OPEN
CLOSED
CLOSED
OPEN
CLOSED
CLOSED
Measured
Vout
With diode
removed
EE 312
Electromagnetic and Electronic Devices Lab
Spring 2009
Part III – NOR Gate Transistor Circuit
7)
□ Construct the OR gate circuit, shown in figure 3.
Use a collector resistor of RC = 240 Ω and base
resistors of RB1 = RB2 = 10 kΩ.
Figure 3 – NOR gate Circuit
8)
□ Play with the switches and record the results in Table 2.
Have the instructor check the circuit:
Instructor Signoff______________________
9)
□ Assume saturation and calculate the current in the collector resistor when one of the switches are
CLOSED.
10)
□ Assume cutoff operation and calculate the collector voltage VC when both switches are OPEN.
INPUT
Switch 1
Table 2 – OR Gate Operation
OUTPUT
Calculated
Vout
LED ON or
With diode
Switch 1
OFF
removed
OPEN
OPEN
OPEN
CLOSED
CLOSED
OPEN
CLOSED
CLOSED
Measured
Vout
With diode
removed
EE 312
Electromagnetic and Electronic Devices Lab
Spring 2009
Post lab analysis
The exclusive OR operation is expressed logically as XY + XY and has a truth table of
X
0
0
1
1
Table 3 – XOR Gate Operation
INPUT
OUTPUT
Y
0
1
0
1
0
1
1
0
Using DeMorgan’s Law, show that the XOR operation can be expressed as:
As a reminder, DeMorgan’s Law’s are: XY = X + Y and X + Y = X Y
Use this expression to draw the circuit diagram of an XOR gate using only inverters, NAND gate(s), and NOR gate(s).
Draw the transistor circuit diagram of an XOR by:
1) replacing each inverter with an inverting transistor circuit
2) replacing each NAND gate with an NAND gate transistor circuit
3) replacing each NOR gate with an NOR gate transistor circuit
EXTRA CREDIT: Build and demonstrate correct operation of the XOR circuit using a breadboard, jumper wires,
transistors, resistors, and switches and one LED. No other electronic devices are allowed. There should be two switches
to set X and Y high or low. There should be an LED to indicate the output level of the XOR. Due date for extra credit:
March 18, 2009.
Questions for lab report – Theory section
1) How does the transistor inverter work? What voltage is the output? When the switch is closed, explain
why the input voltage is a logic 0 and the output voltage is a logic 1. When the switch is open, explain why
the output voltage is a logic 0.
2) What is the truth table of a NAND gate? In the transistor NAND gate circuit, which voltages are the two
input voltages and which voltage is the output voltage? Explain how this circuit operates and show how it
generates the truth table. When both of the switches are closed, are the input levels both a logic 0 or a
logic 1? When both of the switches are closed, explain how the circuit generates a logic 0 at the output.
When one or both of the switches are open, explain how the circuit generates a logic 1 at the output.
3) What is the truth table of a NOR gate? In the transistor NOR gate circuit, which voltages are the two input
voltages and which voltage is the output voltage? Explain how this circuit operates and show how it
generates the truth table. When both of the switches are open, explain how the circuit generates a logic 1
at the output. When one or both of the switches are closed, explain how the circuit generates a logic 1 at
both of the inputs and a logic 0 at the output.
Questions for lab report – Results section
1) Include table 1 and 2 in the lab report.
2) For TTL logic, a logic 0 is considered any voltage below 2 volts. A logic 1 is considered any voltage above
4 volts. Considering the measured output voltages, did the transistor logic circuits generate the necessary
logic levels? In other words did the gates perform as you would expect them to?