A SINGLE-PHASE SINGLE-STAGE BUCK-BOOST INVERTER INTENDED
FOR LOW POWER ALTERNATIVE ENERGY CONVERSION SYSTEMS:
ANALYSIS, DESIGN AND EXPERIMENTATION
José C. U. Peña, Guilherme de A. e Melo, Moacyr A. G. de Brito, Carlos A. Canesin
São Paulo State University – UNESP – Power Electronics Laboratory – Electrical Engineering Department
Av. Prof. José Carlos Rossi, 1370, 15385-000, Ilha Solteira-SP
josecarlos84@gmail.com ; canesin@dee.feis.unesp.br
Abstract – This paper presents the operational analysis
of the single-phase integrated buck-boost inverter. This
topology is able to convert the DC input voltage into AC
voltage with a high static gain, low harmonic content and
acceptable efficiency, all in one single-stage. Main
functionality aspects are explained, design procedure,
system modeling and control, and also component
requirements are detailed. Main simulation results are
included, and two prototypes were implemented and
experimentally tested, where its results are compared
with those corresponding to similar topologies available
in literature.
Keywords - Buck-Boost inverter, integrated inverters,
single-phase inverters, single-stage inverters.
I. INTRODUCTION
Increasing utilization of low power, small-scale alternative
energies conversion systems is encouraging the development
of new inverter topologies. Main functionalities and
topologies for this application are summarized in [1], as
follows:
- Power conversion from variable DC into fixed AC with
voltage values either lower or greater than the input one with
low THD and minimum frequency deviation.
- Protection of the energy source (which may include antiislanding and electrical isolation).
- Power management to improve the energy conversion
(MPPT techniques, optimal efficiency, etc.).
Xue [1] also proposed a classification for the different
inverter the topologies, these can be:
- Single stage, those are the inverters with only one stage
of power conversion to boost and invert the low DC input
voltage. Single stage converters are typically sub-classified
by the number of active switches being the most common the
topologies with 4 and 6 switches. Some single-stage inverters
are introduced in [2] [3] [4] [5] [6].
- Any other DC-AC converter with more than one power
stage is considered as a multiple-stage inverter.
Different energy sources and loads lead to different
requirements. However, there are some key issues relative to
any inverter topology. These are:
- Power decoupling between energy source and the load.
This is usually made by using large electrolytic capacitors,
intermediate DC lick capacitors [4] or small film capacitors.
However, some authors have proposed the inductive power
decoupling as a possible alternative [7].
- Grid connected or stand-alone applications. Grid
connected inverters are typically unidirectional current
sources, on the other hand stand-alone inverters are voltage
source and may require bi-directionality.
- Considering safety and protection concerns, grounding
could be required. Some grid connected applications include
a ground reference at the utility and thus dual grounding
becomes necessary.
In recent years the trend is to develop topologies with a
reduced components count, wide range of input voltage,
increased efficiency and modularity. In order to achieve
these goals the single-phase, single-stage buck-boost inverter
was introduced as a converter with five active switches, very
large range of input voltage and reduced size.
This paper emphasizes the operational analysis of a
single-stage single-phase buck-boost inverter topology in
order to propose its design and the components requirements
to improve the performance in stand-alone applications.
II. ANALYSIS OF THE BUCK-BOOST INVERTER
A. Power Stage
The proposed inverter results from the integration of the
DC-DC buck-boost converter and a voltage source inverter
(VSI), as detailed in [8]. The synthesis of the converter is
described in Fig. 1 [9].
Full bridge
inverter
Buck-Boost DCDC converter
Db
S0
S1
S2
Lo
Vin
Lb
Cb
Co
S3
S4
(a)
S0
Vin
S1
Db
L
S2
Vin
C
S3
(b)
S1
S0
S2
R
VL
L
Vout
IL
C
S4
S3
S4
(c)
Fig. 1. Synthesis of the single-stage single-phase buck-boost
inverter.
B. Operation
The operation consists in two half-cycles, a positive one
and a negative one; these are established by either the S1-S4
or S2-S3 transistors pairs respectively. The four transistors at
the inverter side are driven by low frequency pulses
(frequency of the AC output voltage), moreover pulses are
complementary to each other (pair to pair). S0 is driven by a
high frequency pulse in order to establish the two
subintervals due to the CCM operation at any of the two halfcycles. During the first subinterval S0 is ON while all diodes
remain OFF. Hence, input voltage is applied on the inductor
in order to storage energy meanwhile at the load side
capacitor (C0) supplies the demanded energy. In the second
subinterval S0 is OFF while diodes D1-D4 (at the positive
half-cycle) or D2-D3 (at the negative one) are ON. Energy
stored in the inductor flows as current to the load and output
capacitor is charged. Switching scheme is shown in Fig. 4.
Figure 5 shows the two subintervals corresponding to the
positive half-cycle (devices and sections with current flow
have been highlighted in red) and their respective equivalent
circuits.
Positive Half-Cycle
S0
S1-S4
S2-S3
time
Fig. 4. Logic pulses for each active switch.
D1
S0
Vin
G
E metal
G
Fig. 2. Chip structure and symbol of an NPT-IGBT (left) and a RBIGBT (right).
D2
S0
S1
Vin
L
Vout
S2
R
D3
D4
Co
S3
L
Vout
Co
S4
Fig. 3. Schematic of the single-stage single-phase buck-boost
inverter, based on diode-MOSFET series association.
Vin
Vin
Co
VL
Vout
R
iC
iL
D2
S1
L
D4
S4
D1
S0
iR
S2
RAC
VL D
3
S3
oxide
p guard ring
C
n+
pn G
p+
C metal E
D1
D2
S1
E metal
oxide
p guard ring
C
n+
pn
G
p
E
C metal
Negative Half-Cycle
Logic value
Initially the buck-boost converter (polarities have been
inverted) is loaded by a VSI, as shown in Fig. 1(a). As
converter is supposed to operate on continuous conduction
mode, power flows from source to VSI only when S0 is
blocked, then VSI output inductor should be removed.
Capacitor Cb supply power to VSI when S0 is ON, hence
instead supplying power to VSI and then to load; it could be
supplied directly by the output VSI capacitor. Then Cb could
be suppressed too. This simplification is called the reactive
element reduction resulting in the layout of Fig. 1(b). The
buck-boost output diode imposes direction to the VSI input
current. Thus, considering unidirectional switches on the
inverter this diode could be removed. So, the corresponding
layout of the single-stage single-phase buck-boost inverter
with a resistive load is shown in Fig. 1(c).
Because the resulting inverter is an inductive
accumulation converter, the switches at the inverter side
should have reverse blocking capability. Theoretically,
IGBTs are able to block reverse voltage, however these
devices are manufactured neglecting this capability in order
to improve the conduction performance [10]. Reverse
Blocking capability is also required in Current Source
inverters (CSI), matrix converters and as auxiliary device in
soft switching cells. For these applications some
manufactures offer reverse blocking IGBTs (RB-IGBTs) as
[11-13]. These RB-IGBTs are made from a non-punchtrough (NPT) IGBT where the collector p+ layer is modified
to become a large isolation layer as shown in Fig. 2. The
result is a new p-n junction at the collector and, in practice, it
means a series diode. Unfortunately, this additional diode is
unsuitable for high frequency applications, for the most of
commercially available devices, because of its high reverse
recovering time and current. So, in addition, in this paper
were considered the utilization of the diode-MOSFET
association to perform the RB device, as shown in Fig. 3.
Vout
RAC
VL D
3
Co
S3
D4
S4
iR
iC
S2
Co
VL
R
Vout
iL
Fig. 5. Subintervals during the positive half-cycle and equivalent
circuits.
It should be pointed out that switching scheme should
consider a short interval time during which all the inverter
side switches are ON, in order to avoid an open circuit
condition in the inductor. This interval is analogous to the
dead time required in voltage source inverters.
The stresses in semiconductor devices at each sub-interval
are listed in Table I in function of the input voltage (Vin),
output voltage (Vout) and the inductor current (IL).
TABLE I
Main stresses at semiconductor devices
Device
Stress
VCE
IS
VR
IF
VDS
IS
S0
D1
S2
1st Subinterval
0
IL
-(Vout+Vin)/2
0
(Vout-Vin)/2
0
2nd Subinterval
Vout+Vin
0
0
IL
Vout
0
C. Steady state design
1) Duty cycle - Ideal conversion ratio for the buck-boost
DC-DC converter (G) [14] is modified including time-variant
output voltage according to (1), considering the absolute
value.
V (t )
D(t )
(1)
G(t )  out

Vin
1  D(t )
Where ω is the desired angular frequency.
Rearranging terms and defining α as the ratio of the input
voltage to the peak value of the output one (VP), it is possible
to define the duty cycle (D) as a function of time (2), this is
shown on Fig. 6.
sen (t )
sen (t )
(2)
D(t ) 

V
sen (t )  
sen (t )  in
VP
1
α=0,05
α=0,2
0,8
Duty Cycle
α=0,4
α=0,6
α=0,8
0,6
0,2
π/4
π/2
ωt
dI L (t )
(4)
 Vin
dt
Linearizing (4), defining the current ripple as ΔIL(ωt),
considering the time-variant duty cycle and rearranging
terms, one can obtain (5).
V  D(t )
(5)
L  in
f S I L (t )
Thus, with the input voltage, the output peak voltage,
switching frequency and the desired current ripple the
required inductance is calculated. This is the same expression
for the inductance in a DC-DC buck-boost converter.
Considering the maximum value of the duty cycle expression
(5), one can obtain (6).
Vin
1
(6)
L
f S I L 1  
On the other hand, the capacitor is responsible for
supplying power to the load during the first subinterval. So,
the corresponding volt-ampere relation for this time interval
is given by (7).
dV (t )
V (t )
(7)
C out
 I LOAD  out
dt
R AC
Linearizing and including the time-variant duty cycle (7)
could be solved in terms of the capacitance, as given by (8).
L
dVout (t ) Vout (t ) D(t )
(8)

dt
f S  Vout  R AC
The required capacitance could be calculated considering
the peak maximum value of the duty cycle and defining the
desired voltage ripple, as given by (9).
VP
1
(9)
C
f S  Vout  R AC 1  
The specifications to be considered in developing the
prototypes are listed in Table II. These values correspond to
a typical small wind energy conversion system.
C
0,4
0
3) Reactive elements – Inductor and capacitor are
designed to operate at the switching frequency.
The inductor is responsible for the power accumulation
during the first subinterval. Along this time interval, the
input voltage is directly applied over inductor terminals,
resulting volt-ampere equation given by (4).
3π/4
π
Fig. 6. Plots of duty cycle for different values of α.
In Fig. 6 it is evident that, despite of the α value, it is
always possible to define a duty cycle. This means that the
proposed converter can operate adequately over a wide range
of input voltage.
2) Inductor Current – Based on (2) and considering no
losses it is possible to deduce the expression for the mean
value of inductor current along a switching period, as given
by (3).
VP sen (t )  sen (t )   
I L (t ) 
(3)
  R AC
If current ripple is considered as a triangular waveform it
is also possible to compute the ideal RMS value. Moreover,
the assumption of efficiency and current ripple is enough to
obtain the peak, average and RMS values of the currents for
all the devices in the converter. With these values, the listed
stresses in Table 1 and setting the switching frequency (fS)
the specification of the semiconductor devices is complete.
TABLE I
System specifications
Parameter
Input voltage (Vin)
Output voltage (Vout)
Output power (Po)
Voltage ripple (ΔVout)
Current ripple (ΔIL)
Switching frequency (fS)
Value
48 V
127 Vrms @ 60Hz
300 W
10%
3A
48 kHz
By substitution of the specified values in (6) and (9) the
required reactive elements are obtained:
L  263 H
(10)
C  3.05 F
(11)
These are low values, so reduced size and weigh are
expected.
10
100
5
0
0
-5
-200
-10
Current (A)
-100
20
10
00
10
20
30
40
50
60
70
80
Time (ms)
Fig. 8. Main simulation results.
300
200
Voltage (V)
100
0
200
100
0
Vref
+-
Cv
iref
+-
ei
Ci
d
Buck-Boost
equivalent model
iL
PWM
Gid
0
vout
Gvi
-50
-100
Ki
Abs
0
Kv
10
20
30
Time (ms)
40
50
Fig. 9. The voltage waveforms at semiconductor devices.
Fig. 7. Block diagram of the control strategy.
IV. EXPERIMENTAL RESULTS
III. SIMULATION RESULTS
In order to verify the functionality of the proposed inverter
and the adopted control strategy a computational simulation
was performed. A model of the inverter was developed in
MatLab-Simulink® based on available models of switching
devices and electrical components. Control was developed
using continuous transfer function blocks.
Main results corresponding to output voltage (highlighted
in blue), load current (red) and inductor current (green) are
shown in Fig. 8. Moreover, a load step from 50% to nominal
load was applied at the peak of the sinusoidal waveform.
Output voltage has the desired amplitude and frequency.
Total harmonic distortion was of only 2.5%. Inductor current
has a waveform according to the analytical expression (3).
Dynamic response proves the validity of the adopted control
strategy.
The voltage waveforms at S0, S1 and D1 along 50 ms
(equivalent to three periods of the output voltage) are plotted
in Fig. 9. These waveforms are totally agreed with stresses
values listed in Table I.
Typical values of leakage and dispersion parameters were
included in the simulation in order to compute the efficiency.
Output power was 300 W for an input power of 325 W; this
means an overall efficiency of 92.3%.
Two prototypes of the single-stage single-phase buckboost inverter were developed and tested. The first prototype
was implemented based on the RB-IGBT IXRH40N120. The
second prototype considered the series association of the
Shottky diode MBR40250-D and the MOSFET
IRFPS43N50K for the inverter side switches, the same
MOSFET without series diode was used as input switch (S0).
Reactive elements were the same for the two prototypes.
A DC regulated voltage supply was used as power source.
Control was performed digitally by the dSpace® DS1104
real time control board. Experimental setup is shown in Fig.
10. This includes the power supply (right), the inverter
(middle), resistive load (lower middle), the real time control
system (CPU at the left) and the measurement equipment
(two wattmeter at both sides of the inverter and an
oscilloscope at the right side).
A. Results from the prototype based on RB-IGBTs
Main results from the prototype based on RB-IGBTs are
shown in Fig. 11. Output voltage is highlighted in blue and
plotted in a 100 V/div scale, load current (red) is in a 2 A/div
scale while inductor current (green) is in a 5 A/div scale,
where time scale is 10 ms/div.
Corrente (A)
Voltage (V)
200
Current (A)
D. Modeling and control
The state of space averaging method was applied to obtain
an equivalent linear model. Neglecting non idealities, the
resulting model is similar to the corresponding one of DCDC buck-boost converter (but with alternated output voltage
at steady state). This means a right half-plane zero which
limits the compensator design. In order to overcome this
limitation the selected control strategy was the programming
current mode, according to [15]. This means two control
loops, the first one is the inner loop which includes the
inductor current to duty cycle transfer function (Gid); its
compensator (Ci) is designed with a high crossover
frequency (a quarter of the switching frequency) in order to
provide the signal to modulate the duty cycle (PWM) with
high dynamics, this is called the current loop. The second
control loop includes the previous closed current loop and
the output voltage to inductor current transfer function (Gvi).
In this case the compensator (Cv) is designed to provide the
reference signal for the current loop, thus its crossover
frequency is set as, at least, a decade lower. The control
strategy is depicted in Fig. 7. Additional blocks Ki and Kv
represent the sensors used to measure inductor current and
output voltage. An absolute value block is necessary because
of the alternating polarity of the output voltage.
Output voltage has the required amplitude and frequency
with a THD of only 3.9%. However, load was limited to 125
W because of excessive stresses above that value. Reverse
current of the associated diode is 28.5 A, and the reverse
recovering time is 2.1 µs, these values are too high for this
high frequency application.
Output voltage has the required amplitude and frequency
with a THD of only 2.7% (at rated power). Measured power
at the output was 305 W for an input of 344 W, so the
achieved efficiency was of 88.66%.
Several measurements of the input and load power were
performed in order to compute the efficiency as a function of
the load, as shown in Fig. 13.
Efficiency (%)
92
91
90
89
88
87
80
130
180
230
Load power (W)
280
330
Fig. 13. Interpolated curve of efficiency versus load power.
Fig. 10. Experimental setup.
Even though efficiency at rated power is 88.66% higher
values are achieved for loads within 180 W. The maximum
efficiency was 91.18% corresponding to a load of 186 W.
Figure 14 shows the waveforms of the current (red, 5
A/div) and voltage (blue, 200 V/div) stresses at S0, where
time scale is 5 ms/div. Despite of transient spikes (due to
switching) these waveforms are agreed with the stresses
listed in Table I and those obtained in the simulations.
Fig. 11. Main waveforms from the prototype based on RB-IGBTs.
Measured power at the input was 184 W. Thus the
efficiency was of 68%. This means that the selected RBIGBT was inappropriate for this application because of its
reverse recovery limitations.
B. Results from the prototype based on diode-MOSFET
series association
Main results obtained with this prototype are shown in
Fig. 12. Output voltage is highlighted in blue and plotted in a
100 V/div scale, load current (red) is in a 5 A/div scale while
inductor current (green) is in a 10 A/div scale, where time
scale is 10 ms/div. Moreover, a load step from 50% to 100%
of the rated power is applied to verify the dynamic response.
Fig. 14. Current (red, 5 A/div) and voltage (blue, 200 V/div) at S0
across the time (5 ms/div).
High frequency details of the current and voltage at S0 are
shown in Fig. 15. Scales and color remains the same except
by the time which now is in the 5 µs/div scale.
Fig. 15. High frequency details of current and voltage at S0.
Fig. 12. Main results from the prototype based on series association
of diode and MOSFET.
Waveforms of current and voltage stresses at S1 and D1 are
shown in figures 16 and 17, respectively. Both figures were
plotted with scales of 5 A/div for current (red), 200 V/div for
voltage (blue) and 5 ms/div for the time.
classical two stage topology (Boost + VSI), and the proposed
single-phase single-stage buck-boost inverter. These
parameters are the considered by Xue in [1]: input voltage
range, reported power, efficiency at rated power (η),
switching frequency (fs), component count considering
transformers (Tx) and its type (either low or high frequency),
capacitors (C), diodes and active switches (D/S); also the
power decoupling load type and MPPT capability are
considered.
VI. CONCLUSIONS
This paper presented the operational analysis, design
procedure, modeling and control of the single-phase singlestage buck-boost inverter.
Obtained results prove the validity of the proposed
converter as an alternative to be used in small scale
alternative energy conversion systems. Implementation based
on RB-IGBTs resulted in an inefficient inverter. However,
prototype based on diode-MOSFET performed the DC-AC
conversion with the desired amplitude and frequency, very
low THD and acceptable efficiency that eventually could be
improved if this semiconductors association can be made
available as an integrated chip, or, considering the use of the
next generation for the RB-IGBTs with fast and soft
recovery.
Fig. 16. Waveforms of current and voltage at S1.
Fig. 17. Waveforms of current and voltage at D1.
ACKNOWLEDGMENT
With the obtained results it can be conclude that the best
option to implement the single-stage single-phase buck-boost
inverter is the utilization of the diode-MOSFET series
association.
The authors would like to thank FAPESP, CAPES and
CNPq for the financial support given to the development of
this work.
V. COMPARISSION WITH OTHER TOPOLOGIES
References [2-6] are proposals of single-stage inverters
intended for low power distributed generators. Table III list
some comparative parameters of these converters, the
Author
or Ref.
Proposal
Input
Voltage
range
Wide
Table III
Comparison of the proposed inverter with other topologies
Component count
Reported
η
fS
Power Decoupling
Power
(%)
(kHz)
Tx
L/C S/D
305 W
88.7
48
0
1/1
5/4
Large input capacitor
Large input and
intermediate DC link
capacitor
Large input or intermediate
film capacitors
Connection type and
other features
Stand-alone reported
Two
Stages
34 V – 65 V
1 kW
92
--
0
2/3
5/1
MPPT, Stand-alone
and Grid connected
[2]
34 V – 65 V
500 W
--
30
0
2/3
4/4
[3]
42 V – 81 V
500 W
80
9.6
0
2/3
4/2
Large input capacitor
MPPT, Isolation,
Grid connected only
[4]
Wide
160 W
--
50
2(HF)
1/2
4/4
Small input and
intermediate capacitors
Isolation
[5]
Wide
180 W
86
--
0
1/1
5/5
Large input capacitor
MPPT, Stand-alone
only
[6]
42 V – 81 V
500 W
90
40
0
3/3
4/2
Small input and
intermediate capacitor
Stand-alone only
Stand-alone reported
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