Get Off the Bus and Call A TAXI
Hot Chips Symposium II
August 21, 1990
PAUL SCOTT
Design Engineering Manager
Network Products Division
Advanced Micro Devices
TAXI and TAXJchIp are trademarks of Advanced Micro Devices, Inc.
GET OFF THE BUS AND CALL A TAXI
BUS INTERCONNECTS CAUSE ·COMMUNICATION BOTILE-NECKS
TAXI™ LINKS CREATE PRIVATE SERIAL DATA CHANNELS
OllER UNTS
I/O
ｾＭ
Oll-ER UNrTS
AMD
___________J
P. Scott 8/90
PRIVATE SERIAL LINK
SYSTEM ARCHITECTURE COMPATIBILITY
SERIAL LINK BANDWIDTH
INTEGRATION OF CLOCK GENERATION & RECOVERY
MANY DATA TRANSMISSION RATES
APPROPRIATE INTERCONNECT MEDIA & INTERFACE
TECHNOLOGY FOR CHIP DESIGN & MANUFACTURE
MINIMUM BOARD SPACE REQUIREMENT
ｄｍａＭ Ｍ Ｍ Ｍ ｾ
ｰｾＭ Ｍ
ＢＧＰＹＱ Ｘｾｴ ｯＭ｣ｓ
TAXlchipTM SYSTEM BLOCK DIAGRAM
ｾｳｹｮ｣ｨｲｯｮ ｵｳ
Iransparent
ｾｭｩｴ ･ｲＯｒ･｣ ｩｶ･ｲ
interface
Paralel Output
Parallel Input
O!
ｴＭｾｉｃ
__"
.
ｾ
Serial Transmission Link·
w
w
ｾ
z
o
t;c{S
0<2
I0t:i
ｾ
'" : 8. 'I OR I: I!llTS
tJl • N : '2
TRANSMfTTER
SERIAL RATE ｾ
ｾ
ＵＲＱｾ ｬｐ ｊｭａ
ｾｭａ
ｄｍａＭ Ｍ Ｍ Ｍ ｾ
uo
2l»2tiD
BJ..6t1J
Am7QS.W-Itia)
lCJ»o16CXJ
ｾｭａ
Ami'QlWo125
Ami'QlWo1715
AtnJlllPl10159-125
Am}QWo.CJ
Arn19169-2tiD
126-'715
125 (O.I'IJCAO
Am7916/#-2/!l)
AVAILABLE
RECEIVER
ＵＲＱｾ
Ami'W-125
Ami'W-1715
w
o
ｾｭａ
Ｉ｡ｩｴＱｾｭａ
ｾ ｾＭ Ｍ Ｍ
ｗＩｋｉｦｾ
ｗＩｋｉｦｾ
ｗｏｎｾ
ｾｾ
ｾｾ
ＱｑＮＱＹｾ
ＱｑＮＧＹｾ
P Scott 8190
ｾ
TAXI PARALLEL INTERFACE
I
SIMPLE TO USE AS AN OCTAL REGISTER
AUTOMATIC MUX/DEMUX DATA & COMMAND
STROBE ACK
ｾ
ｾ］ ］ ］Ｍｉ
ｾ
ｾ
w
ｾ
ｾ
...--.............-..------.",...........
ｾ
ｔｕｐｾ
lATCH'
ｾ
.. HANDSHAKE
LOGIC
Am7968/69-125
o - 12.5 ｣･ｳＯｾ
m HTERFACE
ASYNC
DECODER
DATA
Of
SYNC INTERFACE
AUTOMATIC
'sm STUFRNG'
CODE VIOLATION IftC>lCATOR
CMD
---------p
ｄｍａＭ Ｍ Ｍ Ｍｾ
ＢＧｾＭＬＮ
-sec-to
TAXI CODES FACILITATE DATA TRANSFERS
ENCODER EFFICIENCY DETERMINES BANDWIDTH REQUIREMENT
'OUT-BAND-SIGNALS' ENHANCE LINK BANDWIDTH
CODE CHARACTERISTICS DEFINE LINK LIMITATIONS
REQUIREMENT
GROUP CODED & NAZI
1
= 'TRANSITION'
0 = 'NO TRANSITION'
RUN LENGTH 4 or LESS
USE 'LOWEST' OFFSET AVAILABLE
NO ALIAS SYNC WITH LEGAL DATA
MAXIMIZE ERROR DETECTION
RESULT
48/58 & 58/68 CODES
$20% OVERHEAD
8, 9, 10 BIT DATA 8YTES
4, 3, 2 BIT COMMAND SYMBOLS
ｾＭａｍｄ
CODES SUPPORT NETWORK STANDARDS
ＭｾｰｓｃｯｴＸＯＹＰ
)
TAXI SERIAL OUTPUT
INTERNAL PLL GENERATES BIT CLOCK FROM EXTERNAL BYTE FREQUENCY
ENCODER ASSURES EFFICIENT DATA TRANSFER WITH HIGH TRANSITION DENSITY
Am7968-125
BVIE
RATE
BULT IN. BYTE RATf XTAL OSC
m COMPA118LE BYTE RA1f INPUT
XTAL
4-12.5 ｃ ･ ｓ Ｏ ｾ
Pll
CLOCK
GENERATOR
ENCODER
AUTOMATICSVNC INSETmON
I
ｌａｾ Ａ ｉﾣＺ
SHIFTER
- - - - - - - - - - - '
_ _T!\XI
__ｔ｟ｾ ｓ ｭ｟ｅｒ
i
I
AMD
ECL 0VTPtJT'S (+Sv REF)
NO EXTERNAL COMPONENTS
J
__ ｾ ｟
ＭＭＭＭｾ
J(D(
----------p-sc-o,.,-,q-ro""
TAXI SERIAL INPUT
INTERNAL PLL SYNCHRONIZES BIT CLOCK WITH INCOMING SERIAL STREAM
DECODER SEPARATES DATA FROM COMMAND AND FLAGS ERRORS
SHIFTER
Am7969-125
PlL
CLOCK
SYNCHRONIZER
NTEGRA1fD PL.L
｟ｾ
....
TAXI RECEIVER
ｾＭ
ｾＯＢ
.--. ﾷＭｾ
DECODER LATCH
DECODER
ＮｾＭ･｣
AMD Ｍ Ｍ ｰ ｓｃＭｏｦｴ ＸｾｲｯＢ
.
I
«J. J26 MI:Jaud
NO EXTERNAL C'CJ##IONENTS
ｾ
JffTER TOLERANCE (4OS/8I1)
AUTOMA71C BYTE FRAMING
DETECTS CODE VICXA110NS
ｾ
TAXI SERIAL INTERFACE
I
ECl lOOK OUTPUTS INTERFACE TO STANDARD OPTICAL MODULES
LOW IMPEDANCE DRIVERS CAN DRIVE lONG TRANSMISSION LINES
OPTICAL
INTERFACE
•' - + - -........--t MODULE
.J..
ｾ .
TAXI
TRANSMITTER
REMOTE
TAXI
RECEIVER
TAXI
TRANSMITTER
5'tIGLE E/tDED
Of
OIFFEREfIITlAL
All COMMON WIRE MEDIA INCI..WING COAX atd M1S7CD PAIR
ＭＭＭＭｾ
AMD Ｍ Ｍ Ｍ ｐ Ｕ｣ＭｏＬＮＭ ｾﾷＢＬ
TAXI SERIAL INTERFACE
DIFFERENTIAL INPUT COMPATIBLE WITH STANDARD OPTICAL MODULES
HIGH SENSITIVITY AND WIDE COMMON MODE RANGE ENCOURAGE WIRE INTERCONNECT
TAXI
RECEIVER
OPTICAL
INTERFACE
MODULE
*
TAXI
RECEIVER
REMOTE
DRIVER
aE-WAYtJI
ｾＭ Ｍ Ｍ Ｍ Ｍ Ｍ
==
Ｇｍｓ ｟ｌａｉｦ ｾ ｪ
AMD
__
IRIDGE
....,,)
p
ｓｃｯｾ
8.90
LINK LENGTH LIMIT
BANDWIDTH LIMITED LINKS (COAX) CAUSE JITIER IN NORMAL DATA
JITIER LIMITS THE LINK LENGTH BEFORE THE AMPLITUDE LIMIT
NRZ
BIT STREAM
1
000
DELAY (NOT JITTER)
ｾＭ Ｍ Ｍ Ｍ Ｍ Ｍ
AMD
-----------p-sco-,,-tj:x>-..,
TAXlchip LINE LENGTH
TRANSMISSION UNE CHARACTERISTICS UMIT LENGTH
EACH TYPE HAS DIFFERENT ECONOMIC & PERFORMANCE TRADEOFFS
150 .
125 .
:0ｾ
ｾ
w
ｾ
a:
e(
t-
100
90
80.
70
60
50.
e(
o
40
30
100
200
MAXIMUM
300
COAX
/UNCOMPENSATED
Ｍｾ
400
LENGTH
JITTER BOUNDED
AMD Ｍ Ｍ Ｍ ｐ ｾ Ｎ
500
600
(tt)
Llt.t/Tl
ｓｃｾｯＭｴ ＸＡ Ｑ ＯＹＰｾ
TAXlchip POWER BUS PARTITION
TTL & ECL I/O NOISE ISOLATED FROM CORE BY BUS SEPARATION
INTERFACES BETWEEN I/O AND INTERNAL LOGIC & PLL ARE DIFFERENTIAL
INTERNAL CURRENT TRANSIENTS CREATE NOISE VOLTAGES IN LEAD INDUCTANCE
CML AND PLL CIRCUITS CAUSE MINIMAL INTERNAL NOISE
vee
vee
GND
GND
vee
vee
vee
GND
GND
. . . . . - ---------AMD Ｍ Ｍ Ｍ Ｍ ｾ ＢＡＢ
p Scott 8/90
TAXlchip PRODUCT PARTITION
REDUCE DATA CORRUPTION CAUSED BY CROSSTALK
MINIMIZE INTERFACE DATA RATE
SELECT BLOCKS FOR EFFICIENT, MANUFACTURABLE INTEGRATION
MINIMIZE CHIP COUNT AND INTERFACE PIN COUNT
MUD RATE
L.
UAA1ExN
_ _ _
HOST SPECIFIC LOGIC
HOST SPECIFIC LOGIC
N BYTES
N BYTES
BUS AA1E
N-IBVTESIWORD
ｅｲｙｾ
｟Ｍ Ｍ Ｍｾ
......_---- AMD
::JlllilL
... "," I t ; ·
IWD !WE I 0. • 10
...
)
L-M+2 (BITSJENCOOED BYTE)
p Scott 8/90
•
TAXIchip SERIAL LINK SOLUTIONS
ｾ
FLEXIBLE SYSTEM INTERFACE
DRIVES TRANSMISSION LINES or OPTICAL MODULES
PLLs WITH NO EXTERNAL COMPONENTS
INTERNAL BIT RATE CLOCK GENERATOR
INTEGRATED CLOCK/DATA RECOVERY PLL
WIDE FREQUENCY RANGE
MATURE IC TECHNOLOGY FOR MANUFACTURABILITY
ｄｍａＭ Ｍ Ｍ Ｍ ｾ
ｰｾＭ Ｍ
ＢＮＰＹＯｾＸ ｴｲｯ｣ ｓ
TAXlchip SPEED LIMITS
TAXIs ADDRESS SPECIFIC DATA COMMUNICATION REQUIREMENTS
SPEEDS DEFINED BY INTERFACE LIMITATIONS AND SYSTEM CONVENTIONS
PRODUCTS PARTITIONED FOR COST EFFECTIVE SYSTEM SOLUTIONS
Am79268/2b9
(450-500 ｾ
ｾ
｛ｾﾧｑｉ
115001
Am79G368/369
(10)>1500 Mboud)
Am79168/UR
(200-250 Mboud)
TAXI-125
I
10
I
i
20
50
i
100
[
200
500
1(XX)
TAXI DATA RATE (Mbaud)
ｾＭ Ｍ Ｍ Ｍ ａｍｄ
-------p
.sc-O>t-8/X'"
..