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ELECTRONICS AND COMMUNICATION AND ENGINEERING
ANNA UNIVERSITY ,CHENNAI
REGULATION 2008
II YEAR/IV SEMESTER
EC 2258
LINEAR INTEGRATED CIRCUITS LABORATORY
LAB MANUAL
ISSUE: 01/REVISION: 01
APPROVED BY
B.KARTHIGA
HOD/ECE
PREPARED BY
Arivasanth.M- AP/ECE,
M.Sathiyenthiran- AP/ECE
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Preface
This laboratory manual is prepared by the Department of Electronics and communication
engineering for Circuits and devices Laboratory (EC2258). This lab manual can be used
as
instructional book for students, staff and instructors to assist in performing and understanding the
experiments.. This manual will be available in electronic form from www.Vidyarthiplus.com website
for the betterment of students.
Acknowledgement
We would like to express our profound gratitude and deep regards to the support offered
by the Chairman Shri. A.Srinivasan. We also take this opportunity to express a deep sense of
gratitude to our Principal Dr.B.Karthikeyan,M.E, Ph.D, for his valuable information and
guidance, which helped us in completing this task through various stages. We extend our hearty
thanks to our head of the department B.KARTHIGA, M.E for her constant encouragement and
constructive comments.
Finally the valuable comments from fellow faculty and assistance provided by the
department are highly acknowledged.
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S.No
TOPIC
1. Introduction
2. Syllabus
3. Equipments and Components
PAGE
NO
7
4
5
4. Experiments
Inverting, Non inverting and Differential amplifiers.
1
21
2
3
Integrator and Differentiator.
Active Filter – LPF, BPF,HPF
27
33
4
Square wave generator- Astable multivibrator
41
5
Monostable multivibrator
44
6
IC 555 Timer-Monostable Operation Circuit
47
7
IC 555 Timer-Astable Operation Circuit
51
8
56
9
Schmitt Trigger Circuits- using IC 741 & IC 555
RC phase shift oscillator
10
Wein bridge oscillator
65
11
Frequency multiplier using PLL
68
12
Voltage Regulator using IC723
71
13
Simulation Using ORCAD
76
References
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61
90
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LIST OF EXPERIMENTS
Design and testing of
1. Inverting, Non inverting and Differential amplifiers.
2. Integrator and Differentiator.
3. Instrumentation amplifier
4. Active lowpass, Highpass and bandpass filters.
5. Astable & Monostable multivibrators and Schmitt Trigger using op-amp.
6. Phase shift and Wien bridge oscillators using op-amp.
7. Astable and monostable multivibrators using NE555 Timer.
8. PLL characteristics and its use as Frequency Multiplier.
9. DC power supply using LM317 and LM723.
10. Study of SMPS.
11. Simulation of Experiments 3, 4, 5, 6 and 7 using PSpice netlists.
Note: Op-Amps uA741, LM 301, LM311, LM 324 & AD 633 may be used
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LIST OF EQUIPMENTS AND COMPONENTS
1.
2.
3.
4.
5.
6.
7.
Dual ,(0-30V) variable Power Supply
CRO 30MHz
Digital Multimeter
Function Generator 1 MHz
IC Tester (Analog)
Bread board
Computer (PSPICE installed)
Consumables (Minimum of 25 Nos. each)
1. IC 741
2. IC NE555
3. LED
4. LM317
5. LM723
6. ICSG3524 / SG3525
7. Transistor – 2N3391
8. Diodes, IN4001,BY126
9. Zener diodes
10. Potentiometer
11. Step-down transformer 230V/12-0-12V
12. Capacitor
13. Resistors 1/4 Watt Assorted
14. Single Strand Wire
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THE LABORATORY NOTEBOOK
Each student must have their own laboratory notebook. All pre-lab exercises and
laboratory reports are to be entered into your notebook.Your notebook must be clearly labelled
on the cover with the following information:
Lab Name: Linear Integrated Circuits lab
Name:
Register no:
Class:
Lab Batch Number:
STUDENTS GUIDELINES
There are 3 hours allocated to a laboratory session in LIC lab. It is a necessary part of the course
at which attendance is compulsory. Here are some guidelines to help you perform the
experiments and to submit the reports:
1. Read all instructions carefully and carry them all out.
2. Ask a demonstrator if you are unsure of anything.
3. Record actual results (comment on them if they are unexpected!)
4. Write up full and suitable conclusions for each experiment.
5. If you have any doubt about the safety of any procedure, contact the demonstrator beforehand.
6. Think about what you are doing!
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THE BREADBOARD
The breadboard consists of two terminal strips and two bus strips (often broken in the
centre). Each bus strip has two rows of contacts. Each of the two rows of contacts are a node.
That is, each contact along a row on a bus strip is connected together (inside the breadboard).
Bus strips are used primarily for power supply connections, but are also used for any node
requiring a large number of connections. Each terminal strip has 60 rows and 5 columns of
contacts on each side of the centre gap. Each row of 5 contacts is a node. You will build your
circuits on the terminal strips by inserting the leads of circuit components into the contact
receptacles and making connections with
Incorrect connection of power to the ICs could result in them exploding or becoming very
hot with the possible serious injury occurring to the people working on the experiment! Ensure
that the power supply polarity and all components and connections are correct before switching
on power .
Fig 1. The breadboard. The lines indicate connected holes.
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BUILDING THE CIRCUIT
The steps for wiring a circuit should be completed in the order described below:
1. Turn the power (Trainer Kit) off before you build anything!
2. Make sure the power is off before you build anything!
3. Connect the supply and ground (GND) leads of the power supply to the power and ground bus
strips on your breadboard.
4. Plug the chips you will be using into the breadboard. Point all the chips in the same direction
with pin 1 at the upper-left corner. (Pin 1 is often identified by a dot or a notch next to it on the
chip package)
5. Connect supply and GND pins of each chip to the power and ground bus
strips on the breadboard.
6. Select a connection on your schematic and place a piece of hook-up wire between
corresponding pins of the chips on your breadboard. It is better to make the short connections
before the longer ones. Mark each connection on your schematic as you go, so as not to try to
make the same connection again at a later stage.
7. Get one of your group members to check the connections, before you turn the power on.
8. If an error is made and is not spotted before you turn the power on. Turn the power off
immediately before you begin to rewire the circuit.
9. At the end of the laboratory session, collect you hook-up wires, chips and all equipment and
return them to the demonstrator.
10. Tidy the area that you were working in and leave it in the same condition as it was before
you started.
Common Causes of Problems:
1. Not connecting the ground and/or power pins for all chips.
2. Not turning on the power supply before checking the operation of the circuit.
3. Leaving out wires.
4. Plugging wires into the wrong holes.
5. Driving a single gate input with the outputs of two or more gates
6. Modifying the circuit with the power on.
In all experiments, you will be expected to obtain all instruments, leads, components at
the start of the experiment and return them to their proper place after you have finished the
experiment. Please inform the demonstrator or technician if you locate faulty equipment. If you
damage a chip, inform a demonstrator, don't put it back in the box of chips for somebody else to
use.
STUDY OF OP AMPS - IC 741, IC 555, IC 565, IC 566 AND VOLTAGE REGULATOR
IC 723
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FUNCTIONING, PARAMETERS AND SPECIFICATIONS
IC 741 :
General Description:
The IC 741 is a high performance monolithic operational amplifier constructed using the
planer epitaxial process. High common mode voltage range and absence of latch-up tendencies
make the IC 741 ideal for use as voltage follower. The high gain and wide range of operating
voltage provide superior performance in integrator, summing amplifier and general feed back
applications.
Block Diagram of Op-Amp:
Pin Configuration:
Features:
1. No frequency compensation required.
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2. Short circuit protection
3. Offset voltage null capability
4. Large common mode and differential voltage ranges
5. Low power consumption
6. No latch-up
Specifications:
1. Voltage gain A = α typically 2,00,000
2. I/P resistance RL = α Ω, practically 2MΩ
3. O/P resistance R =0, practically 75Ω
4. Bandwidth = α Hz. It can be operated at any frequency
5. Common mode rejection ratio = α
(Ability of op amp to reject noise voltage)
6. Slew rate + α V/μsec
(Rate of change of O/P voltage)
7. When V1 = V2, VD=0
8. Input offset voltage (Rs ≤ 10KΩ) max 6 mv
9. Input offset current = max 200nA
10. Input bias current : 500nA
11. Input capacitance : typical value 1.4pF
12. Offset voltage adjustment range : ± 15mV
13. Input voltage range : ± 13V
14. Supply voltage rejection ratio : 150 μV/V
15. Output voltage swing: + 13V and – 13V for RL > 2KΩ
16. Output short-circuit current: 25mA
17. supply current: 28mA
18. Power consumption: 85mW
19. Transient response: rise time= 0.3 μs, Overshoot= 5%
Applications:
1. AC and DC amplifiers
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2. Active filters
3. Oscillators
4. Comparators
5. Regulators
IC 555:
Description:
The operation of SE/NE 555 timer directly depends on its internal function. The three
equal resistors R1, R2, R3 serve as internal voltage divider for the source voltage. Thus one-third
of the source voltage VCC appears across each resistor.
Comparator is basically an Op amp which changes state when one of its inputs exceeds
the reference voltage. The reference voltage for the lower comparator is +1/3 VCC. If a trigger
pulse applied at the negative input of this comparator drops below +1/3 VCC, it causes a change
in state. The upper comparator
is referenced at voltage +2/3 VCC.
The output of each
comparator is fed to the input terminals of a flip flop.
The flip-flop used in the SE/NE 555 timer IC is a bistable multivibrator. This flip flop
changes states according to the voltage value of its input. Thus if the voltage at the threshold
terminal rises above +2/3 VCC, it causes upper comparator to cause flip-flop to change its states.
On the other hand, if the trigger voltage falls below +1/3 VCC, it causes lower comparator to
change its states. Thus the output of the flip flop is controlled by the voltages of the two
comparators. A change in state occurs when the threshold voltage rises above +2/3 VCC or when
the trigger voltage drops below +1/3 Vcc.
The output of the flip-flop is used to drive the discharge transistor and the output stage.
A high or positive flip-flop output turns on both the discharge transistor and the output stage.
The discharge transistor becomes conductive and behaves as a low resistance short circuit to
ground. The output stage behaves similarly. When the flip-flop output assumes the low or zero
states reverse action takes place i.e., the discharge transistor behaves as an open circuit or
positive VCC state. Thus the operational state of the discharge transistor and the output stage
depends on the voltage applied to the threshold and the trigger input terminals.
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Block Diagram of IC 555:
Pin Configuration:
Function of Various Pins of 555 IC:
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Pin (1) of 555 is the ground terminal; all the voltages are measured with respect to this pin.
Pin (2) of 555 is the trigger terminal, If the voltage at this terminal is held greater than one-third
of VCC, the output remains low. A negative going pulse from Vcc to less than Vec/3 triggers the
output to go High. The amplitude of the pulse should be able to make the comparator (inside the
IC) change its state. However the width of the negative going pulse must not be greater than the
width of the expected output pulse.
Pin (3) is the output terminal of IC 555. There are 2 possible output states. In the low output
state, the output resistance appearing at pin (3) is very low (approximately 10 Ω). As a result the
output current will goes to zero , if the load is connected from Pin (3) to ground , sink a current I
Sink
(depending upon load) if the load is connected from Pin (3) to ground, and sinks zero current
if the load is connected between +VCC and Pin (3).
Pin (4) is the Reset terminal. When unused it is connected to +Vcc. Whenever the potential of
Pin (4) is drives below 0.4V, the output is immediately forced to low state. The reset terminal
enables the timer over-ride command signals at Pin (2) of the IC.
Pin (5) is the Control Voltage terminal.This can be used to alter the reference levels at which the
time comparators change state. A resistor connected from Pin (5) to ground can do the job.
Normally 0.01μF capacitor is connected from Pin (5) to ground. This capacitor bypasses supply
noise and does not allow it affect the threshold voltages.
Pin (6) is the threshold terminal. In both astable as well as monostable modes, a capacitor is
connected from Pin (6) to ground. Pin (6) monitors the voltage across the capacitor when it
charges from the supply and forces the already high O/p to Low when the capacitor reaches +2/3
VCC.
Pin (7) is the discharge terminal. It presents an almost open circuit when the output is high and
allows the capacitor charge from the supply through an external resistor and presents an almost
short circuit when the output is low.
Pin (8) is the +Vcc terminal. 555 can operate at any supply voltage from
+3 to +18V.
Features of 555 IC
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1. The load can be connected to o/p in two ways i.e. between pin 3 & ground 1 or
between pin 3 & VCC (supply)
2. 555 can be reset by applying negative pulse, otherwise reset can be connected to +Vcc to
avoid false triggering.
3. An external voltage effects threshold and trigger voltages.
4. Timing from micro seconds through hours.
5. Monostable and bistable operation
6. Adjustable duty cycle
7. Output compatible with CMOS, DTL, TTL
8. High current output sink or source 200mA
9. High temperature stability
10. Trigger and reset inputs are logic compatible.
Specifications:
1. Operating temperature
:
SE 555-- -55oC to 125oC
NE 555--
0o to 70oC
2. Supply voltage
:
+5V to +18V
3. Timing
:
μSec to Hours
4. Sink current
:
200mA
5. Temperature stability
:
50 PPM/oC change in temp or 0-005% /oC.
Applications:
1. Monostable and Astable Multivibrators
2. dc-ac converters
3. Digital logic probes
4. Waveform generators
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5. Analog frequency meters
6. Tachometers
7. Temperature measurement and control
8. Infrared transmitters
9. Regulator & Taxi gas alarms etc.
IC 565:
Description:
The Signetics SE/NE 560 series is monolithic phase locked loops. The SE/NE 560, 561,
562, 564, 565, & 567 differ mainly in operating frequency range, power supply requirements and
frequency and bandwidth adjustment ranges. The device is available as 14 Pin DIP package and
as 10-pin metal can package. Phase comparator or phase detector compare the frequency of
input signal fs with frequency of VCO output fo and it generates a signal which is function of
difference between the phase of input signal and phase of feedback signal which is basically a
d.c voltage mixed with high frequency noise. LPF remove high frequency noise voltage. Output
is error voltage. If control voltage of VCO is 0, then frequency is center frequency (fo) and mode
is free running mode. Application of control voltage shifts the output frequency of VCO from fo
to f. On application of error voltage, difference between fs & f tends to decrease and VCO is said
to be locked. While in locked condition, the PLL tracks the changes of frequency of input signal.
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Block Diagram of IC 565
Pin Configuration:
Specifications:
1. Operating frequency range
2. Operating voltage range
:
:
0.001 Hz to 500 KHz
±6 to ±12V
3. Inputs level required for tracking :
10mV rms minimum to 3v (p-p) max.
4. Input impedance
:
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10 KΩ typically
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5. Output sink current
:
1mA typically
6. Drift in VCO center frequency
:
300 PPM/oC typically
:
1.5%/V maximum
(fout) with temperature
7. Drif in VCO centre frequency with
supply voltage
8. Triangle wave amplitude
:
typically 2.4 VPP at ± 6V
9. Square wave amplitude
:
typically 5.4 VPP at ± 6V
10. Output source current
:
10mA typically
11. Bandwidth adjustment range
:
<±1 to >± 60%
Center frequency fout = 1.2/4R1C1 Hz
= free running frequency
FL = ± 8 fout/V Hz
V = (+V) – (-V)

fL
fc = ± 
3
 2 (3.6) x10 xC 2
1 / 2
Applications:
1. Frequency multiplier
2. Frequency shift keying (FSK) demodulator
3. FM detector
IC 566:
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Description:
The NE/SE 566 Function Generator is a voltage controlled oscillator of exceptional
linearity with buffered square wave and triangle wave outputs. The frequency of oscillation is
determined by an external resistor and capacitor and the voltage applied to the control terminal.
The oscillator can be programmed over a ten to one frequency range by proper selection of an
external resistance and modulated over a ten to one range by the control voltage with exceptional
linearity.
Block Diagram of IC566
Pin diagram:
Specifications:
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Maximum operating Voltage ---
26V
Input voltage
---
Storage Temperature
Operating temperature
---
3V (P-P)
-65oC to + 150oC
---
0oC to +70oC for NE 566
-55oC to +125oC for SE 566
Power dissipation
---
300mv
Applications:
1. Tone generators.
2. Frequency shift keying
3. FM Modulators
4. clock generators
5. signal generators
6. Function generator
IC723
Pin Configuration
Specifications of 723:
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Power dissipation
:
1W
Input Voltage
:
9.5 to 40V
Output Voltage
:
2 to 37V
Output Current
:
150mA for Vin-Vo = 3V
10mA for Vin-Vo = 38V
Load regulation
:
0.6% Vo
Line regulation
:
0.5% Vo
DESIGN OF INVERTING, NON INVERTING AND DIFFERENTIAL AMPLIFIERS
EX.NO: 1
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DATE:
AIM:
To design and construct a inverting, non- inverting and differential amplifiers.
APPARATUS REQUIRED:
S.NO
1.
2.
3.
4.
5.
6.
7.
DESCRIPTION
Resistor
Op-amp
Dual RPS
AFO
CRO
Bread board
Connecting wires
RANGE
QUANTITY
10kΩ
IC741
(0-30)v
-
5
1
1
2
1
1
As
required
THEORY:
INVERTING AMPLIFIER:
This is the most widely used op-amp. Here, the output voltage Vo is feedback to the
inverting input terminal through the Rf – R1 network. The negative sign in gain indicates the
phase shift of 180ο.
NON - INVERTING AMPLIFIER:
If signal is applied to the non-inverting input terminal of op-amp without inverting the
input signal such a circuit is called non-inverting amplifier. Here the output is feedback to the
inverting input terminal. The phase shift of input signal does not occur in non-inverting terminal.
DIFFERENTIAL AMPLIFIER
A circuit that amplifies that amplifies the difference between two input signals is called
as differential amplifier. It is useful in instrumentation amplifier. If the two input signals are the
same, the output should be zero.
DESIGN:
Inverting amplifier:
A = -Rf/R1
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Take A = 1
Rf = R1
Choose Rf = 10kΩ, R1=10kΩ
Non inverting amplifier:
A = 1+ Rf/R1
Take A = 2
Rf = R1
Choose Rf = 10kΩ, R1=10kΩ
Differential amplifier
a) In common mode
V1 = V2 = V
Vc =
𝑉1+𝑉2
𝑉0
2
=V
Ac = 𝑉𝑐
Vd = V1-V2 =V-V =0
b) In difference mode
V1 = -V2 = V
Vd = V1-V2 = V+V =2V
𝑉0
Ad = 𝑉𝑑
Vc =
𝑉1+𝑉2
2
=
𝑉−𝑉
2
=0
CIRCUIT DIAGRAM:
INVERTING AMPLIFIER
Rf
R1
Vin
+Vcc
2 _
3
7
741
6
V0
+
4
-Vcc
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NON-INVERTING AMPLIFIER
Rf
+Vcc
R1
2 _
7
741
3
6
V0
+
4
-Vcc
Vin
DIFFERENTIAL AMPLIFIER
MODEL GRAPH:
Inverting Amplifier
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Non inverting Amplifier:
TABULATION:
INVERTING AMPLIFIER:
S.NO
Vin
Vo = Vin(-Rf/R1)
Theoretical
practical
Gain = Vo/Vin
Vo = Vin(1+Rf/R1)
Theoretical
practical
Gain = Vo/Vin
NON- INVERTING AMPLIFIER:
S.NO
Vin
DIFFERENTIAL AMPLIFIER
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Mode of operation
Vin
Vout
Gain
CMRR
PROCEDURE:
Inverting and Non-inverting amplifier:
1. Connections are made as per the circuit diagram.
2. Apply the input voltage using AFO or RPS.
3. The output is noted and plots the graph.
4. Then calculate the gain value.
Differential amplifier
1. Connections are made as per the circuit diagram
2. For the common mode operation of the differential amplifier, apply the same input
voltage to the both the input terminals.
3. Note down the output voltage
4. For the differential mode operation of the differential amplifier, apply the same input
voltage to the opposite voltages the input terminals.
5. Measure the output voltage
6. Calculate the difference mode gain
7. Calculate the CMRR
Applications:
1. If multiple inputs are used along with non-inverting amplifier it leads to R- 2R ladder(D-A
converter).
Viva questions and answers:
1. Mention some of the linear applications of op – amps :
Adder, subtractor, voltage –to- current converter, current –to- voltage converters,
instrumentation amplifier, analog computation ,power amplifier, etc are some of the
linear op-amp circuits.
2. Mention some of the non – linear applications of op-amps:
Rectifier, peak detector, clipper, clamper, sample and hold circuit, log amplifier, anti –log
amplifier, multiplier are some of the non – linear op-amp circuits.
3. What are the areas of application of non-linear op- amp circuits:
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

Industrial instrumentation
Signal processing
4. What does 74LS refers to:
74-refers to IC which can be used for commercial purpose.LS-Low Power Schottky.
5. What is Linear IC?
IC which accepts, process and produce analog signal is called linear IC .Eg:IC741,IC555.
6. Define CMRR
Common mode rejection ratio-it is defined as the ratio between the differential mode gain
to the common mode gain
INTEGRATOR AND DIFFERENTIATOR USING OP-AMP
EX.NO: 2
DATE:
AIM:
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To design and test the performance of integrator and differentiator circuits using
Op-amp.
APPARATUS REQUIRED:
S.NO
1.
2.
3.
4.
5.
6.
7.
8.
DESCRIPTION
Signal generator
CRO
Resistors
Capacitor
Op-amp
Breadboard
Dual power supply
Connecting wires
RANGE
1K, 10K
0.1F
IC741
QUANTITY
1
1
1
1
1
1
1
AS REQURIED
THEORY:
Integrator:
In an integrator circuit, the output voltage is integral of the input signal.
The output
t
voltage of an integrator is given by Vo = -1/R1Cf
 Vidt
o
At low frequencies the gain becomes infinite, so the capacitor is fully charged and behaves like an open
circuit. The gain of an integrator at low frequency can be limited by connecting a resistor in shunt with
capacitor.
Differentiator:
In the differentiator circuit the output voltage is the differentiation of the input
voltage. The output voltage of a differentiator is given by Vo = -RfC1
dVi
.The input impedance of this
dt
circuit decreases with increase in frequency, thereby making the circuit sensitive to high frequency noise.
At high frequencies circuit may become unstable.
DESIGN:
INTEGRATOR:
Given :
R1= 10 K ; f= 4 kHz
Cf = 1/ (2πRf)
Rf = 10 R
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= 10 * 10 K = 100 K
Cf = 1/ (2π * 103*10*4*103)
= 0.039 µf
DIFFERENTIATOR:
Given:
C1 = 1 µf ; f1 = 150 kHz
Rf = 1/ (2πC1f1)
= 1/ (2*3.14*1*10-6*150)
Rf = 1.06 K
Cf = R1C1/Rf
= 1.06*10-3*0.1*10-6
10.6 * 103
Cf = 0.01 µf
Rf = 100K
INTEGRATOR
Cf= 0.03F
10K
+Vcc=12V
2
7
-
R1
3
IC741
+
+
Vin
4
CRO
-
-Vee=-12V
R
10k
DIFFERENTIATOR
Rf = 1.06K
1.06 K 
0.1 F
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0.01 F
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2
7
-
3
IC741
+
4
AFO
O
CRO
-Vee=-12V
1k
MODEL GRAPH:
DIFFERENTIATOR
Vi
t (msec)
Vo
t(msec)
INTEGRATOR
Vi
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t (msec)
Vo
t(msec)
TABULATION:
INTEGRATOR:
PARAMETER
THEORITICAL
PRACTICAL
THEORITICAL
PRACTICAL
1. Frequency
2. I/P time period
3. O/P time period
4. I/P Amplitude
5. O/P Amplitude
DIFFERENIATOR:
PARAMETER
1. Frequency
2. I/P time period
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3. O/P time period
4. I/P Amplitude
5. O/P Amplitude
PROCEDURE:
Integrator:
1. Connections are made as per the circuit diagram.
2. Apply the square or sine input signal at high frequency using AFO.
3. Note the corresponding output waveforms and plot the graph.
Differentiator:
1. Connections are made as per the circuit diagram.
2. Apply the square or sine input signal at low frequency using AFO.
3. Note the corresponding output waveforms and plot the graph.
Applications:
1.The DC voltage produced by the differentiator circuit could be used to drive a comparator
which would signal as alarm or active a control if the rate of change exceeded a pre-set level.
2.Waveform Generators
Viva questions and answers:
1.What are the limitations of the basic differentiator circuit:
At high frequency, a differentiator may become unstable and break into oscillations. The
input impedance decreases with increase in frequency , thereby making the circuit sensitive to
high frequency noise.
2.Write down the condition for good differentiation :For good differentiation, the time period of the input signal must be
greater than or equal to Rf C1 ,T > R f C1 Where, Rf is the feedback resistance
3.What is an IC:
The term IC refers to complex Electronic circuits consisting of a large number of
components on a single substrate.
4.What are the advantage of IC:
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Cost reduction,Increased operating speed,Reduced power consumption and Improved
functional performance.
5.What are the different IC technologies:
Monolithic technology and Hybrid technology
Active Filter – LPF, HPF,BPF
EX.NO: 3
DATE:
AIM:
To design and obtain the frequency response of
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i)
First order Low Pass Filter (LPF)
ii)
First order High Pass Filter (HPF)
iii)
Band pass filter
APPARATUS REQUIRED:
S.NO
DESCRIPTION
1
IC 741
2
Resistors
Variable Resistor
RANGE
QUANTITY
1
10k ohm
20kΩ pot
3
1
3
Capacitors
0.01μf
1
4
Cathode Ray Oscilloscope
(0 – 20MHz)
1
5
Regulated Power supply
(0 – 30V),1A
1
6
Function Generator
(1Hz – 1MHz)
1
THEORY:
a) LPF:
A LPF allows frequencies from 0 to higher cut of frequency, fH. At fH the gain is 0.707
Amax, and after fH gain decreases at a constant rate with an increase in frequency. The gain
decreases 20dB each time the frequency is increased by 10. Hence the rate at which the gain
rolls off after fH is 20dB/decade or 6 dB/ octave, where octave signifies a two fold increase in
frequency. The frequency f=fH is called the cut off frequency because the gain of the filter at this
frequency is down by 3 dB from 0 Hz. Other equivalent terms for cut-off frequency are -3dB
frequency, break frequency, or corner frequency.
b) HPF:
The frequency at which the magnitude of the gain is 0.707 times the maximum value of
gain is called low cut off frequency. Obviously, all frequencies higher than fL are pass band
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frequencies with the highest frequency determined by the closed –loop band width all of the opamp.
c) BAND PASS FILTER:
A band pass filter has a pass band between two cutoff frequencies fH and fL such that fH >
fL. Any input frequency outside this pass band is attenuated. There are two types of band-pass
filters. Wide band pass and Narrow band pass filters. We can define a filter as wide band pass if
its quality factor Q <10. If Q>10, then we call the filter a narrow band pass filter. A wide band
pass filter can be formed by simply cascading high-pass and low-pass sections. The order of
band pass filter depends on the order of high pass and low pass sections.
CIRCUIT DIAGRAM:
Fig 1: Low pass filter
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Fig 2: High pass filter
Fig 3:Wide band pass filter
DESIGN:
First Order LPF: To design a Low Pass Filter for higher cut off frequency fH = 4 KHz and pass
band gain of 2
fH = 1/( 2πRC )
Assuming C=0.01 µF, the value of R is found from
R= 1/(2πfHC) Ω =3.97KΩ
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The pass band gain of LPF is given by AF = 1+ (RF/R1)= 2
Assuming R1=10 KΩ, the value of RF is found from
RF=( AF-1) R1=10KΩ
First Order HPF: To design a High Pass Filter for lower cut off frequency
fL = 4 KHz and
pass band gain of 2
fL = 1/( 2πRC )
Assuming C=0.01 µF,the value of R is found from
R= 1/(2πfLC) Ω =3.97KΩ
The pass band gain of HPF is given by AF = 1+ (RF/R1)= 2
Assuming R1=10 KΩ, the value of RF is found from
RF=( AF-1) R1=10KΩ
Band pass filter: To design a band pass filter having fH = 4KHz and
fL = 400Hz and pass
band gain of 2.
As shown in Fig ,the first section consisting of Op Amp,RF,R1,R and C is the high pass filter and
second consisting of low pass filter. The design of low pass and high pass filters.
Low Pass Filter Design:
Assuming C’=0.01μf, the value of R’ is found from
R’ = 1/(2πfH C’) Ω =3.97KΩ
The pass band gain of LPF is given by ALPF = 1+ (R’ F / R’1 )=2
Assuming R’1=5.6 KΩ, the value of R’F is found from R’F =( AF-1) R’1=5.6KΩ
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High Pass Filter Design:
Assuming C=0.01μf, the value of R is found from
R = 1/(2πfLC) Ω =39.7KΩ
The pass band gain of HPF is given by AHPF = 1+ (RF / R1 )=2
Assuming R1=5.6 KΩ, the value of RF is found from
RF = ( AF-1) R1=5.6KΩ
Model graphs :
Frequency response characteristics of LPF
Frequency response characteristics of HPF
Band pass filter
TABULAR FORM :
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a)LPF
b) HPF
Input voltage Vin = 0.5V
O/P
Voltage Gain
Frequency Voltage(V)
indB
Gain
Frequency
O/P
Voltage
Voltage(V)
Gain
indB
Gain
Vo/Vi
Vo/Vi
C)Bandpass filter
Frequeny
O/P
Gain
Gain
Voltage
Vo/Vi
indB
Vo(V)
PROCEDURE:
First Order LPF
1. Connections are made as per the circuit diagram
2. Apply sinusoidal wave of constant amplitude as the input such that op-amp does not go into
saturation.
3. Vary the input frequency and note down the output amplitude at each step as shown in Table
4. Plot the frequency response
First Order HPF
1.
Connections are made as per the circuit diagrams
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2.
Apply sinusoidal wave of constant amplitude as the input such that op-amp does not go into
saturation.
3.
Vary the input frequency and note down the output amplitude at each step as shown in Table
4.
Plot the frequency response
Band pass filter:
1. Connect the circuit as per the circuit diagram shown in Fig
2. Apply sinusoidal wave of 0.5V amplitude as input such that opamp does not go into
saturation (depending on gain).
3. Vary the input frequency from 100 Hz to 100 KHz and note down the output amplitude at
each step as shown in Table.
4. Plot the frequency response
Viva questions and answers:
1.
What is the relation between fC & fH, fL?
fC 
2.
fH fL
How do you increase the gain of the wideband pass filter?
By increasing the gain of either LPF or HPF
3. What is the difference between active and passive filters?
Active filters use Op Amp as active element, and resistors and capacitors as the passive
elements.
4. What is the effect of order of the filter on frequency response characteristics?
Each increase in order will produce -20 dB/decade additional increases in roll off rate.
5 .What modifications in circuit diagrams require to change the order of the filter?
Order of the filter is changed by RC network.
SQUARE WAVE GENERATOR-ASTABLE MULTIVIBRATOR
EX.NO: 4
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DATE:
AIM:
To design a square wave generator circuit for the frequency of Oscillations of 1KHZ
APPARATUS REQUIRED:
S.NO
DESCRIPTION
1
OP-AMP
2
Resistor
RANGE
IC741
4.7K,
QUANTITY
1
1
1K
1
1.16K
1
0.1F
1
3
Capacitor
4
CRO
-
1
5
RPS
DUAL(0-30) V
1
THEORY:
A simple op-Amp square wave generator is also called as free running oscillator, the
principle of generation of square wave output is to force an op-amp to operate in the saturation
region . A fraction =R2/(R1+R2) of the output is fed back to the (+) input terminal. The output
is also fed to the (-) terminal after integrating by means of a low pass Rc combination in astable
multivibrator both the states are quasistables. The frequency is determined by the time taken by
the capacitor to charge from- Vsat to+Vsat.
DESIGN:
F=1KHZ =T=1ms
R2=1K,C=0.1F
R1=1.16R2=1.16K1K+100
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T=2RC
R=T/2C =5K
4.7K
CIRCUIT DIAGRAM:
MODEL GRAPH
+ Vcc
+Vsat
Vsat
- Vsat
-Vsat
- Vee
PROCEDURE:
1. The connection is given as per the circuit diagram
2. Connect the CRO in the output and trace the square waveform.
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3. Calculate the practical frequency and compare with the theoretical Frequency.
4. Plot the waveform obtained and mark the frequency and time period.
MONOSTABLE MULTIVIBRATOR USING IC 741
EX.NO: 5
DATE:
AIM:
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To construct monostable mutivibrator using IC741
APPARATUS REQUIRED:
S.NO
DESCRIPTION
1
Regulated variable Power Supply
RANGE
(0-30)V
QUANTITY
2
2
Function generator
1MHz
1
3
CRO
30MHz
1
4
Resistors
15KΩ,10KΩ
Each two
5
Capacitor
0.1μF
2
6
Op-amp
IC 741
1
7
Diode
BY 127
2
8
Bread board
-
1
9
Connecting wires
-
As required
DESIGN CALCULATION
Vcc = 10V,Vsat = 10V,pulse width T= 1ms
1. To find R1 and R2
𝑅2
𝑅1
= 0.86 choose R1 = 10KΩ
𝛽=
𝑅2
𝑅1+ 𝑅2
Assume R1= R2, 𝛽 = 0.5
2. To find charging period of capacitor
𝑉𝑠𝑎𝑡
T = R * C ln (
𝑉𝑠𝑎𝑡 −𝑉𝑡
)
We know that
Vt
= Vsat*
𝑅2
where Vsat = 12V and substitute Vt in T , we get
𝑅1 + 𝑅2
𝑅
T = R * C ln (1 + 𝑅2 ) take R2 = R1
1
T = 0.69 R * C
Choose T = 1 ms,C = 0.1μF
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Find out the value of R
THEORY
It is also known as one shot multivibrator. It generates a single pulse of specified duration
in response to each external trigger signal. A monostable multivibrator exits only one stable
state. Application of a trigger causes a change to the quasistable state. The circuit remains in a
quasistable state for a fixed interval of time and then reverts to its original stable state. An
internal trigger signal is generated which produces the transition to the stable state. Usually, the
charging and discharging of a capacitor provides this internal trigger signal.
CIRCUIT DIAGRAM
D3
R5
10k
D1N4007
D2
R2
12k
D1N4007
C1
0.1u
V1
12v
0
0
2
V-
4
U1
-
OS1
OS2
6
5
7
+
V+
OUT
3
AD741
1
V2
12v
R3
10k
0
D1
C2
0.1u
D1N4007
R4
CLK
3.3k
R1
DSTM1
1k
0
0
PROCEDURE
1. Connect the circuit as per the circuit diagram
2. Switch on the power supply and apply trigger pulse at the second pin of op-amp
3. Measure the output waveform in the CRO
4. Measure the voltage across the capacitor, an exponentially rising and falling wave
between 5V and 10V is noted.
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IC 555 TIMER-MONOSTABLE OPERATION CIRCUIT
EX.NO: 6
DATE:
AIM:
To generate a pulse using Monostable Multivibrator by using IC555
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APPARATUS REQUIRED:
S.NO
DESCRIPTION
RANGE
QUANTITY
1
555 IC
1
2
Capacitors
0.1μf,0.01μf
Each one
3
Resistor
10kΩ
1
4
Regulated Power supply
(0 – 30V),1A
1
5
Function Generator
(1HZ – 1MHz)
1
6
Cathode ray oscilloscope
(0 – 20MHz)
1
THEORY:
A Monostable Multivibrator, often called a one-shot Multivibrator, is a pulse-generating
circuit in which the duration of the pulse is determined by the RC network connected externally
to the 555 timer. In a stable or stand by mode the output of the circuit is approximately Zero or
at logic-low level. When an external trigger pulse is obtained, the output is forced to go high ( 
VCC). The time for which the output remains high is determined by the external RC network
connected to the timer. At the end of the timing interval, the output automatically reverts back to
its logic-low stable state. The output stays low until the trigger pulse is again applied. Then the
cycle repeats. The Monostable circuit has only one stable state (output low), hence the name
monostable. Normally the output of the Monostable Multivibrator is low.
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CIRCUIT DIAGRAM:
Fig 1: Monostable Circuit using IC555
DESIGN:
Consider VCC = 5V, for given tp
Output pulse width tp = 1.1 RA C
Assume C in the order of microfarads & Find RA
Typical values:
If C=0.1 µF , RA = 10k then tp = 1.1 mSec
Trigger Voltage =4 V
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WAVEFORMS:
Fig (a): Trigger signal
(b): Output Voltage
(c): Capacitor Voltage
Sample Readings:
Trigger
Output wave
Capacitor output
PROCEDURE:
1. Connect the circuit as shown in the circuit diagram.
2. Apply Negative triggering pulses at pin 2 of frequency 1 KHz.
3. Observe the output waveform and measure the pulse duration.
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4. Theoretically calculate the pulse duration as Thigh=1.1. RAC
5. Compare it with experimental values.
Viva Questions & Answers:
1. Is the triggering given is edge type or level type? If it is edge type, trailing or raising edge?
Edge type and it is trailing edge
2. What is the effect of amplitude and frequency of trigger on the output?
Output varies proportionally.
3. How to achieve variation of output pulse width over fine and course ranges?
One can achieve variation of output pulse width over fine and course ranges
by
varying capacitor and resistor values respectively
4. What is the effect of Vcc on output?
The amplitude of the output signal is directly proportional to Vcc
5. What are the ideal charging and discharging time constants (in terms of R and C) of capacitor
voltage?
Charging time constant T=1.1RC Sec
Discharging time constant=0 Sec
6. What is the other name of monostable Multivibrator? Why?
i) Gating circuit .It generates rectangular waveform at a definite time and thus could be
used in gate parts of the system.
ii) One shot circuit. The circuit will remain in the stable state until a trigger pulse is
received. The circuit then changes states for a specified period, but then it returns to the
original state.
7. What are the applications of monostable Multivibrator?
Missing Pulse Detector, Frequency Divider, PWM, Linear Ramp Generator
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IC 555 TIMER - ASTABLE OPERATION CIRCUIT
EX.NO: 7
DATE:
AIM:
To generate unsymmetrical square and symmetrical square waveforms using
IC555.
APPARATUS REQUIRED:
S.NO
DESCRIPTION
RANGE
QUANTITY
1
IC 555
1
2
Resistors
3.6kΩ,7.2Kω
Each one
3
Capacitors
0.1μf,0.01μf
Each one
4
Diode
OA79
1
5
Regulated Power supply
(0 – 30V),1A
1
6
Cathode Ray Oscilloscope
(0 – 20MHz)
1
THEORY:
When the power supply VCC is connected, the external timing capacitor ‘C” charges
towards VCC with a time constant (RA+RB) C. During this time, pin 3 is high (≈VCC) as Reset
R=0, Set S=1 and this combination makes Q =0 which has unclamped the timing capacitor ‘C’.
When the capacitor voltage equals 2/3 VCC, the upper comparator triggers the control flip
flop on that Q =1. It makes Q1 ON and capacitor ‘C’ starts discharging towards ground through
RB and transistor Q1 with a time constant RBC. Current also flows into Q1 through RA.
Resistors RA and RB must be large enough to limit this current and prevent damage to the
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discharge transistor Q1. The minimum value of RA is approximately equal to VCC/0.2 where
0.2A is the maximum current through the ON transistor Q1.
During the discharge of the timing capacitor C, as it reaches VCC/3, the lower comparator
is triggered and at this stage S=1, R=0 which turns Q =0. Now Q =0 unclamps the external
timing capacitor C. The capacitor C is thus periodically charged and discharged between 2/3
VCC and 1/3 VCC respectively. The length of time that the output remains HIGH is the time for
the capacitor to charge from 1/3 VCC to 2/3 VCC.
The capacitor voltage for a low pass RC circuit subjected to a step input of V CC volts is
given by VC = VCC [1- exp (-t/RC)]
Total time period T = 0.69 (RA + 2 RB) C
f= 1/T = 1.44/ (RA + 2RB) C
CIRCUIT DIAGRAM:
Fig. 555 Astable Circuit
DESIGN:
Formulae: f= 1/T = 1.44/ (RA+2RB) C
Duty cycle (D) = tc/T = RA + RB/(RA+2RB)
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MODEL CALCULATIONS:
Given f=1 KHz. Assuming c=0.1μF and D=0.25
1 KHz = 1.44/ (RA+2RB) x 0.1x10-6 and 0.25 =( RA+RB)/ (RA+2RB)
Solving both the above equations, we obtain RA & RB as
RA = 7.2K Ω
RB = 3.6K Ω
WAVEFORMS:
Fig (a): Unsymmetrical square wave output
(b): Capacitor voltage of Unsymmetrical square wave output
(c): Symmetrical square wave output
SAMPLE READINGS:
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Parameter
Unsymmetrical
Symmetrical
Voltage VPP
Time period T
Duty cycle
PROCEDURE:
I) Unsymmetrical Square wave
1. Connect the circuit as per the circuit diagram shown without connecting the diode OA
79.
2. Observe and note down the waveform at pin 6 and across timing capacitor.
3. Measure the frequency of oscillations and duty cycle and then compare with the given
values.
4. Sketch both the waveforms to the same time scale.
II) Symmetrical square waveform generator:
1. Connect the diode OA79 as shown in Figure to get D=0.5 or 50%.
2. Choose Ra=Rb = 10KΩ and C=0.1Μf
3. Observe the output waveform, measure frequency of oscillations and the duty cycle and
then sketch the o/p waveform.
Viva Questions & Answers:
1. What is the effect of C on the output?
Time period of the output depends on C
2. How do you vary the duty cycle?
By varying R A or RB.
3. What are the applications of 555 in astable mode?
FSK Generator, Pulse Position Modulator, Square wave generator
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4. What is the function of diode in the circuit?
To get symmetrical square wave.
5. On what parameters Tc and Td designed?
R A ,RB and C
6. What are charging and discharging times?s
The time during which the capacitor charges from (1/3) Vcc to (2/3) Vcc is equal
to the time the output is high is known as charging time and is given by Tc=0.69(RA+RB) C
The time during which the capacitor discharges from (2/3) Vcc to (1/3) Vcc is
equal to the time the output is low is known as discharging time and is given by
Td=0.69(RB) C.
SCHMITT TRIGGER CIRCUITS- USING IC 741 & IC 555
EX.NO: 8
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DATE:
AIM:
To design the Schmitt trigger circuit using IC 741 and IC 555
APPARATUS REQUIRED:
S.NO
DESCRIPTION
RANGE
QUANTITY
1
IC 741
1
2
555IC
1
3
Cathode Ray Oscilloscope
4
Multimeter
5
Resistors
(0 – 20MHz)
1
1
100 Ω
2
56 KΩ
1
6
Capacitors
0.1 μf, 0.01 μf
Each one
7
Regulated power supply
(0 -30V),1A
1
THEORY:
The circuit shows an inverting comparator with positive feed back. This circuit converts
orbitrary wave forms to a square wave or pulse. The circuit is known as the Schmitt trigger (or)
squaring circuit. The input voltage Vin changes the state of the output Vo every time it exceeds
certain voltage levels called the upper threshold voltage Vut and lower threshold voltage Vlt.
When Vo= - Vsat, the voltage across R1 is referred to as lower threshold voltage, Vlt.
When Vo=+Vsat, the voltage across R1 is referred to as upper threshold voltage Vut.The
comparator with positive feed back is said to exhibit hysterisis, a dead band condition.
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CIRCUIT DIAGRAM:
Fig 1: Schmitt trigger circuit using IC 741
Fig 2: Schmitt trigger circuit using IC 555
DESIGN:
Vutp = [R1/(R1+R2 )](+Vsat)
Vltp = [R1/(R1+R2 )](-Vsat)
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Vhy = Vutp – Vltp
=[R1/(R1+R2)] [+Vsat – (-Vsat)]
WAVE FORMS:
Fig1 : (a) Schmitt trigger input wave form
(b) Schmitt trigger output wave form
Sample readings:
Table 1:
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Parameter
Input
741
Output
555
741
555
Voltage( Vp-p)
Time period(ms)
Table 2:
Parameter
741
555
Vutp
Vltp
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Apply an orbitrary waveform (sine/triangular) of peak voltage greater than UTP to the input of a
Schmitt trigger.
3. Observe the output at pin6 of the IC 741 and at pin3 of IC 555 Schmitt trigger circuit by varying
the input and note down the readings as shown in Table
4. Find the upper and lower threshold voltages (Vutp, VLtp) from the output wave form.
Viva Questions & Answers:
1. What is the other name for Schmitt trigger circuit?
Regenerative comparator
2. In Schmitt trigger which type of feedback is used?
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Positive feedback.
3. What is meant by hysteresis?
The comparator with positive feedback is said to be exhibit hysteresis, a deadband
condition. When the input of the comparator is exceeds Vutp, its
output switches from + Vsat to
- Vsat and reverts back to its original state,+ Vsat ,when the input goes below Vltp
4. What are effects of input signal amplitude and frequency on output?
The input voltage triggers the output every time it exceeds certain voltage levels (UTP
and LTP). Output signal frequency is same as input signal frequency.
RC PHASE SHIFT OSCILLATOR
EX.NO: 9
DATE:
AIM:
To construct a RC phase shift oscillator to generate sine wave using op-amp.
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APPARATUS REQUIRED:
S.NO
DESCRIPTION
RANGE
QUANTITY
1
OP-AMP
IC-741
1
2
Resistor
16K, 32K,
1
1.59K,
2
3
Capacitor
0.1f
2
4
CRO
-
1
5
RPS
DUAL(0-30) V
1
THEORY:
Basically,positive feedback of a fraction of output voltage of a amplifier fed to the input
in the same phase, generate sine wave.The op-amp provides a phase shift of 180 degree as it is
used in the inverting mode.An additional phase shift of 180 degree is provided by the feedback
Rc network.The frequency of the oscillator fo is given by
fo = 1 /  6 (2  R C )
Also the gain of the inverting op-amp ahould be atleast 29,or Rf  29 R1
RC PHASE SHIFT OSCILLATOR
Rf =470k
R1=150k
2
741
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3
CRO
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DESIGN:
fo = 1 /  6 (2  R C )
Rf  29 R1
C = 0.01F, fo = 500 Hz.
R = 1 /  6 (2  f C ) = 13 k
Therefore, Choose R = 15k
To prevent loading,
R1  10 R
R1 =10 R = 150 k.
Rf = 4.35 M
MODEL GRAPH:
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t
Observations:
T
Time period =
Frequency =
Amplitude =
PROCEDURE:
1. Connect the circuit as shown in fig. With the design values.
2. Observe the output waveforms using a CRO.For obtaining sine wave adjust Rf.
3. Measure the output wave frequency and amplitude.
Viva questions and answers:
1. What happens when the common terminal of V+ and V- sources is not grounded?
If the common point of the two supplies is not grounded, twice the supply voltage
will get applied and it may damage the op-amp.
2. Define CMRR of an op-amp.
The relative sensitivity of an op-amp to a difference signal as compared to a Common –
mode signal is called the common –mode rejection ratio. It is expressed in decibels.
CMRR= Ad/Ac
3. What are the requirements for producing sustained oscillations in feedback circuits?
For sustained oscillations,. The total phase shift around the loop must be zero at the
desired frequency of oscillation, . At fo, the magnitude of the loop gain should be equal to unity
4. Mention any two audio frequency oscillators:
 RC phase shift oscillator
 Wein bridge oscillator
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5. Define analog signal
When the amplitude of a signal varies continuously with respect to time,the signal is
called analog.
6. Define discrete signal.
When a signal is defined only at discrete instants of time,the signal is called discrete
signal..
WEIN BRIDGE OSCILLATOR
EX.NO: 10
DATE:
AIM:
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To construct a wein bridge oscillator for fo = 1KHz and study its operation
APPARATUS REQUIRED:
S.NO
DESCRIPTION
RANGE
QUANTITY
1
OP-AMP
IC-741
1
2
Resistor
16K, 32K,
1
1.59K,
2
3
Capacitor
0.1f
2
4
CRO
-
1
5
RPS
DUAL(0-30) V
1
THEORY:
In wein bridge oscillator, wein bridge circuit is connected between the amplifier input
terminals and output terminals. The bridge has a series rc network in one arm and parallel
network in the adjoining arm. In the remaining 2 arms of the bridge resistors R1and Rf are
connected. To maintain oscillations total phase shift around the circuit must be zero and loop
gain unity. First condition occurs only when the bridge is p balanced. Assuming that the resistors
and capacitors are equal in value, the resonant frequency of balanced bridge is given by
Fo = 0.159 / RC
DESIGN:
At the frequency the gain required for sustained oscillations is given by
1+Rf /R1 = 3 or Rf = 2R1
Fo = 0.65/RC and Rf = 2R1
CALCULATION:
Theoretical
Fr = 1/(2*3.14*R*C)
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Practical:
F = 1/T
CIRCUIT DIAGRAM
PROCEDURE:
1. Connections are made as per the diagram.
2. R,C,R1,Rf are calculated for the given value of fo using the design .
3. Output waveform is traced in the CRO.
Viva questions and answers
1. Define slew rate.
It is defined as the maximum rate of change of output voltage caused by a step input
voltage and is specified in volt per micro second. For IC 741 it is 0.5V/micro sec.
2. In what way is IC 741S better than IC 741?
IC741S is a military grade of amplifier and has higher slew rate and lower temperature
than IC 741.
3. What is an isolation amplifier?
An isolation amplifier is an amplifier that offers electrical isolation between its
input and output terminals.
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4. What is the need for a tuned amplifier?
In radio or TV receivers, it is necessary to select a particular channel among all
other available channels. Hence some sort of frequency selective circuit is needed that
will allow us to amplify the frequency band required and reject all the other unwanted
signals and this function is provided by a tuned amplifier.
FREQUENCY MULTIPLIER USING PLL
EX.NO: 11
DATE:
AIM:
To construct and study the operation of frequency multiplier using IC 565.
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APPARATUS REQUIRED:
S.NO
DESCRIPTION
1
IC 565,IC 7490,2N2222
2
Resistors
3
Capacitors
RANGE
QUANTITY
-
1
20 K, 2k, 4.7k,10k
0.001 F
1
1 each
10 F
4
Function Generator (Digital)
5
C.R.O
6
Dual Power Supply
1 Hz – 2 MHz
1
-
1
0- 30 V
1
THEORY
In a frequency multiplier using PLL 565, a divided by N network is inserted between the
VCO output and the phase comparator input. Since the output of the comparator is locked to
the input frequency fin the VCO is running at a multiple of the input frequency. Therefore in
the locked state the VCO output frequency is given by,
f0 = Nfin
CIRCUIT DIAGRAM:
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+6v
20kohm
RT
2kohm
C
10Mf
0.001Mf
C1
10
8
2
7
Fo=5fin
VCO Output
4
565
vin
3
+6v
5
1
9
1
RT
4.7kohm
0.01Mf
7490
(%5)
2 3
6
7
1
10
2
11
1
10kohm
RT
3
2N2222
-6v
PROCEDURE:
1. The connections are given as per the circuit diagram.
2. The circuit uses a 4- bit binary counter 7490 used as a divide-by-5 circuit.
3. Measure the free running frequency of VCO at pin 4, with the input signal Vi set equal to
zero. Compare it with the calculated value = 0.25 / (RT CT).
4. Now apply the input signal of 1 VPP square wave at 500 Hz to pin 2.
5. Vary the VCO frequency by adjusting the 20k potentiometer till the PLL is
locked.Measure the output frequency.It should be 5 times the input frequency.
6. Repeat steps 4, 5 for input frequency of 1 kHz and 1.5 kHz.
Viva questions and answers
1. Mention the applications of PLL
Frequency multiplier
Frequency synthesizer
Frequency translation
Clock and data recovery
2. What is a voltage controlled oscillator?
Voltage controlled oscillator is a free running multivibrator operating at a set frequency
called the free running frequency. This frequency can be shifted to either side by applying a dc
control voltage and the frequency deviation is proportional to the dc control voltage.
3. What are the applications of VCO?
VCO is used in FM, FSK, and tone generators, where the frequency needs to be
controlled by means of an input voltage called control voltage.
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4. What is PLL?
PLL is a control system that generates an output signal whose phase is related to the
phase of input Reference signal.
VOLTAGE REGULATOR USING IC723
EX.NO: 12
DATE:
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AIM:
To design a low voltage variable regulator of 2 to 7V using IC 723.
APPARATUS REQUIRED:
S.No
Equipment/Component name
1
IC 723
2
Resistors
Specifications/Value Quantity
1
3.3KΩ,4.7KΩ,
Each one
100 Ω
3
Variable Resistors
1KΩ, 5.6KΩ
Each one
4
Regulated Power supply
0 -30 V,1A
1
5
Multimeter
3 ½ digit display
1
THEORY:
A voltage regulator is a circuit that supplies a constant voltage regardless of changes in
load current and input voltage variations. Using IC 723, we can design both low voltage and
high voltage regulators with adjustable voltages.
For a low voltage regulator, the output VO can be varied in the range of voltages Vo <
Vref, where as for high voltage regulator, it is VO > Vref. The voltage Vref is generally about 7.5V.
Although voltage regulators can be designed using Op-amps, it is quicker and easier to use IC
voltage Regulators.
IC 723 is a general purpose regulator and is a 14-pin IC with internal short circuit current
limiting, thermal shutdown, current/voltage boosting etc. Furthermore it is an adjustable voltage
regulator which can be varied over both positive and negative voltage ranges. By simply varying
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the connections made externally, we can operate the IC in the required mode of operation.
Typical performance parameters are line and load regulations which determine the precise
characteristics of a regulator. The pin configuration and specifications are described earlier
LM317 series is the most commonly used three terminal adjustable voltage regulators.
The power rating of such regulator by a factor of 10V more because of improved overload
protection greater load current can be drawn over the given operating temperature range.
CIRCUIT DIAGRAM:
Fig1: Voltage Regulator
DESIGN OF LOW VOLTAGE REGULATOR:
Assume Io= 1mA,VR=7.5V
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RB = 3.3 KΩ
For given Vo
R1 = ( VR – VO ) / Io
R2 = VO / Io
PROCEDURE:
a) Line Regulation:
1. Connect the circuit as shown in Fig 1.
2. Obtain R1 and R2 for Vo=5V
3. By varying Vn from 2 to 10V, measure the output voltage Vo.
4. Draw the graph between Vn and Vo as shown in model graph (a)
5. Repeat the above steps for Vo=3V
b) Load Regulation: For Vo=5V
1. Set Vi such that VO= 5 V
2. By varying RL, measure IL and Vo
3. Plot the graph between IL and Vo as shown in model graph (b)
4. Repeat above steps 1 to 3 for VO=3V.
TABULATION
S.NO
INPUT VOLTAGE
OUTPUT VOLTAGE
Model graphs:
a) Line Regulation:
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b)
Load Regulation:
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Viva Questions & Answers:
1. What is the effect of R1 on the output voltage?
R1 decreases for an increase in the output voltage.
2. What are the applications of voltage regulators?
Voltage regulators are used as control circuits in PWM, series type switch mode
supplies, regulated power supplies, voltage stabilizers.
3. What is the effect of Vi on output?
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Output varies linearly with input voltage up to some value (o/p voltage+dropout
voltage) and remains constant.
4. What is a linear voltage regulator?
Series or linear regulator uses a power transistor connected in series between the
Unregulated dc input and the load and it conducts in the linear region .The output voltage
is controlled by the continous voltage drop taking place across the series pass transistor.
5. What is a switching regulator?
Switching regulators are those which operate the power transistor as a
high frequency on/off switch, so that the power transistor does not conduct current
continously.This gives improved efficiency over series regulators.
6. What is the input voltage of LM 317, LM 723?
40 V
7. What is the output voltage of LM317, LM 723?
1.2V to 54V
2V to 57V
SIMULATION USING ORCAD
EX. NO: 13
DATE
AIM:
To simulate the circuit and analyse its characteristics
APPARATUS REQUIRED:
1.Personal computer with windows os.
2.PCB layout software such as ORCAD.
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THEORY:
General rules for designing PCBs:
The PCB designer follows few rules of thumb that can be used when laying out PCBs.
Here they are,
1.PLACING COMPONENTS:
Generally, it is best to place parts only on the topside of the board. Firstly place all the
components in specific locations. This includes connectors, switches, LED mounting holes, heat
sinks or any other item that mounts to an external location.
Give careful thought when placing components to minimize trace lengths. Doing a good
job here will make laying the traces much easier.
Arrange ICs in only one or two orientations (up and down or right and left). Align each
IC so that pin 1 is in the same place for each orientation, usually on the top or left sides. Position
polarized parts with the positive leads, all having the same orientation. Also use a square pad to
mark the positive leads of these components.
Frequently, the beginners run out of room when routing traces. Leave 0.35 to 0.5 between
ICs. For large ICs allow even more space.
Parts not found in the component library can be made by placing a series of individual
pads and then group them together. Place one pad for each lead of the component. It is very
important to measure the pin spacing and pin diameters as accurately as possible.
After placing all the components, print out a copy of the layout. Place each component on
the top of the layout. Check to insure that you have allowed enough space for every part to rest
without touching each other.
2. PLACING POWER AND GROUND TRACES:
After the components are placed, the next step is to lay the power and ground traces.A
power rail is run along the front edge of the board and a ground rail along the rear edge.From
these rails attach traces that run in between the ICs. The ground rail should be very wide, 0.100”
and all the supply lines should be 0.50”. When using this configuration the remaining of the
bottom layer is then reserved for the vertical signal traces.
3. PLACING SIGNAL TRACES:
When placing traces, it is always a good practice to make them as short and direct as
possible. Use vias to move signals from one layer to the other. A via is a pad-through hole.
Generally the best strategy is to lay out a board with vertical trace on one side and horizontal
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traces on the opposite side. A good trace width for low current digital and analog signals is
0.010”.
Traces that carry significant current should be wider than signal traces. The table below gives
rough guidelines of how wide should a trace be for a given amount of current.
0.010”
0.3 Amps
0.015”
0.4 Amps
0.020”
0.7 Amps
0.025”
1 Amps
0.050”
2 Amps
0.100”
4 Amps
-0.150” 6 Amps
When routing traces, it is best to have the snap to grid turned on. Setting the snap grid spacing to
0.050” works well. Changing to a value of 0.025” can be helpful when trying to work as densely
as possible. Turning off the snap feature may be necessary when connecting to parts that have
unusual pin spacing.
It is a commo0n practice to restrict the direction that traces run to horizontal, vertical or
at 45 degrees angles.
When placing narrow traces, use 0.015” or less. Avoid sharp right angle turns. The
problem here is that , in the board manufacturing process the outside corner can be etched a little
more narrow. The solution is to use two 45-degree bends with a short leg in between.
It is a good idea to place text on the top layer of the board, such as the product or
company name.
4.CHECKING YOUR WORK:
After all the traces are placed, it is best to double-check the routing of every signal to
verify that nothing is missing or incorrectly wired. Do this by running through the schematic, one
wire at a time. Carefully follow the path of each trace. After each trace is confirmed, mark the
signal on the schematic with a yellow highlighter.
CIRCUIT DIAGRAM:
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Vin
Inspect the layout, both top and bottom to ensure that the gap between every item is 0.007” or
greater. Use the pad information tool to determine the diameters of pads that make up a
component.
Check for missing vias. The CAD software will automatically insert a via when changing
layers as a series of traces are placed. The user often forget that vias are not automatically
inserted otherwise. For example, when beginning a new trace, a via is to first print a top layer ,
then print the bottom. Visually inspect each side for traces that doesn’t connect to anything.
When a missing via is found, insert one. Do this by clicking on the pad in the side tool bar from
the down list box and click on the layout.
Check for the traces that cross each other. Inspecting a printout of each layer easily does
this.
Metal components such as heat sinks, crystals, switches, batteries and connectors can
cause shorts, if they are placed over traces on the top layer. Inspect for these shorts by placing all
the metal components on a printout of the top layer. Then look for traces that run below the
metal components.
PROCEDURE FOR SIMULATION:


Start---program---ORCAD RELEASE 9---CAPTURE CIS
New---project---title create
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






Drag the element as per the circuit requirement.
Make connections as per circuit using right icon.
Create the new simulation.
Set the output level settings.
Place the voltage marker in output node.
Run the circuit diagram.
Print the output waveform
CIRCUIT DIAGRAM:
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R1
92.8k
V2
0
12v
2
-
V-
4
U1
R2
OS1
3.2k
OS2
6
5
7
+
V+
OUT
3
AD741
1
V1
12v
R6
4k
0
C1
0.1u
R3
C3
0.1u
0.1u
R4
R5
326
326
0
0
C2
0
326
0
ANALYSIS TYPE: TIME DOMAIN (TRANSIENT)
RUN TO TIME: 40ms
MODEL GRAPH
SIMULATION OUTPUT:
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ASTABLE MULTIVIBRATOR USING TIMER
V1
5v
R2
C2
43.41k
0
0
0.01u
8
C1
R1
0.01u
14.41k
2
4
5
6
7
U1
VCC
TRIGGER
RESET OUTPUT
CONTROL
THRESHOLD
DISCHARGE
GND
555B
1
3
R3
1k
0
0
SIMULATION RESULT
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MONOSTABLE MULTIVIBRATOR USING TIMER
V4
8V
R4
50K
0
C3
0.1u
8
2
4
5
6
7
C2
V3
0.01u
0
U2
VCC
TRIGGER
3
RESET OUTPUT
CONTROL
THRESHOLD
DISCHARGE
GND
555B
1
R5
1k
0
0
0
SIMULATION RESULT
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ASTABLE MULTIVIBRATOR USING OP-AMP
SIMULATION RESULT
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MONOSTABLE MULTIVIBRATOR USING OP-AMP
D3
R5
10k
D1N4007
D2
R2
12k
D1N4007
C1
0.1u
V1
12v
0
0
2
V-
4
U1
-
OS1
+
OS2
AD741
1
6
5
7
3
V+
OUT
V2
12v
R3
10k
0
D1
C2
0.1u
D1N4007
R4
CLK
3.3k
R1
DSTM1
1k
0
0
SIMULATION RESULT
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WEIN BRIDGE OSCILLATOR
R5
1k
V2
0
12v
2
-
V-
4
U1
R2
1k
OS1
3
+
OS2
AD741
1
6
5
7
0
V+
OUT
V1
12v
R4
R3
0
C2
C1
1k
0.01u
1k
0.01u
0
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SIMULATION OUTPUT
INSTRUMENTATION AMPLIFIER
V3
12V
0
OUT
+
12V
OS2
V4
R4
R5
10k
10k
V7
6
0
12V
5
R1
U3
10k
7
3
V+
2v
AD741
1
4
V1
OS1
0
2
V-
-
-
OS1
OUT
R8
0
3
+
OS2
AD741
1
6
5
7
500k
V+
2
V-
4
U1
V5
-
V-
4
U2
2
OS1
3
+
V+
OUT
OS2
V8
R3
12V
12V
10k
0
AD741
1
R6
0
6
5
10k
V2
R7
7
5v
10k
V6
0
12V
0
0
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SIMULATION OUTPUT
ACTIVE LOW PASS FILTER
R2
R1
4k
2k
0
V2
0
12v
2
3
+
OS2
AD741
1
6
5
1k
7
1k
OS1
OUT
R3
V+
R4
-
V-
4
U1
V1
V3
C1
C2
12v
0.1u
0.1u
0
0
0
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SIMULATION OUTPUT
BANDPASS FILTER
C1
0.01u
R4
95.5k
V2
12V
0
C2
2
-
V-
4
U1
R3
OS1
0.01u
11.9k
3
V1
R2
11.9k
OS2
6
5
7
R1
+
V+
OUT
AD741
1
4.7k
V3
12v
0
0
0
0
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SIMULATION OUTPUT
REFERENCES
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1. D.Roy Choudhury and Shail B.Jain, Linear Integrated Circuits, 2nd edition, New Age
International.
2. James M. Fiore, Operational Amplifiers and Linear Integrated Circuits: Theory and
Application, WEST.
3. Malvino, Electronic Principles, 6th edition, TMH
4. Ramakant A. Gayakwad, Operational and Linear Integrated Circuits,4th edition, PHI.
5. Roy Mancini, OPAMPs for Everyone, 2nd edition, Newnes.
6. S. Franco, Design with Operational Amplifiers and Analog Integrated Circuits, 3rd
edition, TMH.
7. William D. Stanley, Operational Amplifiers with Linear Integrated Circuits, 4th edition,
Pearson.
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