Photovoltaic converter topologies suitable for SiC

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Photovoltaic converter topologies suitable for SiC-JFETs
Benjamin Sahan, Samuel V. Araújo, Thomas Kirstein, Lucas Menezes, Peter Zacharias
Kompetenzzentrum für Dezentrale Elektrische Energieversorgungstechnik (KDEE),
University of Kassel, Wilhelmshöher Allee 71, D-34121 Kassel, b.sahan@uni-kassel.de
Abstract
SiC semiconductors offer very interesting characteristics and can be considered as a future trend in
photovoltaic converter technology. The vertical JFET is an example of a very promising device, mainly
due to its relative structural simplicity. Nevertheless, its inherent normally-on characteristic calls for
specially tailored topologies that will be presented and discussed in this publication.
1.
Introduction
The Silicon Carbide (SiC) material is
characterized by electrical field strength almost 9
times higher than normal Si, allowing the design
of semiconductor devices with very thin drift
layers and as a consequence low on-state
resistance and reduced switching losses. In
other words, such characteristic can be
translated into the possibility of operating at
higher blocking voltages with reduced losses.
Increased reliability due to its robustness,
especially against temperature and cosmic
radiation-induced failure [1] are additional
highlights of this new technology.
(see Fig. 2). From that point on, further increase
of efficiency is not cost effective anymore. As a
future trend SiC offers the possibility of operating
at higher switching frequencies without
significant prejudice on the efficiency which
leads to the possibility of reducing the size of
passive components and consequently the cost
and volume of the circuit.
10%
1%
1990
goal
1995
2000
2005
2010
2015
year
Fig. 2. Benchmark of commercially available PV
inverters. Source: M.Meinhardt, SMA
Fig. 1. Principle boundaries of Si compared to
SiC devices
These characteristics are especially interesting
when applied in photovoltaic converters. There,
efficiency is still one of the main market drivers in
the industry. Today, enhancing the PV inverter
efficiency by 1% could yield up to
45€/kWp…97€/kWp additional profit after 10
years of operation (linearly scaled according to
[2]). For this reason, PV inverter technology
rapidly improved during the last decade, as a
peak efficiency of 99% will soon be achieved
ISBN: 978-3-8007-3158-9
Other issues like EMC and AC-losses on the
passive components shall nevertheless still be
taken into consideration [3].
As for SiC transistors, the vertical JFET is
considered favorable because it has a relatively
simple structure [4]. Nevertheless, specially
tailored power electronic architectures are
required for this technology, as the device is
inherently normally-on and has quite different
characteristics when compared with conventional
semiconductors; namely pinch-off voltage, gate
drive units and transient characteristics. An
alternative would be the operation in cascade
with a low-voltage MOSFET, though such
structure is out of the scope of this paper. Here,
focus is given to the application of stand-alone
Proceedings PCIM Europe 2009 Conference
431
The junction field effect transistor (JFET) is the
most simply built up unipolar transistor from the
group of the field effect transistors and
corresponds in the construction to a modified
diode. Types employing SiC are available only
with the base material doped with n charge
carriers. The corresponding JFETs consist of a
n-type area surrounded by a p zone. To the n
zone the connections are made from the drain
and source, forming a conductive channel. The p
zone forms the gate electrode and together with
the n channel the referred pn diode. The majority
of JFETs are normally-ON devices.
As it is with MOSFETs, the highest blocking
voltage ratings at high currents are achievable
by a vertical structure (VJFET). When the gateto-source voltage is zero (UGS=0) the n channel
behaves as a resistance. If the gate is connected
to a negative voltage with respect to the source,
the conducting channel is squeezed by the
extending blocking zone. With a maximum pinch
of the channel, it practically becomes nonconducting. This tension is called pinch-off
voltage (Up) and for SiC- VJFETs is in the range
of 16-28V. At a certain gate to source voltage
and low UDS the channels behavior is ohmic
while above a so called knee-voltage it becomes
close to a current source (current limiting
characteristic).
Another advantage of SiC-JFETs is the
possibility of avoiding the use of gate oxide,
which had some stability problems in the past.
JFETs also have promising perspectives
regarding manufacturing costs and ruggedness.
Voltage [V]
Properties
Fig. 3. Turn-on of JFET, V=400V
Voltage [V]
2.1.
SiC-VJFET
To evaluate the performance of the SiC-VJFETs
devices, a switching test with a commutation cell
was performed. A Trench IGBT rated at 1200V,
25A from Infineon® and a new prototype SiCVJFET rated at 1200V with a nominal Rds_on of
0.13 (T0-220) were compared. A SiC
freewheeling diode C2D10120D was employed.
The junction temperature was 125°C and the
blocking voltage and gate resistance were 450V
and 4.1 for the IGBT and 400V and 5 for the
JFET.
The turn-on energy losses were actually higher
for the JFET: 213Ws for the JFET at 10A and
180Ws for the IGBT at 15A. One explanation
for the JFETs slow dv/dt at turn-on is the high
internal gate resistance of the prototype. Further
technological improvements will most likely lead
to an improved turn-on performance.
Nevertheless, the JFET had much superior turnoff behavior with only 30Ws at 10A in
comparison with the 783Ws at 15A from the
IGBT. Such large difference is mainly explained
by the tail current during the blocking transient of
the IGBT.
As a conclusion, the total specific switching
losses of this JFET were approximately 60% less
than the Trench IGBT.
Current [A]
2.
2.2.
Switching performance
SiC-JFET vs. IGBT
Current [A]
JFET devices, as several new solutions for grid
connected PV systems suitable for normally-on
SiC-JFETs are presented and discussed. To
ensure the circuit is inherently safe and at the
same time cost-effective, the following design
guidelines should be followed:
ƒ No hard short-circuit of DC-link
capacitors when switches are normally
on
ƒ No short-circuit of grid side when
switches are normally on
ƒ Low SiC part count and highest possible
SiC chip utilization
Fig. 4. Turn-off of JFET, V=400V
ISBN: 978-3-8007-3158-9
Proceedings PCIM Europe 2009 Conference
432
considered as an uncritical state, since the
steady-state short circuit current is close to the
rated current at the maximum power point.
3.2.
Transformerless converter
system with grounded PV generator
Fig. 5. Turn-on of IGBT, V=450V
Fig. 6. Turn-off of IGBT, V=450V
In some cases, grounding one of the outputs of
the PV generator is required due to safety
standards or to prevent damage to certain thin
film panels [5]. A specially designed
transformerless DC-DC converter as depicted in
Fig. 8 allows grounding either positive or
negative terminals, since the PV generator is
always decoupled from the grid. The operation
principle is similar to a flyback converter, but
without the associated problems related to
leakage inductance. Both switches S1 and S2
are synchronously activated, charging the
inductor with energy from the PV; meanwhile the
diodes D1 and D2 remain blocked and the load
is fed by the output capacitors C1 and C2. As the
switches are deactivated, the diodes are directly
polarized and the energy stored in the inductor is
transferred to the load. In normal operation
mode no current is flowing through the earth
connection.
3.
DC-DC Converters for
transformerless PV sytems
3.1.
Boost converter
In many countries transformerless PV systems
became the main market trend due to its higher
efficiency and reduced weight. In order to extend
the PV voltage range or to ensure a safe
operating area of the PV panel (1kV max. system
voltage) a boost converter is often included in
medium power solar inverters (<100kW) (see
Fig. 7).
Fig. 7. Boost converter plus DC-AC inverter for
transformerless PV system
Since this boost converter is the front conversion
stage it requires extremely high efficiency
(>99%). Using a normally-on switch S1 is
feasible when properly sizing the input capacitor
C1 (C1<<C2). When S1 is permanently on, C1
discharges through L1 and finally the PV
generator goes into short circuit, which can be
ISBN: 978-3-8007-3158-9
Fig. 8. Novel transformerless buck-boost
converter system with (positively)
grounded PV generator
The application of SiC-JFETs is here possible
since in the case of losing the gate power supply
only the PV generator will be short-circuited,
what can be considered uncritical. The referred
circuit is also well suited for the application of
SiC switches due to the higher voltage stress
across the switches when compared to the
classical boost converter. If the PV generators
positive terminal is grounded, the voltage stress
across S1 is equal to UC2 while for S2 it is the
sum of Upv and UC1. The inverse is valid for
negative terminal grounding. In addition, the
possibility of increasing the switching frequency
and therefore reducing the size of the input
inductor represents an important optimization
possibility.
Proceedings PCIM Europe 2009 Conference
433
In the inverter stage, any standard voltage
source half-bridge topology (2-Level and 3Level) with center tapped DC link can be
employed.
4.
Transformerless
PV-inverters
4.1.
Dual HF-Switch Voltage
Source Inverter
The following topology features a 6-switch
voltage source power conversion scheme [6]. It
consists of a buck converter where the inductor
is located on the AC side (Fig. 9). For cos=1,
S3…S6 are switched at grid frequency and
provide bipolar voltage while S1 and S2 are
switched synchronously in HF mode and
modulate the line current. In freewheeling state
the diodes antiparallel to S3…S6 conduct the
line current and the PV generator is
disconnected from the grid since S1 and S2 are
opened. This ensures that at no point HF
common-mode currents can flow back through
the parasitic capacitances of the PV generator
as depicted in Fig. 10.
As can be also seen the circuit allows the usage
of normally-on switches. Each of the HF
switches S1/S2 is rated at only half of the DC
input voltage which is commonly a great
advantage when switching losses and specific
on-resistance are concerned. Knowing that SiC
devices usually outperform MOSFETs only at
higher rated blocking voltages, there might not
be significant benefit from using SiC instead of
conventional Si devices though.
4.2.
Indirect Current Source
Inverter
The normally-on characteristic of JFETs
promotes its usage in PWM Current Source
Inverters since it guarantees that there is always
a path for the DC-link inductor current [7]. The
PWM CSI has several advantages, such as
voltage boosting capability but at the cost that
each switch needs an additional series diode to
provide
reverse
voltage
blocking.
This
significantly increases the conduction losses so
that the application is limited to inverters with
very small PV voltage range [8]. One also needs
to take into account that in case all switches are
normally-on, the bridge works as a diode rectifier
and reverse biases the PV generator.
The topology in Fig. 11 is derived from a
classical power factor correction (PFC) circuit
and can be regarded as an indirect Current
Source Inverter. Due to its simplicity it is often
used in small power PV applications [9].
Fig. 9. Dual HF-Switch voltage source inverter
topology and parasitic DC capacitances
In contrast to this, the classical full-bridge with
unipolar PWM or single-phase chopping (mixed
HF and LF switches) has significant EMC issues
unless the grid side is isolated.
Fig. 10.
Positive current flow left) on-state
right) freewheeling
ISBN: 978-3-8007-3158-9
Fig. 11. Single HF-switch Indirect Current
Source Inverter
The basic principle is to control the DC-link
current in L1 with an unipolar buck converter
thus using only one HF switch. The buck
converter provides a rectified sinusoidal current
which is inverted by the low-frequency switches
S2…S5. Finally, a relatively small AC-capacitor
smoothens the DC-link current. As discussed
before, HF common mode leakage currents are
also minimized, since the potential of the PV
generator is zero for one halfwave and equals
the grid voltage for the other one.
Proceedings PCIM Europe 2009 Conference
434
A 1kW laboratory prototype of this topology as
presented in Fig. 12 was implemented to further
evaluate the performance of normally-on SiCJFETs. The detailed design can be found in the
appendix.
L1
4.3.
Neutral-point clamped
The well known voltage source 3-level Neutralpoint clamped (NPC) inverter can incorporate
normally-on switches (S1/S2), since each branch
consists of an indirect series connection of two
switches and an external freewheeling diode. For
cos=1 no switching losses occur in S3/S4, so
that slow normally-off switches can be used
which make the circuit inherently safe.
C2
C1
S1
S2…S5
Fig. 12. 1kW test board of the Indirect Current
Source Inverter
A first test was made with an ohmic load and the
electric efficiency (without aux. power supply)
reached 98.6% at full load and 98.9% at half load
(power analyzer: Yokogawa WT3000, MCTS 200
current transducer). These results show a very
positive trend for future applications especially
considering that only one HF switch is needed.
iN
iL1
In general, the NPC with JFETs appears to be a
very suitable topology for PV, considering that it
can be also used in 3-phase applications and
that the PV potential is fixed. However, the input
voltage required to directly feed the grid with a
single-stage design surpasses the present limits
established on standards for low voltage
applications (1000V). It is therefore still
necessary to employ a boost stage to step up the
DC-link voltage to the required level.
4.4. Buck-boost inverter
iC2
Fig. 13. Experimental results at
P=1kW;U1=400Vdc,UN=230Vac
A major drawback of this topology is its inability
to provide reactive power, although this is not
actually required in the low voltage grid.
Moreover, in a practical circuit it is rather difficult
to switch the MOSFETs S2…S5 at the exact
desired time necessary to prevent shortcircuiting C2 through the body diodes.
ISBN: 978-3-8007-3158-9
Fig. 14. Phase leg of the NPC inverter with
JFET/ IGBT combination
A newly developed circuit presented in [10]
features a bipolar buck boost topology with only
two HF switches. The circuit is similar to the ZSource Inverter [11] but as opposed to the
original Z-Source the potential to earth is fixed,
so high frequency current flow between the input
and output sides is avoided. This is an important
feature for PV applications, as discussed before.
In general, the Z-source topology has
advantages concerning EMI immunity and
robustness, such as miss-gating does not
destroy the circuit. The special benefit of this
type of converter is that it can step-up and stepdown the input voltage. This ability is desirable
for systems with a wide fluctuating DC voltage
range, e.g. PV systems and Fuel Cells.
However, when all switches are normally-on, the
Z-Source inverter is not inherently safe since a
short circuit of the grid through the freewheeling
diodes may occur. The circuit depicted in Fig. 15
Proceedings PCIM Europe 2009 Conference
435
presents a solution to this problem by inserting
active freewheeling paths.
The added switches S3, S4 operate in low
frequency mode synchronously with the grid and
normal IGBTs/MOSFETs with series diodes, or
even reverse blocking IGBTs can be used.
Fig. 15. Bipolar buck boost with two HF switches
and two LF frequency switches
The principle operation consists of three steps:
inductor charge step, where both HF switches
S1 and S2 are closed synchronously; positive
output step, where S1 is modulated while S2 still
opened; and the negative output step, where S2
is modulated and S1 is still opened.
For a correct operation some points should be
commented. The voltage stress of switches is
directly proportional to the conversion gain,
meaning that considering common nominal
European grid voltages in the range of
220V…240Vac, the input DC voltage should be
about 400V to keep the maximum voltage stress
across the switches under 1000V (assuming
1200V switches). In case of failure and shortcircuit of the DC side, saturation of the inductors
could occur, leading to increasing currents
through the switches. Such current is
nevertheless limited by the JFETs, when the
inductors are appropriately sized.
This circuit executes the inversion and the stepup of the PV panel voltage as a single power
conversion stage with few parts, i.e. only two HF
switches which can be realized as SiC-JFETs.
5.
Normally-on switches can be employed by using
specially tailored topologies. Some of them
feature an indirect series connection of fast
switches (SiC) with possibly high voltage stress
and conventional (Si) switches with lower voltage
stress or low switching frequency. This can
provide a measure to avoid short circuit paths in
case of failure even when the HF switch is
normally-on. Current Source Inverter topologies
or those derived from the Z-Source Inverter
present other viable options. There could be also
very interesting potential for application in DCDC converter systems, especially those that can
replace costly transformer stages.
Finally, this paper presented a 1kW laboratory
prototype inverter which was constructed to
further evaluate the performance of SiC-JFETs.
A fairly high efficiency using just one JFET was
measured which gives a positive outlook for its
future application in PV systems.
6.
The authors would like to thank SiCED/Infineon,
especially Dr. Roland Rupp, for their support.
7.
[1]
[2]
[3]
[4]
Conclusion
The photovoltaic branch with its special
requirements offers an interesting application
area for SiC-JFETs. These can be operated at
high voltage and higher switching frequencies
without significant prejudice on the efficiency
which leads to the possibility of reducing the size
of passive components and consequently the
cost and volume of the circuit. However, since
their characteristics are quite different from
conventional semiconductors, new design
strategies are required.
ISBN: 978-3-8007-3158-9
Acknowledgement
[5]
[6]
Literature
G. Soelkner, W. Kaindl, M. Treu and D.
Peters, “Reliability of SiC power devices
against cosmic radiation-induced failure”,
Materials science forum, 2007.
B. Burger, B. Goeldi, D. Kranzer and H.
Schmidt, “98.8% Inverter Efficiency With
SiC Transistors”, 23rd EU PVSEC, Valencia,
Spain, 2008.
P. Zacharias “Perspectives of SiC power
devices in highly efficient renewable energy
conversion systems”, ECSCRM Barcelona
2008.
P. Friedrichs, “Compact Power Electronics
due to SiC Devices”, 5th International
Conference on Integrated Power Electronics
Systems, 2008.
S. V. Araújo, P. Zacharias and B. Sahan,
“Novel
Grid-Connected
Non-Isolated
Converters for Photovoltaic Systems with
Grounded Generator”, PESC’08, Rhodes,
Greece, 2008.
R. Gonzalez , J. Lopez , P. Sanchis and L.
Marroyo “Transformerless inverter for
single-phase photovoltaic systems”, IEEE
Trans. Power Electron., vol. 22, pp. 693,
Mar. 2007.
Proceedings PCIM Europe 2009 Conference
436
[7]
I. Koch, F. Hinrichsen and W.-R. Canders
“Application of SiC-JFETs in Current Source
European
Inverter
Topologies”,
11th
Conference on Power Electronics and
Applications, Dresden, Germany, 2005.
[8] B. Sahan, A.N. Vergara, N. Henze, A.
Engler, P. Zacharias, “A Single-Stage PV
Module Integrated Converter Based on a
Low-Power Current-Source Inverter”, IEEE
Transactions on Industrial Electronics, Vol.
55, No. 7, July 2008.
[9] C. Rodriguez and G.A.J. Amaratunga,
“Long-Lifetime
Power
Inverter
for
Photovoltaic AC Modules”, IEEE Trans. on
Industrial Electronics, vol. 55, no. 7, pp.
2593-2601, July 2008.
[10] P. Zacharias, L.M. Menezes and J. Friebe,
“2 New Topologies for Transformerless Grid
Connected PV-Systems with Minimum
Switch Number”, PCIM Nuremberg, 2008.
[11] Y. Huang, M. Shen, F.Z. Peng and J. Wang,
“Z-Source
Inverter
for
Residential
Photovoltaic Systems”. IEEE Trans. On
Power Electronics, Vol. 21. No. 6, p. 17761782, Nov. 2006.
Max. ripple current in L1 at D=0,5
'iL1,max
U1
4 ˜ L1 ˜ f sw
Inductance for 'iL1,max
L1
0, 2 ˜ I N _ peak
U1
4 ˜ f sw ˜ 0, 2 I N _ peak
RMS current S1:
I S 1_ RMS
1
10ms
10 ms
³
iL12 (t )D(t )dt
0
RMS current D1:
I D1_ RMS
1
10ms
10 ms
³
iL12 (t )(1 D(t ))dt
0
RMS current S2…S5:
8.
Appendix
Design of the Indirect Current Source
Inverter (4.2)
Modulation index:
2U N
U1
M
Duty cycle of S1:
M sin(Zt )
D (t )
I S 2...S 5 _ RMS
Table 1: Chosen parameters and components
P
UN
U1
fsw
DC-link voltage:
U2
D(t )U1
Ideal inductor current L1
iL1 (t )
2 I N sin(Zt )
IN
2
S1
S2…S5
D1
C1
L1
C2
Nominal power P=1kW
Nominal
AC
output
voltage
UN=230V
Nominal DC input voltage U1=400V
(could be practically up to 800V)
Nom.
switching
frequency
fsw=16kHz
SiC-JFET from SiCED/Infineon
1200V, RDSon= 0.13
IPW60R045CP
C2D10120D
1.6mF, 9.4F
3mH, 100m
680nF
Ripple current in L1
'iL1 (t )
U1 U 2 D(t )
L1 ˜ f s
ISBN: 978-3-8007-3158-9
Proceedings PCIM Europe 2009 Conference
437
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