Zero-Current-Switching (ZCS) Power Factor Pre-regulator (PFP)
with Reduced Conduction Losses
Hang-Seok Choi and B. H. Cho
School of Electrical Engineering, Seoul National University
Phone : +82-2-880-1785 Facsimile : +82-2-878-1452
E-mail:hangseok@hitel.net
Abstract - This paper proposes a new boost power
factor pre-regulator (PFP) featuring zero-currentswitching (ZCS). By employing an improved ZCS pulsewidth-modulation (PWM) switch cell, ZCS of all the
active switches is achieved without additional current
stress of the main switch. The additional conduction
losses are minimized, since the circulating current for the
soft switching flows only through the auxiliary circuit and
a minimum number of switching devices are involved in
the circulating current path. The diodes commutate softly
and reverse recovery problems are alleviated. Design
guidelines with a design example are described and
verified by experimental results from the 1.2 kW prototype
boost PFP.
I. INTRODUCTION
Recently international regulations governing the amount
of harmonic currents (e.g. IEC 1000-3-2) became
mandatory and active power factor correction (PFC) preregulator circuit became inevitable for AC/DC converters.
Among the various approaches, the boost converter in
continuous conduction mode (CCM) with the average
current control has been the most popular topology for
power factor pre-regulators (PFP).
In order to improve the efficiency of the PFC circuit,
many efforts have been done on the soft-switching
converters. Soft-switching techniques allow operation with
much reduced switching losses and stresses enabling high
switching frequency operation for improved power density
with high efficiency.
In general, the soft switching approaches can be
classified into two groups; zero-voltage-switching (ZVS)
approaches [1], [2] and zero-current-switching (ZCS)
approaches [3]-[10]. The choice depends on the
semiconductor devices to be used. The ZVS approaches are
generally recommended for metal-oxide-semiconductorfield-effect transistors (MOSFET’s). On the other hand,
ZCS approaches are effective for insulated-gate-bipolartransistors (IGBT’s), since the turn-off switching loss
caused by the tail current is the major part of the total
switching losses.
While MOFET’s are widely used for low power
applications, IGBT’s are desirable for high voltage, high
power applications (above 1kW) ; IGBT’s have higher
voltage rating, higher power density, and lower cost
compared to MOSFET’s.
In an effort to reduce the switching losses of IGBT’s, a
number of ZCS soft switching techniques have been
proposed for the past several years. In the approaches
proposed in [3] and [4], ZCS of the active switches is
achieved by using a resonant inductor in series with the
main switch and a resonant capacitor in series with the
auxiliary switch. However, these techniques have
limitations when applied to the power factor correction
circuit; the resonant energy should be designed to meet the
worst case requirement, i.e. the peak value of the sinusoidal
input current. The resonant energy keeps constant
regardless of variations of the input current. Therefore, the
conduction loss caused by the resonant current becomes
excessive when these approaches are used in the power
factor correction circuit. In the approaches proposed in [5][7], the resonant current for ZCS flows only through the
auxiliary circuit, thus eliminating the current stress of the
main switch. Nevertheless, these approaches place two
power diodes in the power transfer path, which increases
conduction losses of the diodes. In the circuit proposed in
[8], the peak current through the main switch is
substantially reduced by using an additional large inductor.
Unfortunately, this approach is not effective in reducing
conduction loss of IGBT, since the IGBT has an almost
constant voltage drop regardless of the variation of its
current.
This paper proposes a new boost PFP employing an
improved ZCS PWM switch cell [10], [11], which permits
all switching devices to operate under ZCS condition. Since
the circulating current for the soft switching flows only
through the auxiliary circuit, the conduction loss and the
current stress of the main switch are minimized. Therefore,
the proposed cell has reduced conduction loss compared to
the previous ZCS approaches. The diodes commutate softly
and reverse recovery problems are alleviated. Design
guidelines are described and verified by experimental
results from the 1.2 kW prototype PFP boost converter
operating at 72kHz.
II. PROPOSED ZCS BOOST PFP
Fig. 1 shows the ZCS boost PFP employing an improved
ZCS PWM switch cell [10], [11]. The cell consists of two
switches S1 and S2, two diodes D1 and D2, one resonant
inductor Lr, and one resonant capacitor Cr. S1 is the main
switch through which the input current flows, while S2 is
an auxiliary switch that handles only a small portion of the
output power and is rated at a lower average current. Fig.2
compares the main switch currents of the previous ZCS
approach of [3], [4] and the improved ZCS approach. As
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illustrated in Fig.2, the improved ZCS scheme has no
additional current stress on the main switch, which reduces
the conduction losses of the main switch. The effect of soft
switching on the converter power loss is a trade-off
between the reduced switching losses and the additional
conduction loss caused by the soft switching. To achieve
desirable efficiency improvement, it is required to
minimize the additional conduction loss. In the proposed
converter, the circulating current for the soft switching
flows only through the auxiliary circuit, which minimize
the additional conduction loss.
Improved ZCS PWM switch cell
IS
ILr
Lf
D1
Lr
Cr
S1
+
VCr
-
+
RL
Vs
Vo
Co
-
Mode1 (T0-T1): Prior to T0, the input current Is flows to
the output through the ouput rectifier diode D1. At T0, the
main switch S1 turns on and the current through S1
increases linearly until it reaches the input current Is at T1.
I S1 (t ) = I Lr (t ) =
Vo
(t − T0 )
Lr
-
D2
Mode3 (T2-T3) : At T2, the auxiliary swith turns on and
Cr is discharged through the auxiliary switch S2 resonating
with the auxiliary resonant inductor Lr. This mode
continues until Vcr reaches -Vo at T3. The voltage of Cr and
the current through the auxiliary switch are obtained as :
Vcr (t ) = Vo cos( wr (t − T2 ))
Fig. 1 The ZCS Boost PFP
where, wr =
Previous ZCS
Input
current
Main switch
current
Fig. 2 Comparison of the additional conduction losses for ZCS
III. OPERATION PRINCIPLE
To analyze the steady state operation, the following
conditions are assumed.
-
1
Lr C r
Vo
sin( wr (t − T2 ))
Zr
and Z r =
All components and devices are ideal
The output voltage is constant
The input inductor is large enough to be regarded
as a constant current source during one switching
period.
The switching frequency is much higher than the
AC line frequency and the input voltage is constant
during one switching period.
(2)
(3)
Lr
Cr
Mode4 (T3-T4) : At T3, the current through Lr changes
its direction and the diode D2 begins to conduct. Cr is
charged through D2 and S1 resonating with Lr. Even
though there exists another charging path through the
antiparallel diode of S2, Cr is charged only through D2 and
S1. This is because the voltage drop of S1 counterbalances
the voltage drop of D2, which makes low impedance
current path through D2 and S1. The current through the
main switch decreases until it reaches zero. The voltage of
Cr and the current of the main switch are obtained as :
Vcr (t ) = −Vo cos( wr (t − T3 ))
V
I S1 (t ) = I s − o sin( wr (t − T3 ))
Zr
Improved ZCS
-
I S 2 (t ) =
Main switch
current
Input
current
(1)
Mode2 (T1-T2) : The input current flows through S1 and
Lr. During this mode the ouput diode remains in the OFF
state and the voltage of the resonant capacitor Cr is clamped
at the output voltage Vo.
S2
+
The proposed converter has seven operation modes
during one switching cycle. The key waveforms and the
equivalent circuit of each operation mode are shown in Fig.
3 and 4, respectively.
(4)
(5)
Mode5 (T4-T6) : At T4, the current through S1 reaches
zero and the anti-parallel diode of S2 begins to conduct.
When the current S2 reaches its negative peak value at T5,
the gate-drive signals for S1 and S2 are disabled at the
same time and both switches are turned off with zero
currents.
Mode6 (T6-T7) : The input current flows through D2
charging Cr, and the voltage of Cr linearly increases until it
reaches Vo at T7.
Mode7 (T7-T8) : When the voltage of Cr reaches Vo, D2
turns off and D1 begins to conduct at T7. During this mode,
the entire input current flows to the output through D1 and
Lr. Since the voltage of Cr is clamped at Vo, D2 turns off
with zero voltage.
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The effective duty ratio Deff is different from the actual
duty ratio D. From the input-output power balance equation,
the effective duty ratio is obtained as :
D
S1
D1
S2
VS1
V
, IS1 S1
VS2
, IS2
VO
IS
IS1
Deff = − D01 + D56 + D67 + D
VS1
VS2
where
VO
IS2
D56
IS
D67 =
Vcr
2VO
IS
VD1
, ID1
ID1
VD1
ID1
VO
VD2
, ID2
IS
VD2
T0
T7 − T6 CrVo
=
[ 1 − sin( wr D56Ts ) ]
Ts
I sTs
(9)
T1
T2
ILr
T3 T4 T5 T6 T7
T8
D1
D1
Lr
Vcr
+
S2
Is
Vcr
+
S2
S1
-
Cr
Cr
-
Vo
Vo
D2
D2
Mode 1 (T0-T1)
Mode 2 (T1-T2)
ILr
D1
ILr
Lr
S1
Vcr
+
Is
S1
-
Cr
-
Cr
-
Vo
D2
-
+
Vo
D2
Mode 3 (T2-T3)
Mode 4 (T3-T4)
ILr
D1
ILr
Lr
S1
Vcr
+
S2
+
D1
Vcr
+
Is
-
Cr
Vcr
+
S2
S1
Cr
Vo
D2
Mode 5 (T4-T6)
D1
Tr n
−1
(12)
[1 − sin(cos ( I s ))]
Isn
From the effective duty ratio, the dc voltage gain is
obtained as
V
1
(13)
M = o =
Vs 1 − Deff
n
Fig. 5 shows the effective duty ratio of (12) as a
function of normalized input current with different
normalized resonant periods when D is 0.5. As can be seen,
the effective duty ratio is larger than the actual duty ratio, D
and increases as the resonant period or input current
increases.
D eff
T r n = 0 .1
-
0.66
T r n = 0 . 08
0.64
Mode 6 (T6-T7)
ILr
Tr n
⋅ I s n + Tr n cos −1 ( I s n )
2
0.68
Vo
D2
+
(11)
0.70
Lr
S2
t
D1
Lr
S2
Zr Is
Vo
the effective duty ratio is expressed as :
Deff = D −
ILr
Lr
S1
By defining the normalized resonant period and the
normalized input current, respectively as :
T
(10)
Tr n = r
2π Ts
Isn =
ID2
Fig. 3 Key waveforms of the ZCS Boost PFP
Is
(8)
Tr=2π/wr , and Ts is a switching period.
-VO
Is
(7)
Vo
Z I
T
= r
[1 − sin(cos −1 ( r s ))]
2π Ts Z r I s
Vo
VO
Is
T1 − T0
LI
T Zr I s
= r s = r
2Ts
2VoTs 4π Ts Vo
T −T
T
Z I
= 6 5 = r cos −1 ( r s )
2π Ts
Ts
Vo
D01 =
VS2
ILr
(6)
0.62
T r n = 0 . 06
0.60
Lr
Is
S1
S2
Cr
Vcr
+
0.58
-
0.56
T r n = 0 . 04
Vo
D2
Mode 7 (T 7-T8)
0.54
0.52
T r n = 0 . 02
0.5
Fig. 4 Operation modes
0.6
0.7
0.8
D=0.5
0.9
1.0
Isn
Fig. 5 Effective duty ratio (Deff) as a function of Isn (D=0.5)
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IV. DESIGN PROCEDURE AND EXAMPLE
In order to achieve zero current switching for the two
active switches, the following conditions should be
satisfied
I Lf . peak max < I r peak =
D1 =
Vo
Zr
(14)
3 Tr
> Dmin
4 Ts
does not influence the circuit operation, IBGT with antiparallel diode is selected to protect IGBT from reverse
breakdown. To prevent ringing of the voltages of the main
switches, a simple clamp circuit is used. The clamp circuit
consists of a low voltage zener diode in series with the
clamp diode. The voltages of the switches are clamped to a
voltage slightly higher than the output voltage.
(16)
where
Lf
ηeVs rms
rms
V rms Vo − 2 Vs
+ s
⋅
Ts )
Lf
Vo
(15)
, Irpeak is the peak value of the resonant current, D1 is the
duty ratio of the auxiliary switch, Dmin is the minimum duty
ratio,ηe is the expected efficiency, Po is the rated output
power.
In order to effectively reduce the turn-off switching loss
of IGBT, the voltage across IGBT need to remain at zero
for a certain period of delay time, after the switch current is
reduced to zero. During the delay time, the majority of the
excess carriers are recombined inside the device, thus
eliminating the turn off current tail of the IGBT [9]. As a
rule of thumb, the resonant period Tr is selected as
Tr ≅ (4 − 6) ⋅ T f
(17)
where Tf is the fall time of the switching device.
Design example
The specifications of the boost PFP are as follows;
Vs (Input voltage) : 187-253 Vrms (220V±15%)
Vo (Output voltage) : 400V
Po (Rated output power) : 1.2 kW,
fs (Switching frequency) : 72kHz
ηe (Expected efficency) : 0.95
Lf (Inductor) : 600 µH
1. The peak value of the inductor current is obtained from
(15) as ;
I Lf . peak = 11.8 A
2. By choosing the peak value of the resonant current as
13.5A, Zr is determined as 29.6 Ω. The resonant period,
Tr is chosen to be 3µsec. Then, Lr and Cr are designed
as 15 µH and 17 nF , respectively.
3. The duty ratio of the auxiliary switch is determined to
be 0.227 from (16).
V. EXPERIMENTAL RESULTS
In order to show the improved performance of the
proposed converter, the 1.2 kW prototype boost PFP
operating at 72kHz has been built. The specifications of the
converter are same with those of the design example. The
schematic of the converter is shown in Fig. 6. For the main
switch, 600V IGBT with a anti-parallel diode,
IRGPC40UD is used. Even though the anti-parallel diode
Lr
D1
+
S2
S1
Cr
Co
Vo
AC
I Lf . peak ≅ 2 (
Po
D2
-
Rsense
S1
S2
PWM controller
(UC3854)
S1 : IRGPC40UD
D1: DSEI 30-10A
Lr1 : 15 µH (PQ2620)
Lf : 600 µH (PQ5050)
Fig. 6
S2 : IRG4BC30UD
D2 : MUR860
Cr : 16nF
Co : 470 µF /450V
Schematic of the new ZCS Boost PFP
Fig. 7 shows current and voltage waveforms of the
main switch and the auxiliary switch. The waveforms of
Fig. 7 are obtained with the minimum input voltage, i.e.
187 Vrms, which is the worst case for ZCS. Fig. 7 (a) and
(b) are obtained when the input voltage is near its peak
value, while Fig. 7 (c) and (d) are obtained when the input
voltage is near zero. As can be seen, the main switch turns
off under zero current condition without additional current
stress. The auxiliary switch also turns off with zero current.
Fig. 8 shows the waveforms of the line voltage and the
input current measured when the input voltage is 220 Vrms.
As can be seen in Fig. 8, the input current is in phase with
the line voltage. The PF (Power Factor) of the proposed
circuit is almost unity (0.993) and THD (Total Harmonic
Distortion) is 4.7%. Fig. 9 shows the line harmonic currents
of the proposed converter. It shows that the proposed
circuit meets the EN60 555-2 requirement as well as IEC
1000-3-2.
Fig.10 shows the efficiency curves versus output power
with different approaches. The efficiencies were measured
using Voltech power analyzer (PM3300). For a proper
comparison, the previous ZCS approach of [3], [4] have the
same resonant components with those of the proposed
approach. The proposed approach shows better efficiency
than the previous ZCS approach and the maximum
efficiency is 96.7%. As the load level decreases, the
efficiencies of the ZCS schemes drop since the resonant
energy is constant, which is the common characteristic of
the ZCS approaches. However, the proposed scheme has
higher efficiency than the hard switching approach down to
the 25% load, since the additional conduction loss is
minimized.
0-7803-7405-3/02/$17.00 (C) 2002 IEEE
(a)
(b)
(c)
(d)
(a), (b) are voltage and current waveforms of the main switch and the auxiliary switch, respectively, when the input voltage is near its peak value
(c), (d) are voltage and current waveforms of the main switch and the auxiliary switch, respectively, when the input voltage is near zero
Fig. 7 Voltage and Current waveforms of the main switch and the auxiliary switch (scale : 2us/div)
Current (A)
2.5
IEC 1000-3-2
2
EN60 555-2
1.5
Measured value
1
0.5
0
3
5
7
9
n-th Harmonics
Fig. 8 Input voltage and input current
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Fig. 9 Harmonic currents
11
13
98
[9] K. Wang, G. Hua and F. C. Lee, “Analysis, design and ZCS-PWM
Boost converters,” IEEJ International Power Electronics Conference,
pp.1202 –1207, 1995
[10] H. S. Choi and B. H. Cho “Zero Current Switching (ZCS) PWM
Switch Cell Minimizing Additional Conduction Loss,” KIPE Power
Electronics Autumn Conference, pp.159–162, 2000.
[11] H. S. Choi and B. H. Cho, “Novel Zero-Current-Switching (ZCS)
PWM Switch Cell Minimizing Additional Conduction Loss”, IEEE
Power Electronics Specialist Conference Rec., pp. 872-877, 2001
Efficiency (%)
97
96
95
Proposed ZCS
94
Previous ZCS
93
Hard Switching
92
200
400
600
800
1000
1200
Output Power (W)
Fig. 10 Measured efficiency
VI. CONCLUSION
This paper has proposed a boost power factor preregulator (PFP) with an improved zero-current-switching
(ZCS) PWM switch cell. The improved ZCS PWM switch
cell provides zero-current-switching conditions for the
main switch and the auxiliary switch without additional
conduction loss of the main switch. The additional
conduction losses for the soft switching are minimized,
since the circulating current for the soft switching flows
only through the auxiliary circuit and minimum number of
switching devices are involved in the circulating current
path. The diodes commutate softly and reverse recovery
problems are alleviated. Design guidelines with a design
example are described and verified by experimental results
from the 1.2 kW prototype boost PFP operating at 72 kHz.
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