Duty Cycle (Jitter) Distortion with PRBS

advertisement
Duty Cycle (Jitter) Distortion with PRBS
AN1276
Whenever one measures a parameter, the result should be
tested against a norm of some sort, a calibration standard,
prior design, or competitors.
During the development of the FastEdge product line, several
competitor devices were evaluated in order to develop a
basis or norm.
This is not intended to rank vendors but only be a pure subjective engineering evaluation based on technical performances that were derived from empirical measurements in a
common hardware environment.
pinout and were tested on the same PCB board. This was a
pure science experiment, looking for results.
First data set results
Figure 1. JS1000 Results 2.1 GHz 31 bit PSRB
The First Data Set
The first tests were testes with the assistance of t; the
JS1000 Jitter measurement station from Agilent. This is a
complex system of many instruments and therefore has a
complex specification. However, “the RMS method uses the
resulting data of a standard phase noise measurement”…
“Followed by integration of the area under the phase noise
plot for selective bandwidths as defined in the ITU & Telecordia specs. : “The Jitter peak-to-peak method uses a direct
measurement of the output of the phase detector with a voltage peak detector.”
The Second Data Set
The latest Jitter measurement were measured on the LeCroy
WaveMaster 8500A, a 5GHz DSO with a 1ppm clock accuracy and a jitter noise floor of 1ps. [This last figure is an
important value to remember.] Since this scope along with
the family members that reach across 6GHz now are common in the industry and have received good press, those
numbers will be presented.
In all cases, devices of the verification trial had the same
October 14, 2010
Additional data follows that developed this stance.
The two spurs neon look appear to be of the pcb or the facility. It is something that the JS1000 didn't see under the calibration or baseline generation.
The First data exhibits follows:
All examples except Cypress Cy2DP3110 contain large collected sets of spurs and many single spurs. Cy2DP3110 is
rather clean except for the 100 KHz spurs (1). The origin of
the collected sets of spurs is maintained in other internal
design documents and are not intended for publication. The
other vendor parts had these cluster of spurs so close to the
fundamental frequency and rather intense in power - these
are likely the major jitter sources.
Baseline - peak to peak of 25.79 femto seconds 2.1 GHz
Document No. 001-19339 Rev. *A
1
[+] Feedback
AN1276
The First Data Set Exhibits
Figure 2.
Figure 3. Cypress Cy2DP3110
Notice the rather clean noise floor, (less the two Spurs that
are likely due to the PCB hardware .Noise is below 100 dBc.
Figure 4. Competitor A
This baseline was generated with the input cable tied to the
output cable. The test PCB was not inserted at this time. A 2
GHz, 31 bit PRBS bit stream was sent through the system.
With an unknown ground floor, we measure 25.79 femto seconds as we determine the general noise floor concept for this
configuration.
First we will look at the Phase Noise Generation charts of the
three vendors. They contain log charts of the dBc/Hz vs. Hz
thereby the background noise and noise rejection can be
determined. The horizontal scale is Frequency from the
intended frequency. The vertical is signal power. These are
very graphical and provide some insight into the internal
designs.
The spurs and bunched collections are Static noise generators of design faults of one type or another. Random noise is
the baseline.
After the Phase Noise Generation figures are the various Jitter histograms captured during the long stream of 31bit
PRBS data.
October 14, 2010
This device has a massive collection of spurs, others at 3, 7
and 700 Khz as well. Noise is up to -70 dBc.
Document No. 001-19339 Rev. *A
2
[+] Feedback
AN1276
Figure 7. Competitor A
Figure 5. Competitor B
This device has a wide collection of spurs, but fewer single
spurs - several extra ones around 28 kHz and noise up to
– 65 dBc.
Next, we will look at the histogram data and calculations.
These show the 31 Bit PRBS 2G information. This is Phase
Noise Generation.
Figure 6. Cypress CY2DP3110
October 14, 2010
Figure 8. Competitor B
Document No. 001-19339 Rev. *A
3
[+] Feedback
AN1276
The Second Data Set
Figure 10.
Was the first set faulty? The first data set Waveforms were
taken from the measured output, so the devices were functional. Another lab experiment was due. This time, bench
instruments were used, a customer likely would use. A new
state of the art DSO from LeCroy, they have a higher speed
model now, was selected for the appeal. A low jitter source
generator and a new JEDEC approved 44 bit PRBS bit
stream was programmed into the Sony-Tektronix generator.
The stream is “0000 0101 0100 1100 1100 1100 0111 0001
1100 0111 0101” and was repeated 9 times before the generator pattern was looped back to the first bit. If the stream
causes some minor eye focus issue - it is doing exactly that
to the devices. providing a complex pattern of bit packets that
make the internal devices switch in these Pseudo random
ways. There are long pulses, and fast toggles in buckets of 1,
2 and 4 bits wide.
The first set of results were reinforcing, as it should have
been, to the first high tech measurement. In fact, the results
were better than was felt possible. Further thought resolved
the doubts but raised another. Below is the results based on
the Cypress device. The measurement is below the noise
floor, therefore the jitter generation value is almost non-existent!
The Second test results (Cypress CY2DP3110
only) :
Remember the 1 ps noise floor from page 1?
If femto seconds are here, then atto seconds around the corner (2). Actually, for years we have been able to generate
numbers we can’t measure, and from time to time, measure
something that is far below the rational measurement level.
The issue at hand is accuracy vs. precision.
The dictionary states :
Precision:
1.
Figure 9.
The state or quality of being precise; exactness.
•a.The ability of a measurement to be consistently reproduced.
•b.The number of significant digits to which a value has
been reliably measured.
Accuracy:
PRBS 1.1Mb/s .The jitter measurements were taken on the
1x waveforms at the center of the screen.The small blue/red
pulses are less than a nanosecond wide.Yellow=source.
October 14, 2010
1.
Conformity to fact.
2.
Precision; exactness.
3.
The ability of a measurement to match the actual value of
the quantity being measured.
Precision means that one can measure something over and
over obtaining the same results. Precision means repeatability, and reliability. An example might be measurements taken
with an instrument that is out of calibration. The measurements are always the same but don’t really reflect the real
value.
Accuracy is the ability to measure what is really the actual
value. This is the most difficult one of the two. One first must
determine what is the actual value is or know it is the true
goal. This is why instruments are standardized on a periodic
basis such that they carry the certification of accuracy. This
certification helps qualify the data measured to be accurate
when the methodology of measurement is done properly.
Document No. 001-19339 Rev. *A
4
[+] Feedback
AN1276
The general concept brought during the accuracy measurements is measuring something that is decades of measurement value below the main signal. A signal to noise issue.
Noise floors are the limits that below them values can be
calculated and even measured but accuracy isn’t
present. Above the noise floor accuracy is possible.
So what is all of this femtosecond stuff anyway?
The noise floor is 1 ns. Measured values below this level indicate two points of fact.
1. The measured value can be stated as less than that of
noise floor. e.g. < 1 ps
2.
The measured value is below this value since accuracy
returns at the noise floor level. In one sense, zero jitter
was found in the Cypress device, since the noise below
the floor could be in the measurement system itself.
Figure 12. The LeCroy 8500 DSO
The generator used with the LeCroy.
Figure 13. Sony-Tektronix DG2040 Generator (family)
The equipment exhibit
The following equipment pictures are standard ‘JPEG’ versions taken from the respective websites.
Figure 11. The Agilent Technologies JS-1000
Notes
1. The input drive entered the board from 2 meter long semi-rigid coax. Once entering the board, the signals, differential, routed to the device and ‘flew by’ back
out the edge of the board to a termination resistor. Fly-by-technique is used for these high speed devices. This long path that reflects waveforms due to
inconsistent properties of the coax, p.c.b. material and termination load. This pcb was not used in the baseline measurement. The baseline measurement
utilized the 2m cables tied output to input through a SMA barrel
2. Femto-seconds = 1x10-3 pico-seconds. Atto-seconds is 1 x 10-3 femto-seconds.
October 14, 2010
Document No. 001-19339 Rev. *A
5
[+] Feedback
AN1276
Document History Page
Document Title: Duty Cycle (Jitter) Distortion With PRBS - AN1276
Document Number: 001-19339
Orig. of Submission
Change Date
Description of Change
Revision
ECN
**
1408983 YIS
07/14/2003
New Document
*A
3059376 SAAC
10/14/2010
Reviewed Content - No Change
In March of 2007, Cypress recataloged all of its Application Notes using a new documentation number and revision code. This new documentation
number and revision code (001-xxxxx, beginning with rev. **), located in the footer of the document, will be used in all subsequent revisions
All other trademarks or registered trademarks referenced herein are the property of their respective owners.
Cypress Semiconductor
198 Champion Court
San Jose, CA 95134-1709
Phone: 408-943-2600
Fax: 408-943-4730
http://www.cypress.com
© Cypress Semiconductor Corporation, 2003-2010. The information contained herein is subject to change without notice. Cypress Semiconductor
Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any
license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or
safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical
components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of
Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress
against all charges.
This Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide
patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal,
non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for
the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit
as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified
above is prohibited without the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to
make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any
product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or
failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress' product in a life-support systems application implies
that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
October 14, 2010
Document No. 001-19339 Rev. *A
6
[+] Feedback
Download