Integrated Power Management Solutions
ADI Announces a New Family
of Multichannel Regulators
Ultrasmall 12 V/5 V Quad Buck + LDO in LFCSP
ADP5050
12V/5V
INPUT
4A BUCK REG
4A BUCK REG
1.2A BUCK REG
OPTIONAL
I 2C
1.2A BUCK REG
200mA LDO
1.2V @ 4A
2.5V @ 4A
3.3V @ 1.2A
1.5V @ 1.2A
VCORE
VAUX
VIO
FPGA/
PROCESSOR
MGT
DDR MEMORY
1.2V @ 200mA
PWRGD
Fixed and Adjustable Output Voltages
Wide Range of Switching Frequency
Operation (250 kHz to 1.4 MHz)
Resistor Programmable Current Limit
on Buck 1 and Buck 2 (4 A, 2.5 A, 1.2 A )
Simple Power Supply Sequencing
Frequency Synchronization
Input or Output
LDO or POR/WDI Options
www.analog.com/power
ADP5050/ADP5051/ADP5052/ADP5053
Quad Buck Switching Regulator with LDO or POR/WDI in LFCSP
ADP5051/
ADP5053
ADP5050/
ADP5052
12V/5V
INPUT
OPTIONAL
I 2C
12V/5V
INPUT
4A BUCK REG1
1.0V
2.5V
4A BUCK REG1
2.5V
1.2A BUCK REG
1.8V
1.2A BUCK REG
1.8V
1.2A BUCK REG
3.3V
1.2A BUCK REG
3.3V
4A BUCK REG1
1.2V
4A BUCK REG1
200mA LDO
OPTIONAL
I 2C
MR
WDI
1.5V
PWRGD
POWER-ON
RESET AND
WATCHDOG
VTHR
RESET
PWRGD
1Resistor programmable current limit (4 A, 2.5 A, or 1.2 A).
Key Features
• Wide input voltage range: 4.5 V to 15 V
• ±1.5% output accuracy over full temperature
range
• 250 KHz to 1.4 MHz adjustable switching
frequency
• Adjustable/fixed output options via factory
• Pseudo-DVS: dynamic voltage scaling
• I2C interface with interrupt supportive on fault
condition
• CH1/CH2: programmable 1.2 A/2.5 A/4 A sync
buck regulator with low-side FET driver
• CH3/CH4: 1.2 A sync buck regulator
• CH5: 200 mA low-dropout LDO or watchdog
timer and power on reset
• Precision enable on 0.8 V accurate threshold
•
•
•
•
•
•
•
•
Active output discharge switch
FPWM/PSM mode selection
Frequency synchronization input or output
Power-good flag on selective channels
Startup with the precharged output
48-lead, 7 mm × 7 mm LFCSP package
−40°C to +125°C junction temperature
I2C functionality
I2C Functionality
VIN = 4.5V
TO 15V
PVIN1
VOUT1
PVIN2
nRSTO
PVIN3
WDI
PVIN4
ALWAYS ON 5V LDO
SDA
SCL
EN1
ADP5051
EN2
EN3
nINT
VOUT2
VOUT3
EN3
MR
VOUT4
VCORE
RESET
ADP505x IC
GPIO
PROCESSOR
SDA
SCL
INT
VDDIO
28.3mm × 21.2mm
MEM
SUBSYSTEM
PWRGD
ADP5051 application diagram featuring the I 2C interface.
ADP505x solution size only 28.3 mm × 21.2 mm.
Option 1: Resistor programmable output voltage
from 0.8 V to VIN ∙ 0.85
Option 2: Fixed output voltage with I2C
programmability with these ranges for each channel
12V INPUT
12V INPUT
VOLTAGE
VOLTAGE
10.2V
10.2V
(ADJUSTABLE)
(ADJUSTABLE)
115˚ 115˚
(ADJUSTABLE)
(ADJUSTABLE)
JUNCTION
JUNCTION
TEMPERATURE
TEMPERATURE
[CH1: 0.85V~1.60V, 25mV STEP]
[CH2: 3.3V~5.0V, ~300mV STEP]
[CH3: 1.2V~1.80V, 100mV STEP]
INTERRUPT
INTERRUPT
[CH4: 2.5V~5.5V, 100mV STEP]
ADP505x output voltage options.
| Integrated Power Management Solutions
2
INTERRUPT
INTERRUPT
TIMETIME
Low input voltage detection on PVIN1.
Overheat function on junction temperature.
Part
Number
ADP5050
ADP5051
ADP5052
ADP5053
Number of
Outputs
2 × 4 A1 bucks
2 × 1.2 A bucks
1 × 200 mA LDO
2 × 4 A1 bucks
2 × 1.2 A bucks
2 × 4 A1 bucks
2 × 1.2 A bucks
1 × 200 mA LDO
2 × 4 A1 bucks
2 × 1.2 A bucks
VIN (V)
4.5 to 15
1.7 to 5.5
4.5 to 15
4.5 to 15
1.7 to 5.5
4.5 to 15
VOUT (V)
0.8 to 0.85 × VIN
0.8 to 0.85 × VIN
0.5 to 4.75
0.8 to 0.85 × VIN
0.8 to 0.85 × VIN
0.8 to 0.85 × VIN
0.8 to 0.85 × VIN
0.5 to 4.75
0.8 to 0.85 × VIN
0.8 to 0.85 × VIN
Max Output
Current (A)
1.2/2.5/41
1.2
200 mA
1.2/2.5/41
1.2
1.2/2.5/41
1.2
200 mA
1.2/2.5/41
1.2
Switching Frequency
Range
250 kHz to 1.4 MHz
I2C
Reset Trip
Threshold (V)
Min Reset
Timeout (ms)
Typ Watchdog
Timeout (ms)
Package
Price 1k
List ($U.S.)
Yes
—
—
—
48-lead LFCSP
4.39
Yes
0.5 (adj)
1, 20, 140,
1120
6.3, 102, 1600,
48-lead LFCSP
25,600
4.59
—
—
—
—
0.5 (adj)
1, 20, 140,
1120
—
250 kHz to 1.4 MHz
250 kHz to 1.4 MHz
—
48-lead LFCSP
3.59
6.3, 102, 1600,
48-lead LFCSP
25,600
3.79
—
250 kHz to 1.4 MHz
1Resistor programmable current limit (4 A, 2.5 A, or 1.2 A).
ADP5050/ADP5052 Small Cell Applications Example
ADP5050/ADP5052
1.0V@4A
VCORE
DUAL
FETS
12V INPUT
VDDIO
4A BUCK
REGULATOR
4A BUCK
REGULATOR
DDR3
1.5V@1.2A
PWRGD
1.2A BUCK
REGULATOR
200mA LDO
DIGITAL BASEBAND
ADP1741
1.8V@1.2A
VDD_1V3
VDD_INTERFACE
3.3V@0.2A
VDD_GPO
ADP150
1.2A BUCK
REGULATOR
RF
TRANSCEIVER
TCXO
PA
4.5V@1.2A
Support flexible power-up sequence by precision enable and PWRGD.
ADP5050/ADP5052 Power for FPGA Applications Example
ADP5050/ADP5052
4.5V TO 15V
INPUT VOLTAGE
4A BUCK
REGULATOR
1.2V/4A
VCCINT
2.5V/4A
VCCAUX
VCCO_0, 1, 2
1.5V/1.2A
1.2A BUCK
REGULATOR
0.75V
1.2A BUCK
REGULATOR
2.5V
CORE
VOLTAGE
FETS
4A BUCK
REGULATOR
3.3V/1.2A
VCC0_3
DDR
TERM. LDO
FPGA
AUXILIARY
VOLTAGE
BANK 0
I/Os BANK 1
BANK 2
I/Os BANK 3
VPLL
DDR3
MEMORY
FLASH
MEMORY
1.2V/100mA
200mA LDO
PWRGD
www.analog.com/power | 3
ADP5034
Dual, 3 MHz, 1.2 A Buck Regulator with Two 300 mA LDOs in LFCSP
Key Features
•
•
•
•
•
•
•
•
•
Input voltage range: 2.3 V to 5.5 V
Two 1.2 A buck regulators
Two 300 mA LDOs
Regulator accuracy: ±1.8%
Overcurrent and thermal
protection
Soft start
Undervoltage lockout
Factory-programmable or
external adjustable VOUTx
Buck 1 and Buck 2 key
specifications
• High efficiency: up to 96%
• Current-mode architecture
• 3 MHz operating frequency
• Forced PWM and auto PWM/
PSM modes
• Out of phase operation for
reduced input filtering
• LDO1 and LDO2 key specifications
• Stable with 1 μF ceramic
output capacitors
• High PSRR: 65 dB PSRR
1 kHz to 10 kHz
• Low output noise:
80 μV rms typical output noise
at VOUT3 = 2.5 V
• Low dropout voltage: 150 mV
@ 300 mA load
• Low input supply voltage from
1.7 V to 5.5 V
• −40°C to +125°C junction
temperature
• ADP5034: 24-lead, 4 mm ×
4 mm LFCSP package
• ADP5034: 28-lead TSSOP
• ADP5033: 16-lead WLCSP
PROCESSOR
ADP5034
AVIN
VOUT1
VCORE
SW1 L1 1𝛍H
VIN1
C1
10𝛍F
MODE
GPIO
EN2
OFF
VIN2:
2.3V
TO 5.5V
VOUT2
VIN2
1.2A
BUCK2
C2
10𝛍F
VIO
SW2 L2 1𝛍H
VIN3:
1.7V
TO 5.5V
VIN3
C3
1𝛍F
ON
R4
ANALOG
SUBSYSTEM
C7
2.2𝛍F
R6
VIN4
VOUT4
300mA
LDO2
C4
1𝛍F
ON
VANA
R5
FB3
EN3
VDIG
R7
FB4
C8
2.2𝛍F
R8
EN4
OFF
C6
10𝛍F
VOUT3
300mA
LDO1
OFF
VIO
R3
FB2
PGND2
VIN4:
1.7V
TO 5.5V
C5
10𝛍F
R2
PGND1
EN1
ON
VCORE
R1
FB1
1.2A
BUCK1
AGND
ADP5034 functional block diagram.
ADP5034 Micro PMU Advantages
0402 CHIP
RESISTOR
0402 CHIP
CAPACITOR
ADP5037/ADP5034
4-CHANNEL MICRO PMU
0402 CHIP
RESISTOR
0402 CHIP
CAPACITOR
0402 CHIP
CAPACITOR
0402 CHIP
CAPACITOR
0402 CHIP
CAPACITOR
0402 CHIP
RESISTOR
0402 CHIP
CAPACITOR
0402 CHIP
CAPACITOR
0402 CHIP
RESISTOR
0402 CHIP
RESISTOR
0402 CHIP
RESISTOR
0603 CHIP
CAPACITOR
0402 CHIP
CAPACITOR
300mA LDO
SOT-23-5
0806 CHIP
INDUCTOR
0402 CHIP
RESISTOR
0402 CHIP
RESISTOR
0402 CHIP
RESISTOR
0402 CHIP
RESISTOR
0402 CHIP
RESISTOR
10.6 mm
25% LESS BOARD SPACE REQUIRED
0402 CHIP
RESISTOR
9.3mm
• Lower cost, requires fewer external components
• Bucks are internally synchronized and out of phase
• Smaller board size
• Better thermal dissipation using the exposed pad
• Easier layout implementation
| Integrated Power Management Solutions
4
0806 CHIP
INDUCTOR
0603 CHIP
CAPACITOR
0603 CHIP
CAPACITOR
0402 CHIP
RESISTOR
0402 CHIP
CAPACITOR
0402 CHIP
RESISTOR
300mA LDO
SOT-23-5
6.8 mm
0806 CHIP
INDUCTOR
0402 CHIP
RESISTOR
800mA BUCK
SOT-23-5
0806 CHIP
INDUCTOR
0603 CHIP
CAPACITOR
0603 CHIP
CAPACITOR
800mA BUCK
SOT-23-5
MICRO PMU IMPLEMENTATION
0402 CHIP
RESISTOR
0402 CHIP
CAPACITOR
10.4mm
0603 CHIP
CAPACITOR
TRADITIONAL IMPLEMENTATION
ADP5040 and ADP5041
ADP5040: 1.2 A Buck and Dual 300 mA LDO
with Individual Enables in LFCSP
ADP5041: 1.2 A Buck and Dual 300 mA LDO, Supervisory,
Watchdog, and Manual Reset in LFCSP
ADP5041
ADP5040
AVIN
AVIN
SW L1 1𝛍H
SW L1 1𝛍H
1.2A
BUCK
C5
10𝛍F
ON
EN1
OFF
R1
FB1
R2
VIN2
300mA
LDO1
C1
1𝛍F
ON
EN2
ON
EN3
OFF
OFF
VIN1
VIN1: 2.3V
TO 5.5V
ON
PGND
MODE
FPWM
PSM/PWM
VOUT2
R3
FB2
VIN2
VIN2: 1.7V
TO 5.5V
VOUT2
@ 300mA
C2
2.2𝛍F
ON
C3
1𝛍F
R5
FB4
R6
AGND
C4
2.2𝛍F
EN3
OFF
VIN3: 1.7V
TO 5.5V
FB2
VIN3
C2
2.2𝛍F
nRSTO
MICROPROCESSOR
WDI
VTHR
R5
R6
VOUT3
300mA
LDO2
C3
1𝛍F
VOUT2
@ 300mA
R3
R4
EN2
ON
VOUT3
@ 300mA
FPWM
PSM/PWM
VOUT2
300mA
LDO1
EN_LD01
C1
1𝛍F
OFF
VOUT1
@ 1.2A
C6
10𝛍F
R1
R2
EN1
MR
300mA
LDO2
FB1
1.2A
BUCK
C5
10𝛍F
OFF
R4
VIIN3
VIN3: 1.7V
TO 5.5V
C6
10𝛍F
PGND
MODE
VIN2: 1.7V
TO 5.5V
VOUT1
@ 1.2A
SUPERVISOR
VIN1
VIN1: 2.3V
TO 5.5V
VOUT1
VOUT1
FB4
VOUT3
@ 300mA
C4
2.2𝛍F
R7
R8
AGND
ADP5040 functional block diagram.
ADP5041 functional block diagram.
Key Features
• Input voltage range: 2.3 V to 5.5 V
• One 1.2 A buck regulator, fixed and adjustable
output voltages, up to 96% efficiency
• Two 300 mA LDOs, fixed and adjustable outputs
• 20-lead, 4 mm × 4 mm LFCSP package
• Initial regulator accuracy: ±1%
• Overcurrent and thermal protection
• Soft start
• Undervoltage lockout
• Open-drain processor reset with external
adjustable threshold monitoring
• ±1.5% threshold accuracy over the full
temperature range
•
•
•
•
Guaranteed reset output valid to VCC = 1 V
Manual reset input
Watchdog refresh input
Two reset timeout options: 20 ms and
140 ms (minimum)
• Two watchdog timeout options: 102 ms
and 1600 ms (typical)
ADP5041 Delivers Improved System Reliability by Integrating Power-On Reset
and Watchdog Functionality
ADP5041
VCC
VOUT1
1.2A BUCK
300mA LDO
300mA LDO
VOUT2
ADP5040
VOUT3
INPUT VOLTAGE
3.3V/5V
VTHR
RESET
WDI
MR
VOUTX/VCC
RESET
MICROPROCESSOR
OR FPGA
300mA LDO
300mA LDO
ADP1755
OPTIONAL LDO 1.8V
3.3V
ADI
TRANSCEIVER
VANALOG
VINTERFACE
VGPO
VTH
140ms
1.6s
WDI
±1.5% trip threshold accuracy to monitor low voltage core rails.
1.2A BUCK
1.3V
140ms
• Single-chip power companion IC for wideband RF transceivers.
• Small power management footprint, 3 MHz buck regulator uses
very small multilayer inductor.
Powering noise sensitive RF transceiver.
www.analog.com/power | 5
I 2C refers to a communications protocol originally
developed by Philips Semiconductors (now NXP
Semiconductors).
©2013 Analog Devices, Inc. All rights reserved.
Trademarks and registered trademarks are the
property of their respective owners.
Printed in the U.S.A.
BR09543-5-4/13(A)
www.analog.com/power
Dual, 1.2 A buck with
300 mA LDO
Dual, 3 MHz buck
regulator with dual LDO
ADP5024
ADP5033
1.8 to 5.5
Buck: 4.5 to 15
Triple, 200 mA LDO
Quad buck regulator +
LDO with I2C
Quad buck regulator +
POR and WDI with I2C
Quad buck
regulator + LDO
Quad buck regulator +
POR and WDI
ADP323
ADP5050 New
ADP5051 New
ADP5052 New
ADP5053 New
1Resistor programmable current limit (4 A, 2.5 A, or 1.2 A).
Buck: 4.5 to 15
LDO: 1.7 to 5.5
Buck: 4.5 to 15
Buck: 4.5 to 15
LDO: 1.7 to 5.5
1.8 to 5.5
1.8 to 5.5
Triple, 200 mA LDO
Triple, 200 mA LDO
ADP320
3 MHz buck regulator with Buck: 2.3 to 5.5
LDO, supervisor, and dual
watchdog timers
LDO: 1.7 to 5.5
ADP5043
ADP322
3 MHz buck regulator with Buck: 2.3 to 5.5
dual LDO, supervisor, and
dual watchdog timers
LDOs: 1.7 to 5.5
LDOs: 1.7 to 5.5
Buck: 2.3 to 5.5
LDOs: 1.7 to 5.5
Buck: 2.3 to 5.5
0.8 to 0.85 × VIN
0.5 to 4.75
0.8 to 0.85 × VIN
0.8 to 0.85 × VIN
0.5 to 4.75
0.8 to 0.85 × VIN
Buck: 3.3, 3.0, 2.8, 2.5, 2.3, 2.0, 1.82, 1.8,
1.6, 1.5, 1.4, 1.3, 1.2, 1.1, 1.0, 0.9
LDOs: 3.3, 3.0, 2.8, 2.5, 2.25, 2.0, 1.8, 1.7,
1.6, 1.5, 1.2, 1.1, 1, 0.9, 0.8
Buck: 3.3, 3.0, 2.8, 2.5, 2.3, 2.0, 1.82, 1.8,
1.6, 1.5, 1.4, 1.3, 1.2, 1.1, 1.0, 0.9
LDOs: 3.3, 3.0, 2.8, 2.5, 2.25, 2.0, 1.8,
1.7, 1.6, 1.5, 1.2, 1.1, 1, 0.9, 0.8
LDO1: 3.3; LDO2: 1.8, 3.3; LDO3: 1.5
LDO1: 3.3, 2.8, 2.5; LDO2: 2.8, 2.5, 1.8;
LDO3: 1.8. 1.5, 1.2
Adj (0.5 to 5)
Adj (0.8 to 4.75)
Adj (0.8 to 3.8)
Adj (0.8 to 4.75)
Adj (0.8 to 3.8)
Adj (0.8 to 4.75)
LDOs: 1.7 to 5.5
LDOs: 1.7 to 5.5
Bucks: 2.3 to 5.5
Bucks: 2.3 to 5.5
LDOs: 1.7 to 5.5
Bucks: 2.3 to 5.5
LDOs: 1.7 to 5.5
LDO: 1.7 to 5.5
Buck: 2.3 to 5.5
Bucks: 2.3 to 5.5
LDOs: 1.7 to 5.5
Bucks: 2.3 to 5.5
VOUT (V)
Buck: 3.3, 3.0, 2.8, 2.5, 2.3, 2.0, 1.82, 1.8,
1.6, 1.5, 1.3, 1.2, 1.1, 1.0, 0.9, 0.8
LDOs: 3.3, 3.0, 2.9, 2.8, 2.775, 2.5, 2.0, 1.875,
1.8, 1.75, 1.7, 1.65, 1.6, 1.55, 1.5, 1.2
Adj (0.8 to 3.8)
Adj (0.8 to 4.75)
Adj (0.8 to 3.8)
Adj (0.8 to 4.75)
Buck: 3.3, 3.0, 2.8, 2.5, 2.3, 2.0, 1.8,
1.6, 1.5, 1.4, 1.3, 1.2, 1.1, 1.0, 0.9
LDOs: 3.3, 3.0, 2.8, 2.5, 2.25, 2.0, 1.8,
1.7, 1.6, 1.5, 1.2, 1.1, 1.0, 0.9, 0.8
Adj (0.8 to 3.8)
Adj (0.8 to 4.75)
Adj (0.8 to 3.8)
VIN (V)
ADP5042
ADP5041
ADP5040
ADP5037
Dual, 3 MHz buck
regulator with dual LDO
Dual, 3 MHz, 800 mA
buck regulator with dual
300 mA LDO
3 MHz buck regulator with
dual LDO
3 MHz buck regulator with
dual LDO, supervisor, and
watchdog timer
Dual, 800 mA buck with
300 mA LDO
ADP5023
ADP5034
Dual, 3 MHz buck
with 150 mA LDO
Product Description
ADP5022
Part Number
Integrated Power Management Solutions (Micro PMUs)
—
6.3, 102, 1600,
25,600
20, 140
20, 140
20, 140
—
—
—
1, 20, 140,
1120
—
1, 20, 140,
1120
0.5 (adj)
4.63, 3.08, 2.93,
2.63, 2.50, 2.35,
2.068, 1.692
4.63, 3.08, 2.93,
2.63, 2.50, 2.35,
2.068, 1.692
—
—
—
0.5 (adj)
—
0.5 (adj)
—
200
200
200
40001
1200
200
40001
1200
40001
1200
200
40001
1200
3 × LDO
3 × LDO
—
—
3 × LDO
2 × buck
2 × buck
1 × LDO
2 × buck
2 × buck
2 × buck
Yes
Yes
2 × buck
1 × LDO
2 × buck
2 × buck
—
—
300
—
1 × LDO
300
2 × LDO
—
—
—
800
1200
300
1200
1 × buck
2 × LDO
1 × buck
—
—
1 × buck
300
2 × LDO
—
—
—
—
—
1200
300
800
2 × buck
2 × LDO
2 × buck
—
—
—
300
300
2 × LDO
2 × LDO
800
2 × buck
—
—
—
0.54
4.39
16-lead LFCSP
16-lead LFCSP
Adjustable VOUT options
I2C interface with individual
enable pins and power good 48-lead LFCSP
Individual enable pins with
power good
48-lead LFCSP
3.79
3.59
Individual enable pins with
power good
48-lead LFCSP
4.59
0.54
0.54
16-lead LFCSP
Fixed VOUT options
Fixed VOUT options
1.79
1.99
1.79
1.39
20-lead LFCSP
20-lead LFCSP
20-lead LFCSP
20-lead LFCSP
Individual enable pins
and supervisor, WDI, WDI2,
mode pin and MR pin
Individual enable pins
and supervisor, WDI, WDI2,
mode pin and MR pin
Individual enable pins,
mode pin
Individual enable pins
and supervisor, WDI,
mode pin and MR pin
24-lead LFCSP
Mode pin, individual
enable pins
1.69
1.99
24-lead LFCSP
28-lead TSSOP
1.79
Mode pin, individual
enable pins
24-lead LFCSP
Mode pin, individual
enable pins
1.59
1.90
24-lead LFCSP
Mode pin, individual
enable pins
1.80
16-ball WLCSP
16-ball WLCSP
Mode pin, individual
enable pins
Price
($U.S.)
Mode pin, two enable pins
Package
Key Features
6.3, 102, 1600, I2C interface with individual 48-lead LFCSP
25,600
enable pins and power good
—
—
—
102, 1600
102, 1600
102, 1600
—
—
—
—
—
—
—
—
—
—
800
300
1200
300
2 × buck
1 × LDO
2 × buck
1 × LDO
—
Min Reset Typ Watchdog
Timeout (ms) Timeout (ms)
—
Reset Trip
Threshold (V)
—
—
800
150
1 × LDO
I2C
1 × buck
600
Output
Current
(mA)
2 × buck
Number of
Outputs
Analog Devices, Inc.
Worldwide Headquarters
Analog Devices, Inc.
Three Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
U.S.A.
Tel: 781.329.4700
(800.262.5643,
U.S.A. only)
Fax: 781.461.3113
Analog Devices, Inc.
Europe Headquarters
Analog Devices, Inc.
Wilhelm-Wagenfeld-Str. 6
80807 Munich
Germany
Tel: 49.89.76903.0
Fax: 49.89.76903.157
Analog Devices, Inc.
Japan Headquarters
Analog Devices, KK
New Pier Takeshiba
South Tower Building
1-16-1 Kaigan, Minato-ku,
Tokyo, 105-6891
Japan
Tel: 813.5402.8200
Fax: 813.5402.1064
Analog Devices, Inc.
Southeast Asia
Headquarters
Analog Devices
22/F One Corporate Avenue
222 Hu Bin Road
Shanghai, 200021
China
Tel: 86.21.2320.8000
Fax: 86.21.2320.8222
