ARQ-MFADC001
ARQ-MFADC002
RAD-HARD, 18 effective bits 5 MSPS ADC
FEATURES




Up to 18 bit resolution
Up to 5MSPS sampling
Up to 2.5MHz analog input
THD=74dB @ 5MHz
DESCRIPTION
ARQUIMEA’s ARQ-MFADC002 is a radiation
hardened 18b 5MSPS ADC available in a 64-pin
Ceramic Quad Flat Package.
The ARQ-MFADC002 design uses specific circuit
topology and layout methods to mitigate total
ionizing dose effects and single event latch-up.
These characteristics make the ARQ-MFADC002
especially suited for the harsh environment
encountered in Space missions. It is guaranteed
o
o
functionality from -55 C to +125 C and space
qualified.
APPLICATIONS






Aerospace instrumentation
Space data acquisition systems
High performance data acquisition systems
CCD signal processor
Radiation detector
Radiation spectrometer
GENERAL KEY SPECIFICATION






The ARQ-MFADC002 is especially designed to
optimize power consumption and dissipates less
than 50mW in normal operation for an 18 bit
effective resolution, while maintaining a proper
performance.
Nominal Power supply operation: 3.3V (I/O)
Analog Input Frequency: 100k to 5MHz
Analog input range: 2Vpp
o
o
Operational from –10 C to +85 C
o
o
Functional from –55 C to +125 C
Space qualified
RADIATION HARDENING
PARAMETER
Value
UNIT
COMMENTS
TID
300
Krad
TBC
2
SEL
60
MeVcm /mg
TBC
SEE performance 1E-10
Err/Bit/day
For GEO orbit TBC
2
SEU
55
MeVcm /mg No SEUs detected below this LET TBC
More information about radiation hardening features and radiation test conditions is available under request.
AVAILABLE OPTIONS
PRODUCT
Quality Level
PACKAGE (*)
OPERATING
TEMPERATURE
RANGE
ORDERING
NUMBER
ARQARQ-MFADC002 So
o
S (Space)
Die
-55 C to 125 C
MFADC002
DIE
ARQARQ-MFADC002
Bo
o
SCC B (Space)
xxx-pin LQFP
-55 C to 125 C
MFADC002
CQFPXXX
(*) other packaging options, including raw die format, are also available under request.
Description
Die
Package
ARQ-MFADC002 Draft A, Date: 25-07-2014
The information contained herein is as of publication issue. Production processing does not necessarily include testing of all parameters. This
documentation is not contractual and content delivery cannot be considered as an offer or contract. Under this document, the Company assumes no
obligation towards third parties, liability or guarantee whatsoever.
© Arquimea Ingeniería, S.L.U.
www.arquimea.com
1
ARQ-MFADC001
Index
FEATURES ................................................................................... 1
Glossary
APPLICATIONS ............................................................................ 1
ADC
ASIC
Bin.
Dec.
IC
LSB
MSB
POR
QA
S&H
SEE
SEL
SPI
TID
GENERAL KEY SPECIFICATION ..................................................... 1
DESCRIPTION .............................................................................. 1
RADIATION HARDENING ............................................................. 1
AVAILABLE OPTIONS ................................................................... 1
ABSOLUTE MAXIMUM RATING ................................................... 2
ELECTRICAL CHARACTERISTICS (at room temperature) .............. 3
DIE & PACKAGE PINOUT ............................................................. 4
IO pins Description ..................................................................... 4
Analog-to-Digital Converter
Application-Specific Integrated Circuit
Binary
Decimal
Integrated Circuit
Less Significant Bit
Most Significant Bit
Power-On Reset
Charge Amplifier
Sample and Hold
Single Event Effect
Single Event Latch-up
Serial Port Interface
Total Ionising Dose
ADC BLOCK DESCRIPTION ........................................................... 4
ESD CAUTION.............................................................................. 5
QUALITY STANDARDS ................................................................. 5
IMPORTANT NOTICE ................................................................... 5
Revision History ....................................................................... 7
ABSOLUTE MAXIMUM RATING
Description
Symbol
Maximum rating
Units
Peripheral I/O Supply
Voltage
VDDD
VDDA
4.5
V
Input Voltage
Vin
-0.5 to VDD + 0.5
V
Top
-55 to 125ºC
ºC
TSTG
-65 to 150
ºC
TSOL
300
°C
Operational
temperature range
Storage Temperature
(non-operating temp.)
Soldering lead
temperature (10 s)
Recommended max
operating range
Operating from
2.97V to 3.63V
Nominal Values 0V, 3.3V
VDD rating should not be
exceeded
Table 1: Absolute Maximum Ratings
Note: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of
this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ARQ-MFADC002 Draft A, Date: 25-07-2014
The information contained herein is as of publication issue. Production processing does not necessarily include testing of all parameters. This documentation is not
contractual and content delivery cannot be considered as an offer or contract. Under this document, the Company assumes no obligation towards third parties, liability
or guarantee whatsoever.
© Arquimea Ingeniería, S.L.U.
www.arquimea.com
2
ARQ-MFADC001
ELECTRICAL CHARACTERISTICS (at room temperature)
Nominal Supply Voltage unless otherwise specified
ADC Parameters
Dynamic
Static
Symbol
Parameter
ADC_OE
Offset Error
ADC_FSE
Full Scale
Error
ADC_Gf
Gain Flatness
ADC_Gs
Gain Stability
ADC_THD
Total
Harmonic
Distortion
ADC_ENOB
Offset error is the difference between
the measured and ideal voltage at the
analog input that produces the first
code or middle code (differential input
case) at the output.
Gain Error or Full scale Error is the
difference between the measured full
scale and ideal full scale. This is usually
expressed as a percentage of full scale.
Gain Flatness is the measure of the
variation of gain over a specified
frequency range
Gain Stability is the measure of the
variation of gain over the temperature
range
THD is the ratio of the rms sum of the
first five harmonic components to the
rms value of a full-scale input signal.
(Note)
ENOB is a measurement of the
resolution with a sine wave input. It is
related to SINAD and is expressed in
bits by ENOB = [(SINADdB − 1.76)/6.02]
(Note)
SFDR is the difference, in decibels (dB),
between the rms amplitude of the
input signal and the peak spurious
signal. (Note)
Unit
Without correction. Zero
value in input and check the
output.
TBD
LSB
Without correction
TBD
%FSR
Fin= 5MHz, 25MHz, 50MHz
0.4
dB
Fin= 5MHz at operational
temperature range
0.1
dB
104
Fin= 0.5MHz
84
Fin= 2.5MHz
74
dB
Resolution
18
Fin= 0.1MHz
Fin= 1MHz
18
12
Fin= 2.5MHz
Fin= 0.05MHz
104
Fin= 0.5MHz
84
Fin= 2.5MHz
74
ADC_IVCC1
Operating
Current
consumption
IVCC1 is the consumption current at
VCC when the converter is Converting
at 0.1MHz frequency.
Fin= 0.1MHz
Fin= 1MHz
Fin= 10MHz
ADC_PSRR
Power Supply
Rejection
Ratio
Power supply rejection ratio (PSRR) is
the ratio of the change in power supply
voltage to the resulting change in the
converter’s gain or offset.
VCC=Min to Max Voltage
ADC_Fqc
Sample rate
Operating frequency expressed (MSPS).
ADC_Func.
Functional
verification
Test that all Registers, different mode
are configurable and working properly.
Power Supply
Min
Fin= 0.05MHz
Timin
g
Spurious Free
Dynamic
Range
Limites MF
typ
Max
Test Conditions
Func
ADC_SFDR
Effective
Number of
Bits
Description
Bits
12
dB
0,2
25
60
220
mA
TBD
LSB/
V
5
MSP
S
Functional Modes if testable.
(mode / cal, etc)
Note: Dynamic tests are typically made with the analog coherent signal (sinus waveform) at the rated frequency with a signal power of 0.1 dB,
0.5 dB, or 1 dB below full scale (dBFS).
Table 2: ADC Electrical Parameters
ARQ-MFADC002 Draft A, Date: 25-07-2014
The information contained herein is as of publication issue. Production processing does not necessarily include testing of all parameters. This documentation is not
contractual and content delivery cannot be considered as an offer or contract. Under this document, the Company assumes no obligation towards third parties, liability
or guarantee whatsoever.
© Arquimea Ingeniería, S.L.U.
www.arquimea.com
3
ARQ-MFADC001
DIE & PACKAGE PINOUT
TBD
IO pins Description
TBD
ADC BLOCK DESCRIPTION
The ARQ-MFADC001 analog-to-digital converter (ADC) is used for digitizing high frequency, wide dynamic
range signals with input frequencies of up to 5 MHz and sampling up to 10 MSPS.
ADC Equivalent Circuits:
TBD
Figure 1: ADC equivalent circuit
ADC Architecture
TBD
Figure 2: ADC Architecture
ARQ-MFADC002 Draft A, Date: 25-07-2014
The information contained herein is as of publication issue. Production processing does not necessarily include testing of all parameters. This documentation is not
contractual and content delivery cannot be considered as an offer or contract. Under this document, the Company assumes no obligation towards third parties, liability
or guarantee whatsoever.
© Arquimea Ingeniería, S.L.U.
www.arquimea.com
4
ARQ-MFADC001
ESD CAUTION
ESD (electrostatic discharge) sensitive device - Electrostatic charges as high as TBC V readily accumulates on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
QUALITY STANDARDS
ARQUIMEA INGENIERÍA S.L.U. develops its activities under the premises of quality and sustainability, offering
efficient, liable and innovative technologies and solutions to its customers.
ARQUIMEA’s Quality Management System meets the requirements of ISO 9100:2010 Aerospace Series, and has
been audited and certified by the Spanish Association for Standardization and Certification, AENOR.
In order to meet the highest quality and reliability, ARQUIMEA designs and develops its aerospace product line
according to military and space standards.
Our space microelectronic devices are available in one or more of the following processes:
• Equivalent to QML 38535 LEVEL Q or Level V*
• Equivalent to ESCC 9000 Level C or level B*
For procurement in die form
• In accordance with ECSS-Q-ST-60-05C
• Equivalent to QML 38534 LEVEL H or Level K*
*With Radiation Qualification
IMPORTANT NOTICE
ARQUIMEA INGENIERÍA S.L.U. and its subsidiaries (ARQUIMEA) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue any
product or service without notice. Customers must obtain the latest relevant information before placing orders and
must verify that such information is current and complete. All products are sold subject to ARQUIMEA’s terms and
conditions of sale supplied at the time of order acknowledgment.
ARQUIMEA warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with ARQUIMEA’s standard warranty. Testing and other quality control techniques are used to the
extent ARQUIMEA deems necessary to support this warranty. Except where mandated by legal requirements,
testing of all parameters of each product is not necessarily performed.
ARQUIMEA assumes no liability for applications assistance or customer product design. Customers are responsible
for their products and applications using ARQUIMEA components. To minimize the risks associated with customer
products and applications, customers should provide adequate design and operating safeguards.
ARQ-MFADC002 Draft A, Date: 25-07-2014
The information contained herein is as of publication issue. Production processing does not necessarily include testing of all parameters. This documentation is not
contractual and content delivery cannot be considered as an offer or contract. Under this document, the Company assumes no obligation towards third parties, liability
or guarantee whatsoever.
© Arquimea Ingeniería, S.L.U.
www.arquimea.com
5
ARQ-MFADC001
ARQUIMEA does not warrant or represent that any license, either express or implied, is granted under any
ARQUIMEA patent right, copyright, mask work right, or other ARQUIMEA intellectual property right relating to any
combination, machine, or process in which ARQUIMEA products or services are used. Information published by
ARQUIMEA regarding third-party products or services does not constitute a license from ARQUIMEA to use such
products or services or a warranty or endorsement thereof. Use of such information may require a license from a
third party under the patents or other intellectual property of the third party, or a license from ARQUIMEA under
the patents or other intellectual property of ARQUIMEA.
Reproduction of ARQUIMEA information in ARQUIMEA data books or data sheets is permissible only if reproduction
is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices.
Reproduction of this information with alteration is an unfair and deceptive business practice. ARQUIMEA is not
responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of ARQUIMEA products or services with statements different from or beyond the parameters stated by
ARQUIMEA for that product or service voids all express and any implied warranties for the associated ARQUIMEA
product or service and is an unfair and deceptive business practice. ARQUIMEA is not responsible or liable for any
such statements.
ARQUIMEA products are not authorized for use in safety-critical applications (such as life support) where a failure of
the ARQUIMEA product would reasonably be expected to cause severe personal injury or death, unless officers of
the parties have executed an agreement specifically governing such use. Buyers represent that they have all
necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that
they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and
any use of ARQUIMEA products in such safety-critical applications, notwithstanding any applications-related
information or support that may be provided by ARQUIMEA. Further, Buyers must fully indemnify ARQUIMEA and
its representatives against any damages arising out of the use of ARQUIMEA products in such safety-critical
applications.
Only products designated by ARQUIMEA as military-grade or space-grade meet military or space specifications.
Buyers acknowledge and agree that any such use of ARQUIMEA products which ARQUIMEA has not designated as
military-grade or space-grade is solely at the Buyer's risk and that they are solely responsible for compliance with all
legal and regulatory requirements in connection with such use.
ARQ-MFADC002 Draft A, Date: 25-07-2014
The information contained herein is as of publication issue. Production processing does not necessarily include testing of all parameters. This
documentation is not contractual and content delivery cannot be considered as an offer or contract. Under this document, the Company assumes no
obligation towards third parties, liability or guarantee whatsoever.
© Arquimea Ingeniería, S.L.U.
www.arquimea.com
6
ARQ-MFADC001
Revision History
Date
Released
23-07-2014
18-11-2014
Issue
Section
Changes
Draft A
Draft B
All
Radiation hardening
Initial Release
SEU performance added
ARQ-MFADC002 Draft A, Date: 25-07-2014
The information contained herein is as of publication issue. Production processing does not necessarily include testing of all parameters. This
documentation is not contractual and content delivery cannot be considered as an offer or contract. Under this document, the Company assumes no
obligation towards third parties, liability or guarantee whatsoever.
© Arquimea Ingeniería, S.L.U.
www.arquimea.com
7
ARQ-MFADC001
ARQ-MFADC002 Draft A, Date: 25-07-2014
The information contained herein is as of publication issue. Production processing does not necessarily include testing of all parameters. This
documentation is not contractual and content delivery cannot be considered as an offer or contract. Under this document, the Company assumes no
obligation towards third parties, liability or guarantee whatsoever.
© Arquimea Ingeniería, S.L.U.
www.arquimea.com
8