APPLIED PHYSICS LETTERS 95, 193109 共2009兲
Radio frequency operation of clocked quantum-dot cellular automata latch
Yong Tang,a兲 Alexei O. Orlov, Gregory L. Snider, and Patrick J. Fay
Department of Electrical Engineering, University of Notre Dame, Notre Dame, Indiana 46556, USA
共Received 1 October 2009; accepted 28 October 2009; published online 12 November 2009兲
The radio frequency operation of a single-electron latch based on Al– AlOx – Al tunnel junctions is
presented. By capacitively coupling the latch to a radio frequency single electron transistor, charge
switching on the microsecond timescale is demonstrated. The fast switching and high repeatability
of the latch response indicates that high speed operation of pipelines, signal fan-outs, and more
complex logic devices are possible with this technology. The experimental technique developed is
also promising for enabling the investigation of the intrinsic switching speed in electronic
quantum-dot cellular automata-based circuits. © 2009 American Institute of Physics.
关doi:10.1063/1.3265919兴
Quantum-dot cellular automata 共QCA兲1 is a promising
nanotechnology that enables digital computation with a transistorless structure. An electronic QCA circuit consists of the
spatial configuration of identical building blocks or “cells.”
In the elementary unit of the clocked QCA architecture, a
three-site single electron latch structure,2–5 binary information is encoded by the location of a single excess electron.
The Coulomb interaction between cells provides input information for the next cell. The switching process is controlled
by multiphase clocking,6 where the key advantage of the
clocked QCA architecture is its ability to achieve power
gain. Metal-oxide tunnel junction-based clocked QCA devices and circuits 共shift registers and signal fan-outs7,8兲 as
well as power gain in a single-electron latch9 have been experimentally demonstrated in recent years. Single electron
transistors 共SETs兲 were used in these experiments to detect
electron switching in the latches. However, the operation of
clocked QCA circuits was limited to dilution refrigerator
temperatures 共below 100 mK兲 and clock frequencies below
100 Hz,7–9 although the theoretical maximum clocking frequency for the metal-oxide tunnel junction system, set by the
tunneling time between the dots, is in excess of 10 GHz.6 In
this letter, we report the first demonstration of a QCA latch
integrated with a radio-frequency single electron transistor
共RF-SET兲,10 that serves as a high-speed electrometer to detect single electron switching in the latch. Operation of the
latch with 1 ␮s clock pulses is demonstrated at a temperature of ⬃0.4 K.
The device structure and measurement setup is illustrated schematically in Fig. 1. The QCA latch and RF-SET
are patterned by electron beam lithography on a Si/ SiO2
substrate using double angle evaporation11 of aluminum with
in situ low pressure oxidation 共3 ⫻ 10−5 Torr for 60 min兲.
The “dots” comprising the latch 共D1-D3兲 are connected in
series by two multiple tunnel junctions 共MTJs兲. The use of
MTJs is necessary to suppress charge leakage in the latch
共the charge leakage in the single electron latch is caused by
several physical processes; photon-assisted tunneling, cotunneling, and thermal activation over the Coulomb barrier
共e.g., see Ref. 12 and references therein兲. Signal leads 共⫾Vin
and Vclk兲 are capacitively coupled to the latch and the SET is
coupled to one of the end dots of the latch through interdigia兲
Electronic mail: yong.tang.17@nd.edu.
0003-6951/2009/95共19兲/193109/3/$25.00
tated capacitors. The SET is embedded in a tank circuit
formed by a chip inductor of 470 nH and the parasitic capacitance of the SET 共C p = 0.054 pF兲, which acts as an impedance transformer to down-convert the resistance of the
SET close to the characteristic impedance of a transmission
line 共Z0 = 50 ⍀兲. Since the reflected signal of an incident RF
carrier is a function of the SET resistance, the fast charge
detection is realized by mapping the changes of the SET
resistance to changes in the reflected signal. Devices are
measured at T ⬇ 0.35 K in a 3He cryostat with 1 T magnetic
field applied to suppress the superconductivity of aluminum.
The applied carrier power level is selected to give the largest
signal-to-noise ratio 共SNR兲 in the reflection response.13 This
involves a trade-off between large carrier power 共for the largest reflected signal兲 and over-driving the SET and washing
FIG. 1. Schematic of the measurement setup with RF-SET electrometer
operated in reflection mode. The RF signal is generated and demodulated at
room temperature. The reflected RF signal from the LC tank circuit is separated from the incident signal by a directional coupler and then amplified
by cryogenic 共G = 15 dB兲 and room temperature 共G = 40 dB兲 amplifiers.
Differential input signals are applied to dots D1 and D3, while the clock
signal is applied to dot D2 via capacitive coupling. The dc bias point of the
RF-SET can be adjusted using a separate gate, coupled to its island through
Cg-SET. The compensation circuitry for extrinsic coupling capacitances is
shown inside the dashed box. Each of the compensating signals is generated
by a high-speed inverter and attenuated and summed together with a simple
resistive network. The attenuation coefficients ␣1 ⬃ ␣3 are determined by
the ratio of parasitic coupling capacitances to SET gate capacitance:
␣ = Ccp / Cg-SET.
95, 193109-1
© 2009 American Institute of Physics
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193109-2
Tang et al.
FIG. 2. Typical measured RF-SET performance. 共a兲 Frequency-domain
spectrum with two side-bands at modulation frequency f mod = 1 MHz are
obtained with a 0.64 mV sine-wave applied 共equivalent charge of 0.09e兲 to
the gate with reflected signal being the center peak. 共b兲 Time-domain response of an RF-SET with 0.5 mV square-wave gate modulation 共equivalent
charge of 0.07e兲 at 100 kHz 共average of 1000 traces兲.
out the Coulomb blockade. The low frequency ac conductance of the SET can also be monitored using standard
lock-in techniques. The reflected RF signal is amplified by a
Mini-circuits ZX60-33LN-S+ amplifier 共G = 15 dB兲 modified
for 4.2 K operation and a 40 dB room-temperature amplifier.
The reflected signal can then be directly examined using a
spectrum analyzer for frequency domain characterization, or
down-converted to baseband by homodyne detection with
the carrier serving as the mixer’s local oscillator. The demodulated signal, which is proportional to the device resistance change, is further amplified by a 40 dB intermediate
frequency amplifier with bandwidth of 3 MHz and then acquired using a digital oscilloscope for time domain analysis.
Since the latch signal leads are also coupled to the SET island through parasitic capacitances, a change in ⫾Vin or Vclk
causes an unwanted shift of the operation point of the RFSET. A charge cancellation technique is used to eliminate
this effect.14 For this purpose, the latch driving signals are
inverted, attenuated, and then summed together with a
simple resistive network.
The performance of the RF-SET is demonstrated in
Fig. 2. In the frequency domain, Fig. 2共a兲, two side bands are
observed in the reflected signal for a 1 MHz sine-wave gate
modulation. A snapshot of the time domain response to a
100 kHz square-wave gate modulation is shown in Fig. 2共b兲.
The demodulated signal from the mixer output follows the
same shape and frequency as the gate modulation signal,
demonstrating that the amplitude modulation information is
recovered. The charge sensitivity of this particular SET is
around 1 ⫻ 10−4e / 冑Hz. There are two reasons for this moderate sensitivity. First, the Coulomb blockade oscillations
共CBOs兲 of the SET are thermally broadened at the measurement temperature of 0.35 K due to its moderate charging
energy EC = e2 / 2C⌺ = 250 ␮eV. Second, the carrier signal
power for the SET is optimized to achieve best SNR, which
requires a large carrier amplitude,13 further broadening the
CBO peaks.
Appl. Phys. Lett. 95, 193109 共2009兲
FIG. 3. Experimental demonstration of RF QCA latch operation at
T = 0.35 K with 1 ␮s clock pulses. Top: Differential input applied to top
and bottom dots 共only top dot input is shown here兲. Middle: Clock signal
applied to the middle dot. Bottom: Measured time-domain output signal
共from dot D1兲 共average of 10 000 traces兲. 共a兲 One full waveform sequence
and 共b兲 the sequence of 16 bit shifting operations for repeatability
demonstration.
This modest sensitivity also limits the maximum clocking frequency at which switching in the latch can be detected. A switching event in the latch induces a charge ⬃0.1e
on the SET island and this signal must be detectable within
the measurement system bandwidth. The SNR of the complete system is limited by the combination of SET charge
sensitivity, the coupling strength between the latch end dot
and the SET island, and noise contributions from the SET
and RF amplifier. Use of a more sensitive SET 共e.g., an SET
with higher charging energy兲 would directly improve the
SNR in a given bandwidth, or allow the use of a larger bandwidth for a fixed SNR.
The RF-SET is capacitively coupled to the end dot of
the latch cell. Therefore an electrostatic potential change on
that dot will act as an additional “effective” gate modulation
for the SET, and a corresponding change will occur in the
RF reflection signal. The SET is biased in the linear region of
the CBO to avoid signal distortion. The time-domain operation of the RF-QCA latch is demonstrated with clock and
input 共data兲 pulse widths of 1 ␮s 关Fig. 3共a兲兴. This pulse
sequence is designed to mimic a latch operating in a multistage clocked QCA system; the input signals have the same
width as the clock pulses and with a magnitude similar to
that of an identical latch’s output signal from previous
stage. The polarity of the input pulses represents the two
binary states 关down for “0” 共t1–t3兲 and up for “1” 共t5–t7兲兴
of the previous stage. Thus, the operation sequence of a
QCA latch system, Null⇒ Active共t2 and t6兲 ⇒ Locked
共t2 – t4 and t6 – t8兲 ⇒ Null, has been demonstrated with a
speed almost six orders of magnitude higher than previously
reported.7 The latch output is inverted relative to the input,
and it is capable of driving a subsequent latch stage that is
controlled by its own clock. The repeatability and stability of
the latch has also been evaluated by repeating the sequence
several times. Eight full periods of clocking are shown in
Fig. 3共b兲, and it can be seen that the response of the RF-latch
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193109-3
Appl. Phys. Lett. 95, 193109 共2009兲
Tang et al.
is repeatable and uniform. These characteristics are important for more sophisticated digital logic structures such as
shift registers, logic fan-out, or pipelined structures.
In previously reported QCA latches, the retention time
was measured to be around 1 s at temperatures below
100 mK. Decay errors corresponding to the loss of information during the retention time was an important limiting factor due to the low speed of the measurements.7 The retention
time for our device is around 10 ms at 0.35 K. The decrease
of the retention time is mainly due to the enhanced thermal
activation of electrons over the Coulomb barrier12 due to a
significantly higher operation temperature. However, since
the clocking “ON” time is much shorter than the retention
time, the probability of decay errors is insignificant, given by
PDecay共t兲 = 1 − exp共−t / ␶兲 = 10−4, where t = 1 ␮sec is the clocking period and ␶ is the retention time.
In conclusion, we have demonstrated RF operation of a
single electron QCA latch, a critical building block for the
realization of computational systems based on the clocked
QCA architecture. By integrating a reflection mode RF-SET
with the QCA latch, noninvasive detection of charge configurations of the latch has been demonstrated, with microsecond timescale resolution experimentally observed. This
capability is essential for studying high-speed QCA logic
devices, and is a promising way to investigate the intrinsic
switching speed in QCA devices.
This work was supported by the National Science Foundation 共Grant Nos. CCF04-03760 and CCR-0210153兲.
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