A wide-bandwidth, wide dynamic-range thermal ΣΔ
architecture for convective accelerometers
O. Leman, F. Mailly, L. Latorre, P. Nouet
University Montpellier 2 – CNRS, LIRMM
Montpellier, France
mailly@lirmm.fr
978-1-4244-5335-1/09/$26.00 ©2009 IEEE
-4
(Ω)
(1)
-1
Where TCR = 9⋅10 K and T0 = 300K. The CMOS die also
includes an instrumentation amplifier (A1, see figure 1) for
signal readout, with gain Av = 110.
5V
x
UH
Sensor
detectors Rd1, Rd2
RH
Accelerometers can have no solid proof mass as well, for
example, convective accelerometers [2,3], use the free
convection phenomenon in a heated fluid. Convection heats
up or cools down small temperature probes located in the
fluid, and the measured temperature change is proportional to
acceleration. These devices are robust and shock resistant,
moreover they can be fabricated with a very simple silicon
bulk micro-machining process. Convective accelerometers
may exhibit bandwidths of several hundreds of hertz with
restrictions on package dimensions and fluid nature [4].
Nevertheless the thermal inertia of temperature probes limits
the bandwidth of CMOS convective accelerometers to several
tens of hertz [5]. To overcome this issue, we propose a
measurement of convection’s heat flow on temperature probes
kept at a constant temperature by a feedback loop. A thermal
ΣΔ modulator [6] was considered here, as a robust architecture
with a direct-digital output.
R = R0⋅(1+TCR⋅(T-T0))
Rd2
Nowadays silicon micro-accelerometers are finding
applications in many fields: automotive, shock and vibration
monitoring and entertainment to mention few. Most of the
sensors are based on the measurement of the displacements of
a solid proof-mass with respect to a frame. When using a
capacitive detection these sensors have low power
consumption and a bandwidth of several kilo-hertz.
Nevertheless they are fragile devices and they require complex
micro-machining processes [1].
Figure 1 is a picture of the prototype of convective
accelerometer and its electrical schematic. This sensor was
built with a standard CMOS technology (AMS 0.8µm). The
three suspended bridges are composed of back-end layers of
the CMOS process and they are released with a post-process
based on anisotropic bulk etching.
The hermetic sensor package is filled with air at
atmospheric pressure. Each suspended bridge is 5 µm thick
and features a polysilicon resistor, for heating (RH) and for
temperature sensing (Rd1 and Rd2) purposes. The value of
these polysilicon resistors as a function of temperature T (in
K) expresses:
Vout
x110
+
-
amplifier A1
heater RH
500μm
Rref2
INTRODUCTION
DESIGN AND MODELING OF THE SENSOR PROTOTYPES
Rd1
I.
II.
Rref1
Abstract—This work describes the implementation and the
modeling of a convective accelerometer with 1st-order thermal
ΣΔ readout. This closed-loop system is obtained by the hybrid
combination of a CMOS sensor prototype which includes an
amplifier, and discrete electronic devices. A high comparator
precision is reached by dynamic offset cancellation of the
amplifier. After a modeling of the Johnson noise and of the
quantization-noise, the parameters of the modulator are
optimized to get a good linearity, an improved gain precision
and a wide dynamic range.
A1
Test vehicle chip
Figure 1. Micrograph of a thermal convective accelerometer and electrical
schematic, heater dissipation is 21mW
The central bridge locally heats the air by Joule’s
dissipation and heating expands the air thus creating a
gradient of air density. Acceleration along the sensing axis x
thus induces buoyancy force in the hot air bubble which
1828
IEEE SENSORS 2009 Conference
suspended
temperature
detectors
convection
ΔPD
(W)
Sp
a (g)
1+τ ⋅ s
Vout
(K)
SWheat
+
+
IMPLEMENTATION OF THE THERMAL ΣΔ MODULATOR
The thermal ΣΔ modulator described on figure 3 is an
improved version of the system reported in a previous work
[7]. In this new modulator the noise is improved by a dynamic
offset cancellation technique called Correlated Double
Sampling (CDS) which removes the offset and 1/f noise of
amplifier A1. The loop filter is the thermal inertia of the
suspended detectors, so that the schematic is very simple.
F1
F2
com
nHld:
CDS
track/hold
Sensor
RH
Rd2
Rd1
nHld
UH
VB
Vout x100
+
Rref2
standard
comparator
VC1
-
Rref1
out, clock:
bitstream
output
out
clock
Controller
Controller
A1
Test vehicle chip
VA
C1
T/H1
Figure 3. Electrical schematic of the 1st-order thermal ΣΔ modulator with
time-interleaved readout / feedback and CDS
comparator
read
feedback
padding delay
comparator
read
feedback
padding delay
5V
0V
0V
5V
5V
0V
5V
F2
5V
5V
0V
5V
0V
0V
5V
com
nHld
0V
0V
5V
0V
0V
5V
0V
TCDS
Tck
hold
track
not valid
‘1’
hold
track
not valid
‘0’
Figure 4. Noiseless waveforms of the thermal ΣΔ modulator of figure 2,
with 0g input. Thermal feedback uses the self-heating of detectors under bias.
1/f noise
1/f noise
Figure 2. Small-signal model of the CMOS thermal convective
accelerometer prototype
F1, F2, com:
Wheatstone
bias, feedback
F1
out
1 + τ amp ⋅ s
+
Vc1>0
Tfb
clock
Av
(V)
Vc1<0
Vc1>0
Tpadd
C1 out
Johnson
n
Johnsonnoise:
noise:ηη
n
Wheatstone bridge
III.
A1 out
A1 amplifier
ΔTD’
Rth
1+τ D ⋅ s
Figure 4 describes the waveforms of the modulator. A
negative feedback pulse is obtained by cutting the bias of one
of the detectors thanks to a split Wheatstone bridge bias. The
nominal Wheatstone bridge bias is then restored so as to allow
for signal readout, this makes a Return-to-Zero (RZ) pulsed
feedback type, with pulse duration Tfb ≤ Tck-TCDS.
comparator
read
creates free convection. This produces a heat transfer that
heats up one detector and cools down the other one.
Differential Wheatstone bridge output Vout is thus
proportional to acceleration along the x-axis. More details
about sensor operating principles and dimensions can be
found in [3].
Figure 2 shows the small-signal, differential model of the
sensor. Convection produces a differential heat transfer ΔPD
between detectors (Sp=2.67µW/g), and this phenomenon is
characterized with a τ=1.2ms time constant. Detector bridges
thermal parameters are Rth=25800K/W and τD≈1.87ms.
Wheatstone bridge sensitivity is Swheat=1mV/K with Vdd=5V.
The white noise ηn = 38nV/√Hz, also called Johnson noise, is
the result of the contributions of the 4⋅kb⋅T⋅R noise of the
Wheatstone bridge (32.8nV/√Hz) and of the white noise of
A1. The amplifier A1 has a bandwidth BWamp = 1/(2π⋅τamp) =
560kHz and it generates 1/f noise (1kHz corner frequency).
Let’s describe the CDS working principle. We represent
the low-frequency noise and offset of A1 by an input-referred
error voltage Vε that is assumed to be constant over one
modulator clock cycle. At the end of the feedback pulse, the
Wheatstone bridge is first biased at -Vdd (com = Vdd, F1 = F2
= 0V) and its output voltage is thus -Vout. The output voltage
of amplifier A1 is VA = Av⋅(-Vout+Vε). This voltage is stored
by the track-and-hold circuit T/H1 and the Wheatstone bridge
bias is inverted (com = 0V, F1 = F2 = Vdd). The output of
amplifier A1 now expresses VB = Av⋅(Vout+Vε). The
comparator is then sampled, it determines the sign of the
difference between VA and VB:
VC1 = V B − V A = 2 ⋅ Av ⋅ Vout
(2)
The error voltage Vε of amplifier A1 is cancelled by the
CDS and the Wheatstone bridge output voltage is doubled.
Besides C1 is a standard comparator with 10mV input-referred
offset. Nevertheless the equivalent offset of C1 referred to the
Wheatstone bridge output (Vout) is 10mV/(2⋅Av) = 50μV thus
achieving a high precision comparator function. The complete
CDS process takes TCDS = 31μs.
The feedback power ΔPfb (feedback D/A converter) is set
by the duty-ratio δfb = Tfb / Tck of the feedback pulses thanks to
the padding delay Tpadd:
+ TCDS
⎛ T
ΔPfb = δ fb ⋅ P0 = ⎜⎜1 − padd
Tck
⎝
2
⎞ ⎛⎜ ⎛ Vdd ⎞ 1 ⎞⎟
⎟⎟ ⋅ ⎜
⎟ ⋅ ⎟
⎜
⎠ ⎝ ⎝ 2 ⎠ Rd ⎠
(3)
With Vdd = 5V and Rd = 50kΩ, the maximal feedback
power (δfb = 1) is ΔPfb = P0 = 125μW. Nevertheless the
feedback power will be lower since δfb ≤ 1-TCDS/Tck. For fck >
10kHz, Tck < 100μs hence δfb < 0.69 and ΔPfb < 86μW.
1829
Figure 5-a below recalls the bitstream spectrum of the
experimental demonstrator of thermal ΣΔ modulator from the
previous work [7] which resolution was clearly limited by the
1/f noise. The new modulator with CDS (figure 5-b) has a
white noise floor (3mg/√Hz) which is limited by the Johnson
noise. The spectra of figure 5 were obtained with δfb = 3.2%
and ΔPfb = 4μW, and the modulators have 25%/g sensitivity.
reduced gain comes from the modulator settings. The Johnson
noise is too strong with respect to the quantization-noise of the
ΣΔ loop and this leads to a low loop gain and poor linearity. In
a previous work [8] a model of the quantization-noise floor
ηQnfLP (5) was defined by analytical calculations based on a
linear model of the ΣΔ modulator. The study showed that
modulator linearity was improved by setting ηQnfLP at the same
level as the Johnson noise:
50 times spectral averaging
−
3
η QnfLP = 2π ⋅ FS ⋅ f ck 2 ⋅ f c
noise
noise
(1-20Hz) (1-133Hz)
(a) - without CDS, fck = 32kHz
64mg
110mg
(b) - with CDS, fck = 26kHz
14mg
41mg
Figure 5. Experimental bitstream spectra of the thermal ΣΔ modulator, (a)
without and (b) with CDS, ΔPfb = 4μW, 25%/g sensitivity
MODELLING OF THE THERMAL ΣΔ MODULATOR
Figure 6 shows the differential model of the thermal ΣΔ
modulator. Since the CDS cancels the 1/f noise, only the
Johnson noise is modelled here by a Gaussian PseudoRandom Number Generator (G-PRNG, see figure 6). The
pulsed feedback is modelled with Non-Return to Zero (NRZ)
pulses whereas the experimental modulator uses RZ pulses;
this simplifies the model and does not alter the properties of
the ΣΔ modulator.
G-PRNG
G-PRNG(sampling
(samplingtime:
time:TTckck))
sampled
sampledJohnson
Johnson
noise
noisemodel
model
ΔPD
+
1+τ ⋅ s
σ = 2 ⋅ηT ⋅ f ck 2
(W)
-
Sp
)
(5)
A model of the Johnson noise is necessary to set the
parameters of the modulator. The noise found in the
differential mode of comparator C1 is due to the folding of the
broadband Johnson noise present at the output of A1 (BWamp
bandwidth). Noise folding is induced by the sampling of both
T/H1 and C1; each sampling process results in a white noise
spectral density ηT on the DC-fck/2 bandwidth [9]:
b
a (g)
Hz
Where FS = ΔPfb / Sp (g) is the modulator full-scale and fc
= 1/(2π⋅τD) is the cut-off frequency of the loop filter.
a
IV.
(g /
Rth ⋅ 2 ⋅ S wheat
1+τ D ⋅ s
+/−ΔPfb
0
1
+
+
comparator
bitstream
Vout
ΔPfb
-ΔPfb
(V)
ηT =
2 ⋅ BWamp
f ck
⋅η n
(V /
Hz
)
(6)
The noise samples of T/H1 and C1 are considered
uncorrelated since they mainly result from noise folding, so
that their powers add and the equivalent noise spectral density
at the input of C1 is √2⋅ηT. Expressed in terms of NoiseEquivalent Acceleration (NEA) the sampled Johnson noise is:
NEAT =
2 ⋅ηT
2 ⋅ Rth ⋅ S wheat ⋅ S p
(g /
Hz
)
(7)
With fck = 26kHz, equation (7) gives NEAT = 2.55mg/√Hz
which is close to the actual modulator noise floor (figure 5-b,
3mg/√Hz). Following the previous assumptions, the modulator
parameters (FS, fck) are given by ηQnfLP = NEAT. In order to
maximize ΔPfb (i.e. the dynamic-range) expression (3) is
applied with Tpadd=0, giving FS = +/-16.2g (ΔPfb = 43.6µW)
and fck = 21kHz. With these settings sensitivity is 2.96%/g in
simulations, close to the model (4): SΣΔ = 3.09%/g. Figure 7
below shows the simulated bitstream spectra.
fck
100 times spectral averaging
0/1
1gRMS 10Hz
acceleration
feedback D/A converter
b ΔP = 43.6μW
fb
fck = 21kHz
Figure 6. Simplified model of the thermal ΣΔ modulator with CDS
Assuming the ΣΔ modulator has an infinite loop gain, the
sensitivity SΣΔ can be expressed as a function of the feedback
power ΔPfb and the sensitivity of convection Sp:
S ΣΔ =
Sp
2 ⋅ ΔPfb
⋅ 100
(% / g )
a ΔP = 4μW
fb
fck = 26kHz
(4)
With ΔPfb = 4μW and Sp = 2.67µW/g, (4) gives a
sensitivity of SΣΔ = 33.4%/g whereas the experimental
modulator has only 25%/g sensitivity with fck = 26kHz. This
1830
Figure 7. Bitstream spectra simulated under Matlab®/Simulink®, (a)
25%/g sensitivity, fck = 26kHz and (b) 2.96%/g sensitivity, fck = 21kHz
With non-optimized settings (figure 7-a) 3rd-order
harmonic distortion appears with a 1gRMS input, whereas the
optimized modulator (figure 7-b) has no distortion.
V.
EXPERIMENTAL RESULTS
Figure 8 shows bitstream spectra of the experimental
demonstrator of thermal ΣΔ modulator with two sets of
parameters: the set of the previous test (figure 8-a, same as
figure 5-b) and the optimized set (figure 8-b). With the
optimized parameters the sensitivity is 3.04%/g. Optimization
leads to a higher full-scale, at the cost of a negligible increase
in sensor noise (3.5mg/√Hz noise floor). The RMS noise is
55mg on the 1-133Hz bandwidth and the dynamic-range is
increased by 18dB.
50 times spectral averaging
1gRMS 40Hz
acceleration
b ΔP = 43.6μW
fb
fck = 21kHz
VI.
We propose a thermal ΣΔ modulator architecture for
convective accelerometer readout. This closed-loop
architecture improves the sensor bandwidth and has a direct
digital output in the form of a bitstream. With respect to a
previous work, the noise is improved by a dynamic
cancellation of the low-frequency noise of the CMOS sensor
amplifier. Then system parameters are optimized through a
theoretical analysis of the noise sources. A theoretical model
of the quantization-noise is defined thanks to a high-level
system model. Together with a model of the sampled Johnson
noise of the convective accelerometer, these two distinct
models allow for the definition of improved parameters for the
ΣΔ modulator. With this methodology, a precise gain and a
wider dynamic range are reached. Measurements show an
increase in the bandwidth, which is now limited by the timeconstant of convection. This accelerometer has to our
knowledge the widest bandwidth reported for this sensing
principle, whereas the sensor was built with a non-optimized
micro-machining technology and uses air at atmospheric
pressure as sensing fluid. This shows that system-level
considerations can address the technological limit of
bandwidth in convective accelerometers.
ACKNOWLEDGMENT
a ΔP = 4μW
fb
fck = 26kHz
The authors want to thank Anthony Diaz for building the
aluminum mount that was used for bandwidth measurements
on the electro-dynamic shaker.
Figure 8. Experimental bitstream spectra of the thermal ΣΔ modulator, (a)
25%/g sensitivity, fck = 26kHz and (b) 3.04%/g sensitivity, fck = 21kHz
Figure 9 below shows the experimental bode diagram of
the convective accelerometer. The open-loop readout consists
in the setup of figure 1, it shows that sensor bandwidth is
limited to 69Hz essentially by the thermal cut-off frequency of
detectors (fc = 85Hz). With the thermal ΣΔ modulator readout,
the bandwidth is 133Hz and it is limited by the bandwidth of
air convection.
REFERENCES
[1]
[2]
[3]
[4]
[5]
readout method
temperature mode
thermal ΣΔ modulator
with CDS
FS = +/-16.2g
fck = 21kHz
CONCLUSION
-3dB bandwidth
69Hz
[6]
133Hz
[7]
[8]
[9]
Figure 9. Characterized bandwidth of (a) the prototype convective sensor in
classical open-loop operation and (b) the same sensor with the thermal ΣΔ
modulator
1831
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