New Assembly and Interconnecting
Trends in Electronic and
Microelectronic
Part 1.
Ing. Josef Šandera Ph.D.
www.feec.vutbr.cz
Brno University of Technology,
FEEC, UMEL
1
The goal of presentation is …………..
- To get information about new trends in PCB construction and
new organic and anorganic materials
- To inform about SMT technology assembly and the soldering
techniques
- Construction of the modern components especially BGA and
other array lead components will be presented
- To get overall summary in conductive adhesives and progressive
trends in electronic assembly
- To present Word`s construction of electronic 3-D systems
- To present basic informations about LF solders
- To say anything about reliability of solder joint, especially
thermomechanical reliability
- To inform about research and development in the field of
interconnection, printed board design, computer simulation
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2
Organic Materials for Interconnection
Structures and PCB
Typical property Tg -glass temperature and coefficient of thermal
expansion - CTE.
Coefficient of thermal expansion must be lowest without anisotropic
property and the glass transition temperature Tg must be higher. That is
reason why often are used composite materials with glass, paper,
Kevlar fibers
Organic materials can be classified as rigid and flexible
Very often used materials are,
•
•
•
•
•
•
Phenolic materials
Epoxy materials – FR4 glass reinforced base materials
Cyanate Ester polymers
Urethans
Silicones
Polyimids
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Glass Transition Temperature T
g
Glass Transition Temperature is defined as the temperature at which the transition from solid to liquid
takes place. Above this temperature the modulus as low and nearly constant, and below which it is
nearly three low.
Mechanical properties are similar
solid state
Mechanical properties are similar
liquid
Source: R.Tumala: Fundamentals of Microsystems Packaging
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Coefficient of Thermal Expansion CTE
The dimensional change that occurs during heating or cooling of
a material is characterized by its coefficient of thermal expansion.
CTE can be defined as the dimensional change that occurs per unit
rise in temperature per unit length
∆l
CTE =
[ppm oC-1]
l.∆T
Frequently used materials:
Epoxy – glass substrate 14 - 16 (“x,y” axis)
60 - 80 “z” axis
Silicon chip …………… 3 - 4
Ceramic materials ……..6 - 8.5
Plastic package ………..20
Solder (Lead,SAC) …….21
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Phenolic Materials (Laminates)
Phenolic materials are the most widely used because of
their relatively low cost and good electrical properties.
They are made from phenol and formaldehyde, the
chemistry is extremely complex.
Laminate:
Phenolic laminates are reinforced with paper with
different content of resin. The higher the resin content the
hard material.
Phenolic laminate for PCB is FR-2
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Epoxy Materials
Epoxy resins are produced from ethylene chlorohydrin and bisphenol – a
some aditives are used to modify the properties of epoxy resins. Contents of
resin and aditives modified mechanical properties of laminates. They are
several variations of this family, each developed to answer a special need. They
are used multifunctional epoxy, difunctional epoxy, tetrafunctional epoxy, BT bismaleimide triazine blends
Laminates for PCB:
FR3 ………………paper + epoxy
FR4 ……………glass cloth + epoxy
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Polyimide Materials
Polyimide resins laminate have high temperature in
operation or in assembly or repair. It has approximately
the same dielectric constant as epoxy resin systems. It is
more difficult to work with in fabrication is more costly
than FR4 systems and absorb more moisture.
They are used for flexible printed boards
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Cyanate Ester Polymers Materials CE
Cyanate esters are precursors of the triazine polymers epoxies to reduce their costs.
Higher Tg is 192 bis 289 oC, lower water adsorption the epoxy, low permittivity, high
frequency applications
Laminates:
CE polymers are reinforced with glass cloth or aramid fibres with different content of
resin. CE specialized printed circuit processing required. When this is performed CE
boards produce a superior advanced multilayer boards.
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Urethanes
Urethanes are a major ingredient in most conformal coatings which are used to
protect circuit boards from thermal shock, engine fluid splashes, humidity corrosive
atmospheres and other adverse environments.. Urethane coatings show good adhesion to
the circuit board and also provide stress relief to the electronic packages. The urethane
coatings can be filled with some inorganic fillers to reduce the CTE for better
performance. A polyurethane is one of the toughest tear-strength in most polymers.
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Silicones
Thermal stability and conformity are among the attractive properties that make
silicone the material of choice. It has low Tg (about -125 oC), extremely high CTE
(300 -800 ppm/K), and low modulus, limit its applications in the conformal coating,
sealing and cavity filling areas. Silicone resin materials may present a surface
contamination problem.
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Polytetrafluorethylen - PTFE
Material has good electrical properties, is convenient for HF
applications. High thermal resistance, good chemical resistance.
Laminates:
PTFE is often used as composite materials with glass, paper an
the others.
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PCB Material Properties
Offten are used multilayer printed boards with through vias,
burried vias and blind vias. Holes are produced drilling (standard
PCB), laser drilling, plasma etching
Material
Dielectric constant
1 GHz
tan δ
1 GHz
Tg
oC
Moisture
%
Polyimide
4.06
0.006
>250
1.0
Cyanate ester
3.65
0.005
>200
-
BT
2.94
0.011
181
0.6
PPO - epoxy
3.85
0.012
179
0.6
PTFE - glass
2.60
0.001
-
-
PTFE - CE
2.79
0.003
-
-
PTFE - ceramic
4.06
0.002
-
-
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Inorganic Materials for Substrates
Good electrical properties, high moisture and temperature resistance.
Materials are brittle and hard, high processing temperature
• LTCC – enable low temperature processing (800 - 900
oC) .Used for multilayer technology which processes the
ability to embed passive elements into ceramic body
• Alumina (Al2O3) – Used for hybrid and multichip module
• Aluminium nitrid (AIN) – very high thermal conductivity it
can be compared with many metals
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PCB Design Trends
“Classic” PCB “Microvia” PCB
Min. hole Diameter
Min.pads Diameter
Min. line Width
200 µm
400 µm
100 µm
50 - 100 µm
100 - 150 µm
50 - 75 µm
Cu thickness
Price
Routing price
18,35,70µm
1x
1x
5 - 15 µm
2 – 3x
0.3 – 0.8x
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PCB Layer Interconnecting Trends
Offten are used multilayer printed boards with through vias,
burried vias and blind vias. Holes are produced drilling (standard
PCB), laser drilling, plasma etching (Microvia PCB)
A photograph of a via generated by laser driling process.
Source: R.Tumala: Fundamentals of Microsystems Packaging
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New Assembly and Interconnecting
Trends in Electronic and
Microelectronic
Principles Using in SMT
Assembly
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PCB Interconection and Assembly – SMT
Assembly
Punch the hole
Solder pads
Via
Wire path
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Non solder mask
Potisk (bílá)
18
Advantages of SMT Assembly
1) Reducing the size and weight
2) Surface mounting can reduce the cost of electronic system –
automatic assembly
3) Space saving
4) Impedance of conductors is lower and can be easily controlled –
higher working frequency
5) Smaller components - higher reliability
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New Trends in PCB Interconnection and
SMT Assembly
1) Reducing the size of components
2) New packages – higher number of terminals
3) 3D technique of assembly, assembly microsystems on
PCB with edge, ball or bump connection
4) New materials and construction with high temperature
resistance and low thermal resistivity – especially for
power applications, materials with higher Tg
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Surface mounting assembly variations
Surface mounting components are attached by solder or
in special cases with conductive adhesive to conductive
areas on a printed board
Leaded components are located by insertion through
holes drilled in the board and attached by solder either
to a pad on one side on the board or, if the hole is plated
- through, by a through - hole solder fillet.
Surface mounting components are used exclusively or
in combination with leaded components. It gives several
different board configuration and assembly procedures
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Surface mounting assembly variations
a)
b)
c)
a)
THCs assembly single - sided
b)
Mixed assembly single - sided
c,d) Mixed assembly double - sided
e)
SMT assembly single - sided
f)
SMT assembly double - sided
Very often used techniques
Convenient for wave soldering
d)
e)
f)
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Wave soldering for SMT
1) SMD components are glued on PCB
2) SMD components are soldered by solder wave
Board is passing on conveyor (flux deposite, preheating, solder wave zone)
For wave soldering the specific design of footprints for printed board is desired
Wave soldering is convenient for mixed assembly
Board
Solder wave
Preheating
Flux
Deposite
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Reflow soldering for SMT
1) Components are assembly on solder paste. Solder paste
consists from solder, flux and the others components
2) Solder paste is reflowed by heat. Heating is realized with infra
red, hot air, convection, laser vapour phase condensation and
the other principles.
preheating
preheating
Top Heating
Bottom Heating
cooling
cooling
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New Assembly and Interconnecting
Trends in Electronic and
Microelectronic
Chip Assembly Techniques and
SMD Packages
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Chip Interconnection - Wire Bonding
They are two basic types:
- Ultrasonic wire bonding – relies on the mechanical resonance of the interface
to be bonded to absorb the energy needed to weld the wire to the land, the wire
is aluminium
- The thermocompression - combination heat (app. 400 oC) and compression to
connect a wire to both the chip and the package frame or ceramic, the wire is
gold
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Chip Interconnection-Tape Bonding
The semiconductor chip is assembly on substrate with metal lead.
The systems consists of three major steps-tape manufacture, die and
tape – die assembly. Assembly is cheaper then wire bonding.
TAB is generally capable of handling pad centreline spaces 50 –
150 µm
Chip
Polyimid
foil
Testing
pads
Cut - off
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Chip Interconnection Flip-Chip
Technology, where a bare semiconductor chip processed with solder or metal
bumps on its surface is turned upside down and bonded directly to the substrate.
Technologie is applicable to either single chip packages or multiple chip modules
- Size of bumps generally ranges from 90 µm to 125 µm
- Technology of assembly – reflow soldering, termosonic, conductive adhesives
- Very effective assembly
Si Chip
Si Assembly on layer
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Modern Packaging and Package
New trends in packaging,
- Increasing number of terminals (terminals per square cm)
- Compatibility with standard assembly and solder process
- Low thermal resistivity
- Good electrical properties (low electrical resistance, inductance,
capacitance etc.)
- LF soldering technology demand - layers in terminals must be tin,
LF solder
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SMD Componens Therminals Design
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Chip Components
Surface mounting chip components have cubic dimensions. The most common chip
components are resistors capacitors and diodes, but presently every kind of two-terminal
device is avilable in chip form.
1206
0805
0603
0402
0201
The chip component size 01005 are used ( dimensions 0.1 to 0.2 x 0.304 to 0.4 mm)
example: 0603 resistor ……… land area 0.06 x 0.03 inch
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Multi-layer Ceramic Capacitors AWX
source: AWX
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Chip resistors
1.
2.
3.
4.
Ceramic layer
Terminals
Resistive layer
Protective layer
(Special glass)
5 Trimming line
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Modern SMD Packages
Source:
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Others Modern SMD Packages
Source:
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VSPATM (Very Small Peripheral Array) Package
Pre-fabricated semiconductor package with multiple
rows of leads. Package has high I/O density by because
has multiple rows of terminals. Number of leads can
achieved 320.
Leads
Thermal conductor
Carrier
Die
Encapsulant
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BGA Package (Ball Grid Array)
• Small package area – big number of terminals
• Soldering and desoldering wit hot air - self-centering package
• Problems with assembly and inspection - X ray inspection
Package
225 BGA (2 layers)
208 leads QFP
( Cu leads )
Inductance
[ nH ]
5,02 až 9,07
9,0
až 14,5
Capacitance
[ pF ]
Rezistance
[mΩ]
1,18 až 1,31
20 až 24
< 2,3
70 až 80
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Structure of P-BGA (Plastic Ball Grid Array)
Mould
compound
Die
FR4 - carrier
PCB - FR4
• Basic material of carrier is FR4 or BT laminate with 0.25
mm thickness
• Die is thermomechanically wire bonded to a curcuit carrier
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Construction of CBGA (Ceramic Ball Grid Array)
Chip
Chip
Ceramic layer
Ceramic layer
Solder 10Sn/90Pb
Solder
63Sn/37Pb
1010Sn
PCB
PCB
Source: www.amkor.com
Superior thermal conductivity and hermeticity, good electrical properties are
general advantages of ceramic packages
•
•
•
•
Typical parameters:
Balls diameter .......................................................................…................. 0,88mm
Column diameter ...............................................................…..…............... 0,50mm
Column height .........................................................................……............ 2,18mm
Balls pitch ……………...........................................................…..............….1,25 mm
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Structure of TBGA (Tape Ball Grid Array)
Solder paste
Heatsink or coverplate
Thermal adhesive
Adhesive
Stiffener
Chip
Solder ball
PCB – FR4
•
•
T - BGA has a advantages of Flip – Chip technology and low price
T – BGA has a relatively low profile (1.3 mm to 1.9 mm)
Typical parameters
Balls diameter …....................................................…........ 0.63mm
Balls pitch ……………………..................... 1.0 , 1.25, nebo 1.5 mm
Zdroj: M Tape Ball Grid Array (TBGA), Motorola General Business Information
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40
Structure of CSP (Chip Scale Package)
Chip
Ni or Ag bump
Gold leads
Elastomer
Solder paste
Polyimid layer
PCB - FR4
•
•
•
•
•
µ - BGA – Courtesy of Tessera Inc.
The package can be virtually the same size as the die
The package can be burned in and tested
Electrical performance is excellent with low resistance, capacitance and inductance
of the short leads
The thermal path is through the back side of the die to a heat sink to provide efficient
cooling
Typical parameters
Materials for bumps ........................................................................ Nickel covered the gold
Height of bumps ..................................................................................................... 0.085 mm
Pitch of bumps ….........................................……........………. 0.3 , 0.5, 1.0 , 1.27 , 1.5 mm
Thickness of polyimid layer ..............................................................………. 0.12 +-0.05 mm
Height of package ...........................................................................................……….. 0.8 mm
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QFN packages (Quard Flat No-Lead)
• QFN packages are near CSP with copper lead frame base
• Sn or NiPdAu lead finish
1) Zdroj: Texas Instruments – Design Summary for Quad Flat No-Lead Logic
Source:AN10366,HVQFN application information Rev.02-January 2006, Philips
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New Assembly and Interconnecting
Trends in Electronic and
Microelectronic
Conductive Adhesives and
Assembly Trends
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Conductive Adhesives - Characterization
Every conductive adhesive is made by adding conductive fillers
to non conductive polymer binders
Why use CA ?
- Compatibility with a wide range of surfaces
- Low temperature assembly, low thermal stress during processing
- No pre-clean or post clean requirements
- No lead or other toxic metals
When not use CA ?
- Lower volume resistivity – not suitable for power application (ohms)
- Lower age reliability
- Bigger volume changes
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Isotropic Conductive Adhesives
The isotropic conductive adhesives conduct equally in all
directions. The electrical conductivity is achieved with metal
particles inside volume of usually thermosetting material.
The approach to junction stability is the use of electrically
conductive oxide-penetrating particles as filler. Force must be
generated that will drive the penetrating particles through oxide
layers and hold them against adhered metals. A pseudometallurgical junction is formed.
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Anisotropic Conductive Adhesives
The anisotropic conductive adhesives provide uni-directional
conductivity in vertical Z axis. This directional conductivity is
achieved by using a relatively low volume loading of conductive
filler. The Z axis adhesive in film or paste form is interposed
between the surfaces to be connected. Application of heat and
pressure particles are trapped between opposing conductor
surfaces.
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Elastomeric Elements
STAXTM
makes
electrical
connection
through
metal
impregnated silicone layers.
Contact resistance is directly
related to the width and height of
the element and the substrate
contact pad with.
Source:Z-axis, http://www.z-axis.com
Matrix MOE® (Metal On Elastomer) elements make electrical connection
through solid conductors supported by the silicone.
Fujipoly makes conductive
stripes in structure from
carbon, silver, gold and special
materials.
Source: Fujipoly ,http://www.fujipoly.com
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Embeded Technique - Generally
PWBs with Embedded Components
Embedded resistors – thin film, thick film, plating technology
Embedded capacitors – dielectric layers
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Embedded techniques for LTCC
Source:M.Jackson,M.Pecht,S.B.Lee,P.Sandborn - Integral, Embedded and Burried Passive Technologies
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Embeded Techniques for Polyimid
Source:M.Jackson,M.Pecht,S.B.Lee,P.Sandborn - Integral, Embedded and Burried Passive Technologies
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Assembly Techniques for Automotive Applications
Thin multilayer PCB, glued on aluminium board. Suitable for automotive
applications.
Characteristic of the system: high reliability, good thermal conductivity
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MID technology
The MID technology (Molded Interconnection Device) integrates electronic and
mechanical elements onto circuit carriers with virtually any geometric shape (3D
shape), enable entirely new function and help miniaturizing electronic products
The substrate materials could be polypropylen, polycarbonat, polyethylenterpthalat,
polyamid and the others.
Source: Molded Interconnection Devices 3-DMID e.v., Research Association, Erlanden
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Multichip modules (MCMs)
MCM offers level of packaging between the chip and the board
They consists of an interconnective substrate, which may be silicon,
ceramic and the others on which are mounted two or more
semiconductor dice, sometimes also passive components.
The dice are attached to the substrate with wire bonding, flip chip or
reflow technology. They are problems with testing, packaging and
efficiency cooling of system.
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Multichip modules (MCMs)
Three types of MCM are classified:
1) MCM-D, the common substrate material is silicon and the insulator is
usually polyimide. Copper, gold and aluminium are viable signal layer
metallisation materials. The thermal conductivity of the substrate is good.
2) MCM-C, It consists of a co-fired ceramic substrate with metallization of
either plated thin film or screen printed thick film.
3) MCM-L, The substrate material for MCM-L is multilayer printed circuit
board.. Base chips are attached to the board by polymeric adhesive
4) MCM-Si, The substrate material is silicon. Conductor patterns are formed
using silicon dioxide (glass) as an insulator and aluminium or similar
metal for wiring.
The embedded techniques for passive component and wire bonding, Flip-Chip
and TAB for semiconductor chips are used.
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